DSTATUS disk_initialize (
BYTE pdrv /* Physical drive nmuber (0) */
)
{
BYTE n, cmd, ty, ocr[4];
if (pdrv) return STA_NOINIT; /* Supports only single drive */
power_off(); /* Turn off the socket power to reset the card */
power_on(); /* Turn on the socket power */
FCLK_SLOW();
for (n = 10; n; n--) xchg_spi(0xFF); /* 80 dummy clocks */
ty = 0;
if (send_cmd(CMD0, 0) == 1) { /* Enter Idle state */
WORD wt = 1000; /* Initialization timeout of 1000 msec */
if (send_cmd(CMD8, 0x1AA) == 1) { /* SDv2? */
for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF); /* Get trailing return value of R7 resp */
if (ocr[2] == 0x01 && ocr[3] == 0xAA) { /* The card can work at vdd range of 2.7-3.6V */
do {
if (!send_cmd(ACMD41, 1UL << 30)) break; /* Wait for leaving idle state (ACMD41 with HCS bit) */
delay_ms(1);
} while (--wt);
if (wt && send_cmd(CMD58, 0) == 0) { /* Check CCS bit in the OCR */
for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF);
ty = (ocr[0] & 0x40) ? CT_SD2 | CT_BLOCK : CT_SD2; /* SDv2 */
}
}
} else { /* SDv1 or MMCv3 */
if (send_cmd(ACMD41, 0) <= 1) {
ty = CT_SD1; cmd = ACMD41; /* SDv1 */
} else {
ty = CT_MMC; cmd = CMD1; /* MMCv3 */
}
do {
if (!send_cmd(cmd,0)) break;
delay_ms(1);
} while (--wt); /* Wait for leaving idle state */
if (!wt || send_cmd(CMD16, 512) != 0) /* Set R/W block length to 512 */
ty = 0;
}
}
CardType = ty;
deselect();
if (ty) { /* Initialization succeded */
Stat &= ~STA_NOINIT; /* Clear STA_NOINIT */
FCLK_FAST();
} else { /* Initialization failed */
power_off();
}
return Stat;
}
/******************************************************************************
* @brief Initialize SPI setting.
* The MicroSD card is connected to USART0, location #2.
* The FatFS system controls the SPI CS directly through the macros
* CS_HIGH() and CS_LOW().
*****************************************************************************/
void MICROSD_init(void)
{
USART_TypeDef *spi;
/* Enabling clock to USART 0 */
CMU_ClockEnable(cmuClock_USART0, true);
CMU_ClockEnable(cmuClock_GPIO, true);
/* Setup SPI at USART0 */
spi = USART0;
/* Setting baudrate */
FCLK_SLOW()
/* Configure SPI */
/* Using synchronous (SPI) mode*/
spi->CTRL = USART_CTRL_SYNC | USART_CTRL_MSBF;
/* Clearing old transfers/receptions, and disabling interrupts */
spi->CMD = USART_CMD_CLEARRX | USART_CMD_CLEARTX;
spi->IEN = 0;
/* Enabling pins and setting location, SPI CS not enable */
spi->ROUTE = USART_ROUTE_TXPEN | USART_ROUTE_RXPEN | USART_ROUTE_CLKPEN | USART_ROUTE_LOCATION_LOC1;
/* Enabling TX and RX */
spi->CMD = USART_CMD_TXEN | USART_CMD_RXEN;
/* Set to master and without controlling the CS line */
spi->CMD = USART_CMD_MASTEREN;
/* Clear previous interrupts */
spi->IFC = _USART_IFC_MASK;
/* IO configuration (USART 0, Location #1) */
GPIO_PinModeSet(gpioPortE, 7, gpioModePushPull, 0); /* MOSI */
GPIO_PinModeSet(gpioPortE, 6, gpioModeInputPull, 1); /* MISO */
GPIO_PinModeSet(gpioPortE, 4, gpioModePushPull, 0); /* CS */
GPIO_PinModeSet(gpioPortE, 5, gpioModePushPull, 0); /* Clock */
}
