int main2(void){
FIFO_Init(); // initializes a FIFO that holds 6 elements
for(;;){
Status[0] = FIFO_Get(&GetData[0]); // should fail, empty
Status[1] = FIFO_Put(1); // should succeed, 1
Status[2] = FIFO_Put(2); // should succeed, 1 2
Status[3] = FIFO_Put(3); // should succeed, 1 2 3
Status[4] = FIFO_Put(4); // should succeed, 1 2 3 4
Status[5] = FIFO_Put(5); // should succeed, 1 2 3 4 5
Status[6] = FIFO_Put(6); // should succeed, 1 2 3 4 5 6
Status[7] = FIFO_Put(7); // should fail, 1 2 3 4 5 6
Status[8] = FIFO_Get(&GetData[1]); // should succeed, 2 3 4 5 6
Status[9] = FIFO_Get(&GetData[2]); // should succeed, 3 4 5 6
Status[10] = FIFO_Put(7); // should succeed, 3 4 5 6 7
Status[11] = FIFO_Put(8); // should succeed, 3 4 5 6 7 8
Status[12] = FIFO_Put(9); // should fail, 3 4 5 6 7 8
Status[13] = FIFO_Get(&GetData[3]); // should succeed, 4 5 6 7 8
Status[14] = FIFO_Get(&GetData[4]); // should succeed, 5 6 7 8
Status[15] = FIFO_Get(&GetData[5]); // should succeed, 6 7 8
Status[16] = FIFO_Get(&GetData[6]); // should succeed, 7 8
Status[17] = FIFO_Get(&GetData[7]); // should succeed, 8
Status[18] = FIFO_Get(&GetData[8]); // should succeed, empty
Status[19] = FIFO_Get(&GetData[9]); // should fail, empty
}
}
//#pragma CODE_SECTION(ITaskQ_Write,".textDDR")
VOID ITaskQ_Write(ITaskQ *pThis, VOID *pVal)
{
Mutex_Lock(&pThis->oLock);
FIFO_Put(&pThis->oQ, pVal);
Signal_Post(&pThis->oWrite);
Mutex_Unlock(&pThis->oLock);
}
/*********************************************************************//**
* @brief USARTx interrupt handler sub-routine
* @param[in] None
* @return None
**********************************************************************/
void USART2_IRQHandler(
void)
{
uint8_t data_byte;
if (USART_GetITStatus(USART2, USART_IT_RXNE) != RESET) {
/* Read one byte from the receive data register */
data_byte = USART_ReceiveData(USART2);
(void) FIFO_Put(&Receive_Buffer, data_byte);
}
}
/******************************************************************************
* FunctionName : add_send_at_command
* Description : add the at command to the send buffer.
* Parameters : name_buffer: the at command name
* cmd_buffer: cmd_buffer: the command.
* Returns : none.
*******************************************************************************/
void add_send_at_command(char *name_buffer, char *cmd_buffer)
{
char at_cmd_Buff[256] = {0};
char at_name_Buff[20] = {0};
strcpy(at_name_Buff, name_buffer);
strcpy(at_cmd_Buff, cmd_buffer);
if(FIFO_Put(&s_at_fifo, at_name_Buff, at_cmd_Buff) ==-1)
{
printf("write fifo error!\n");
}
}
static void TestCase_StaticMemory(void)
{
FIFO_t MyFifo;
int ret = 0;
T MyT_A, MyT_B, MyT_C;
T MyT;
MyT.sex = 0;
MyT.addr = 0;
MyT.tel = 0;
MyT_A.sex = 1;
MyT_A.addr = 1;
MyT_A.tel = 1;
MyT_B.sex = 2;
MyT_B.addr = 2;
MyT_B.tel = 2;
MyT_C.sex = 3;
MyT_C.addr = 3;
MyT_C.tel = 3;
FIFO_Init(&MyFifo, FIFO_Pool, sizeof(T), ELE_CNT);
ret = FIFO_IsEmpty(&MyFifo);
ret = FIFO_IsFull(&MyFifo);
ret = FIFO_CountFree(&MyFifo);
ret = FIFO_CountUsed(&MyFifo);
FIFO_Put(&MyFifo, &MyT_A);
FIFO_Put(&MyFifo, &MyT_B);
FIFO_Put(&MyFifo, &MyT_C);
ret = FIFO_IsEmpty(&MyFifo);
ret = FIFO_IsFull(&MyFifo);
ret = FIFO_CountFree(&MyFifo);
ret = FIFO_CountUsed(&MyFifo);
FIFO_Get(&MyFifo, &MyT);
FIFO_Get(&MyFifo, &MyT);
FIFO_Get(&MyFifo, &MyT);
ret = FIFO_IsEmpty(&MyFifo);
ret = FIFO_IsFull(&MyFifo);
ret = FIFO_CountFree(&MyFifo);
ret = FIFO_CountUsed(&MyFifo);
FIFO_Put(&MyFifo, &MyT_A);
FIFO_Put(&MyFifo, &MyT_B);
FIFO_Put(&MyFifo, &MyT_C);
ret = FIFO_Flush(&MyFifo);
ret = FIFO_IsEmpty(&MyFifo);
ret = FIFO_IsFull(&MyFifo);
ret = FIFO_CountFree(&MyFifo);
ret = FIFO_CountUsed(&MyFifo);
}
void sendStringUsingFIFO(char* string){
while(*string){
if(interruptTurnedOn == FALSE){
turnOnInterrupts();
}
if(FIFO_Put(&fifo,*string++) == FIFO_ERROR){
FIFO_Empty(&fifo);
DBGU_sendString((char*)"Buffer Overflow Error\r\n");
break;
}
}
}
/*!RDRF set, data is accepted and does into RxFIFO;TDRE is set, data retrieved into TxFIFO,and sent out*/
void UART_Poll(void)
{
uint8_t RDRF; /*!< a 8 bit RDRF*/
uint8_t TDRE; /*!< a 8 bit RDRF*/
/*make RDRF equal to 00X00000, (XXXXXXXX&00100000 = 00X00000)*/
RDRF = (UART2_S1 & RDRFSET);
/*if 00X00000=00100000,RDRF set, data is put into &RxFIFO*/
if(RDRF == RDRFSET)
FIFO_Put(&RxFIFO, UART2_D);
/*make TDRE equal to X0000000, (XXXXXXXX&10000000 = X0000000)*/
TDRE = (UART2_S1 & TDRESET);
/*if X0000000=10000000,TDRE set, data is taken out of &TxFIFO*/
if(TDRE == TDRESET)
FIFO_Get(&TxFIFO, (uint8_t *)&UART2_D);
}
//=============================================================================
// UART Transmit Function
//=============================================================================
void UARTA0_Send(char data)
{
// Put straight to UART if not yet transmitting
if (!UARTA0_transmitting)
{
UCA0TXBUF = data;
UARTA0_transmitting = 1;
IE2 |= UCA0TXIE;
// Load data into TX buffer
} else {
// Make sure the buffer isn't full. Loop continuously if it is.
while(FIFO_Full(&UARTA0_tx_buffer));
FIFO_Put(&UARTA0_tx_buffer, data);
}
}
/* *************************************************************************
DESCRIPTION: Receives RS485 data stream
RETURN: none
ALGORITHM: none
NOTES: none
*************************************************************************** */
void RS485_Interrupt_Rx(
void)
{
uint8_t data_byte;
if ((RCSTA2bits.FERR) || (RCSTA2bits.OERR)) {
/* Clear the error */
RCSTA2bits.CREN = 0;
RCSTA2bits.CREN = 1;
/* FIXME: flag the MS/TP state machine on buffer overrun */
data_byte = RCREG2;
} else {
data_byte = RCREG2;
FIFO_Put(&FIFO_Rx, data_byte);
}
}
BOOL UART_OutChar(const uint8_t data)
{
EnterCritical();
/*!put the data from UART_OutChar into TxFIFO one by one*/
if(FIFO_Put(&TxFIFO, data))
{
UART2_C2 |= UART_C2_TIE_MASK; /*!enable transmitter interrupt*/
ExitCritical();
return bTRUE;
}
else
{
ExitCritical();
return bFALSE;
}
}
void __attribute__ ((interrupt)) UART_ISR(void)
{
uint8_t RDRF; /*!< a 8 bit RDRF*/
uint8_t TDRE; /*!< a 8 bit RDRF*/
/*make RDRF equal to 00X00000, (XXXXXXXX&00100000 = 00X00000)*/
RDRF = (UART2_S1 & RDRFSET);
/*if 00X00000=00100000,RDRF set, data is put into &RxFIFO*/
if(RDRF == RDRFSET)
FIFO_Put(&RxFIFO, UART2_D);
/*make TDRE equal to X0000000, (XXXXXXXX&10000000 = X0000000)*/
TDRE = (UART2_S1 & TDRESET);
/*if X0000000=10000000,TDRE set, data is taken out of &TxFIFO*/
if(TDRE == TDRESET)
{
if(!FIFO_Get(&TxFIFO, (uint8_t *)&UART2_D)) /*if error*/
UART2_C2 &= ~UART_C2_TIE_MASK; /*disable transmitter interrupt*/
}
}
void UART1_Handler()
{
int i;
GPIO_PORTG_DATA_R ^= 0x2;
GPIO_PORTG_DATA_R ^= 0x2;
while(UART1_FR_R& (0x8))
{} //while RXFE is 1, do nothing
for( i =0; i<8; i++)
{
if (FIFO_Put(UART1_DR_R) == 1)
{ errorcount++;}
}
UART1_ICR_R = 0x10; // acknowledges the interrupt happened
flag =1;
}
