void RCC_Configuration(void)
{
ErrorStatus HSEStartUpStatus;
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS)
{
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08)
{
}
/* Enable the FSMC Clock */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC,ENABLE);
/* Enable AFIO clocks */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO|RCC_APB2Periph_USART1 , ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_CAN1 , ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2 |RCC_APB1Periph_USART3 | RCC_APB1Periph_UART4 , ENABLE);
}
}
/**
* @brief To select MSI as System clock source
* @caller ADC_Icc_Test
* @param Frequence, DIV by 2 ot not , With or without RTC
* @retval None
*/
void SetHSICLKToMSI(uint32_t freq,bool div2,bool With_RTC)
{
/* RCC system reset */
RCC_DeInit();
/* Flash 1 wait state */
FLASH_SetLatency(FLASH_Latency_0);
/* Disable Prefetch Buffer */
FLASH_PrefetchBufferCmd(DISABLE);
/* Disable 64-bit access */
FLASH_ReadAccess64Cmd(DISABLE);
/* Disable FLASH during SLeep */
FLASH_SLEEPPowerDownCmd(ENABLE);
/* Enable the PWR APB1 Clock */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
/* Select the Voltage Range 3 (1.2V) */
PWR_VoltageScalingConfig(PWR_VoltageScaling_Range3);
/* Wait Until the Voltage Regulator is ready */
while (PWR_GetFlagStatus(PWR_FLAG_VOS) != RESET)
{}
/* To configure the MSI frequency */
RCC_MSIRangeConfig(freq);
/* Select MSI as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_MSI);
/* Wait till MSI is used as system clock source */
while (RCC_GetSYSCLKSource() != 0x00)
{}
if (div2)
{
RCC_HCLKConfig(RCC_SYSCLK_Div2);
}
RCC_HSICmd(DISABLE);
/* Disable HSE clock */
RCC_HSEConfig(RCC_HSE_OFF);
/* Disable LSE clock */
if (! With_RTC)
RCC_LSEConfig(RCC_LSE_OFF);
/* Disable LSI clock */
RCC_LSICmd(DISABLE);
}
static void PreSetupHardware(void) {
extern unsigned int *__Vectors;
ErrorStatus HSEStartUpStatus;
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if (HSEStartUpStatus == SUCCESS) {
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
/* PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) {}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while (RCC_GetSYSCLKSource() != 0x08) {}
}
/* Enable FSMC, GPIOD, GPIOE, GPIOF, GPIOG and AFIO clocks */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB |
RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD |
RCC_APB2Periph_GPIOE | RCC_APB2Periph_GPIOF |
RCC_APB2Periph_GPIOG | RCC_APB2Periph_AFIO |
RCC_APB2Periph_USART1 | RCC_APB2Periph_SPI1
, ENABLE);
/* Enable peripheral clocks --------------------------------------------------*/
/* Enable DMA1 clock */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
/* Enable USART2 clock */
/* Enable UART4 clock */
/* TIM2 clock enable */
/* TIM3 clock enable */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3 | RCC_APB1Periph_PWR |
RCC_APB1Periph_BKP | RCC_APB1Periph_TIM2 |
RCC_APB1Periph_USART2 | RCC_APB1Periph_USART3 |
RCC_APB1Periph_UART4, ENABLE);
NVIC_SetVectorTable((unsigned int)&__Vectors, 0x0);
}
/*==================================================================================
* 函 数 名： rcc_init
* 参 数： None
* 功能描述: rcc初始化
* 返 回 值： None
* 备 注： 初始化系统时钟，需要注意stm32f10x.h中对系统时钟的定义
* 作 者： gaodb
* 创建时间： 2012.10
==================================================================================*/
static void rcc_init(void)
{
ErrorStatus HSEStartUpStatus;
RCC_DeInit();
wait_sys_peri_ready();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
RCC_HSEConfig(RCC_HSE_Bypass);//外部晶振为24M有源晶振
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if (HSEStartUpStatus == SUCCESS)
{
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
FLASH_SetLatency(FLASH_Latency_2);
RCC_HCLKConfig(RCC_SYSCLK_Div1);
RCC_PCLK1Config(RCC_HCLK_Div2);//低速时钟最高36M
RCC_PCLK2Config(RCC_HCLK_Div1);
RCC_ADCCLKConfig(RCC_PCLK2_Div6);
/* PLLCLK = 24MHz * 3 = 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_3);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while (RCC_GetSYSCLKSource() != 0x08)
{}
}
RCC_ClockSecuritySystemCmd(ENABLE); //Enable CSSON（Clock securuty system）
/* Enable the LSI OSC */
RCC_LSICmd(ENABLE); //为独立看门狗提供时钟
/* Wait till LSI is ready */
while (RCC_GetFlagStatus(RCC_FLAG_LSIRDY) == RESET)
{}
}
/*******************************************************************************
* 配置RCC
*******************************************************************************/
void RCC_Configuration(void)
{
//复位RCC外部设备寄存器到默认值
RCC_DeInit(); //将RRC寄存器设为缺省值
//打开外部高速晶振
RCC_HSEConfig(RCC_HSE_ON);
//等待外部高速时钟准备好
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS) //外部高速时钟已经准别好
{
//开启FLASH的预取功能
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
//FLASH延迟2个周期
FLASH_SetLatency(FLASH_Latency_2);
//配置AHB(HCLK)时钟=SYSCLK
RCC_HCLKConfig(RCC_SYSCLK_Div1);
//配置APB2(PCLK2)钟=AHB时钟
RCC_PCLK2Config(RCC_HCLK_Div1);
//配置APB1(PCLK1)钟=AHB 1/2时钟
RCC_PCLK1Config(RCC_HCLK_Div2);
//配置PLL时钟 == 外部高速晶体时钟*9 PLLCLK = 8MHz * 9 = 72 MHz
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
//使能PLL时钟
RCC_PLLCmd(ENABLE);
//等待PLL时钟就绪
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
//配置系统时钟 = PLL时钟
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
//检查PLL时钟是否作为系统时钟
while(RCC_GetSYSCLKSource() != 0x08)
{
}
}
//开启GPIO时钟
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOx, ENABLE);
//开启串口时钟
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
}
/**
* Initializes the calibration table for read operations.
*
* @param none
* @retval bool Always TRUE.
*/
bool Tekdaqc_CalibrationInit(void) {
FLASH_SetLatency(CALIBRATION_LATENCY);
CAL_TEMP_LOW = (*(__IO float*) CAL_TEMP_LOW_ADDR);
CAL_TEMP_HIGH = (*(__IO float*) CAL_TEMP_HIGH_ADDR);
CAL_TEMP_STEP = (*(__IO float*) CAL_TEMP_STEP_ADDR);
CAL_TEMP_CNT = (*(__IO uint32_t*) CAL_TEMP_CNT_ADDR);
COLD_JUNCTION_OFFSET_CAL = (*(__IO uint32_t*) COLD_JUNCTION_OFFSET_ADDR);
COLD_JUNCTION_GAIN_CAL = (*(__IO uint32_t*) COLD_JUNCTION_GAIN_CAL);
CALIBRATION_VALID = (*(__IO uint8_t*) CAL_VALID_ADDR) != 0xFF;
return TRUE;
}
/*******************************************************************************
* ����RCC
*******************************************************************************/
void RCC_Configuration(void)
{
//��λRCC�ⲿ�豸�Ĵ�����Ĭ��ֵ
RCC_DeInit(); //��RRC�Ĵ�����Ϊȱʡֵ
//�����ⲿ���پ���
RCC_HSEConfig(RCC_HSE_ON);
//�ȴ��ⲿ����ʱ������
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS) //�ⲿ����ʱ���Ѿ�����
{
//����FLASH��Ԥȡ����
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
//FLASH�ӳ�2������
FLASH_SetLatency(FLASH_Latency_2);
//����AHB(HCLK)ʱ��=SYSCLK
RCC_HCLKConfig(RCC_SYSCLK_Div1);
//����APB2(PCLK2)��=AHBʱ��
RCC_PCLK2Config(RCC_HCLK_Div1);
//����APB1(PCLK1)��=AHB 1/2ʱ��
RCC_PCLK1Config(RCC_HCLK_Div2);
//����PLLʱ�� == �ⲿ���پ���ʱ��*9 PLLCLK = 8MHz * 9 = 72 MHz
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
//ʹ��PLLʱ��
RCC_PLLCmd(ENABLE);
//�ȴ�PLLʱ�Ӿ���
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
//����ϵͳʱ�� = PLLʱ��
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
//����PLLʱ���Ƿ���Ϊϵͳʱ��
while(RCC_GetSYSCLKSource() != 0x08)
{
}
}
//����GPIOʱ��
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOx, ENABLE);
//��������ʱ��
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
}
/*******************************************************************************
* Function Name : RCC_Configuration
* Description : Configures the different system clocks.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void RCC_Configuration(void)
{
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
/* PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08)
{
}
}
/* Enable peripheral clocks --------------------------------------------------*/
/* GPIOB Periph clock enable */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
/* I2C1 and I2C2 Periph clock enable */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C1 | RCC_APB1Periph_I2C2, ENABLE);
}
void RCC_Configuration(void)
{
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2); // 36MZH
/* On STICE the PLL output clock is fixed to 48 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08)
{
}
}
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP |
RCC_APB1Periph_TIM2, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIO_DISCONNECT |
RCC_APB2Periph_SPI1 | RCC_APB2Periph_GPIOB, ENABLE);
}
void initPowerSubsystem() {
RCC_MSIRangeConfig(RCC_MSIRange_4);
new_power_state = POWER_STATE_MED_SPEED;
currentCPU_HZ = powerStateClockFrequency(new_power_state);
SysTick_Config(powerStateClockFrequency(new_power_state) / configTICK_RATE_HZ);
current_power_state = new_power_state;
PWR_VoltageScalingConfig(PWR_VoltageScaling_Range3);
FLASH_SetLatency(FLASH_Latency_0);
FLASH_PrefetchBufferCmd(DISABLE);
FLASH_ReadAccess64Cmd(DISABLE);
}
void CLOCK_FLASH_config()
{
// クロックの状態を初期値に戻す
RCC_DeInit();
// wait stateの設定
if (VoltageRange_x == VoltageRange_2) FLASH_SetLatency(FLASH_Latency_6);
else if(VoltageRange_x == VoltageRange_3) FLASH_SetLatency(FLASH_Latency_5);
else while(1);
// ART Acceleratorの設定
FLASH_PrefetchBufferCmd(ENABLE);
FLASH_InstructionCacheCmd(ENABLE);
FLASH_DataCacheCmd(ENABLE);
// HSIのキャリブレーション値を設定する
RCC_AdjustHSICalibrationValue(HSICalibrationValue);
// PLLの設定をする (max. 168 MHz)
// PLLM: division factor, 2-63 --> 1-2 MHz (2MHz is recommended)
// PLLN: multiplication factor, 64-432 --> 64-432 MHz
// PLLP: division factor, 2, 4, 6, or 8 --> max 168 MHz
// PLLQ: division factor, 2-15 --> 48 MHz
RCC_PLLConfig(RCC_PLLSource_HSI, 8, 168, 2, 7); // HSI / 8 * 168 / 2 = 168 MHz
//RCC_PLLConfig(RCC_PLLSource_HSI, 8, 168, 4, 7); // HSI / 8 * 168 / 4 = 84 MHz
RCC_PLLCmd(ENABLE);
while( RCC_GetFlagStatus(RCC_FLAG_PLLRDY) != SET);
// HCLKの分周比を設定する (max. 168 MHz)
RCC_HCLKConfig(RCC_SYSCLK_Div1);
// PCLK2の分周比を設定する (max. 84 MHz)
RCC_PCLK2Config(RCC_HCLK_Div2);
// PLCK1の分周比を設定する (max. 42 MHz)
RCC_PCLK1Config(RCC_HCLK_Div4);
// SYSCLKのクロックソースをPLLに切り替える
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
while(RCC_GetSYSCLKSource() != 0x08);
}
void SetSysClock72(void)
{
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if (HSEStartUpStatus != SUCCESS)
{
ErrorLoop();
};
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div2, RCC_PLLMul_9);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08)
{
}
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
}
/**
* @fn void System_ClockConfig(void)
* @brief
* @li 시스템 클럭을 설정한다.
* @remarks
* @param void
* @return void
*/
void System_ClockConfig(void)
{
__IO ErrorStatus HSEStartUpStatus = SUCCESS;
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* AHB 클럭설정 : HCLK = SYSCLK = 72MHz */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* APB2( high-speed ) 클럭 설정 PCLK2 = HCLK = 72MHz */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* APB1 (low-speed) 클럭 설정 PCLK1 = HCLK/2 = 36MHz */
RCC_PCLK1Config(RCC_HCLK_Div2);
/* PLL 설정 : PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08)
{
}
}
}
void ClkSwitch2HseSystemInit (void)
{
ErrorStatus HSEStartUpStatus;
/* RCC system reset(for debug purpose) */
RCC_DeInit();
RCC_HSICmd(DISABLE); //Turn of the internal RC;
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
/* PLLCLK = 10MHz * 7 = 70 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_7);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08)
{
}
}
}
/*******************************************************************************
* Function Name : RCC_Configuration
* Description : 系统时钟设置
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void RCC_Configuration(void)
{
ErrorStatus HSEStartUpStatus;
//使能外部晶振
RCC_HSEConfig(RCC_HSE_ON);
//等待外部晶振稳定
HSEStartUpStatus = RCC_WaitForHSEStartUp();
//如果外部晶振启动成功，则进行下一步操作
if (HSEStartUpStatus==SUCCESS)
{
//设置HCLK（AHB时钟）=SYSCLK
RCC_HCLKConfig(RCC_SYSCLK_Div1);
//PCLK1(APB1) = HCLK/2
RCC_PCLK1Config(RCC_HCLK_Div2);
//PCLK2(APB2) = HCLK
RCC_PCLK2Config(RCC_HCLK_Div1);
//FLASH时序控制
//推荐值：SYSCLK = 0~24MHz Latency=0
// SYSCLK = 24~48MHz Latency=1
// SYSCLK = 48~72MHz Latency=2
FLASH_SetLatency(FLASH_Latency_2);
//开启FLASH预取指功能
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
//PLL设置 SYSCLK/1 * 9 = 8*1*9 = 72MHz
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
//启动PLL
RCC_PLLCmd(ENABLE);
//等待PLL稳定
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
//系统时钟SYSCLK来自PLL输出
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
//切换时钟后等待系统时钟稳定
while (RCC_GetSYSCLKSource()!=0x08);
}
//下面是给各模块开启时钟
//启动GPIO
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOC |\
RCC_APB2Periph_GPIOD,\
ENABLE);
//启动AFIO
RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
return;
}
void fdi_clock_start_high_speed_internal(void) {
RCC_HSICmd(ENABLE);
while (RCC_GetFlagStatus(RCC_FLAG_HSIRDY) == RESET);
RCC_SYSCLKConfig(RCC_SYSCLKSource_HSI);
FLASH_SetLatency(FLASH_Latency_2);
RCC_PLLCmd(DISABLE);
RCC_PLLConfig(RCC_PLLSource_HSI, 16, 336, 4, 7); // SYSCLK 84MHz & USB 48MHz
RCC_PLLCmd(ENABLE);
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
}
void PIOS_Board_Init(void) {
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* Delay system */
PIOS_DELAY_Init();
/* Initialize the PiOS library */
PIOS_GPIO_Init();
}
/*****************************************************************************
* Function Name : RCC_Configuration
* Description : Reset and Clock Control configuration
* Input : None
* Output : None
* Return : None
******************************************************************************/
void RCC_Configuration(void)
{
ErrorStatus HSEStartUpStatus;
/* Reset the RCC clock configuration to default reset state */
RCC_DeInit();
/* Configure the High Speed External oscillator */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait for HSE start-up */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Set the code latency value: FLASH Two Latency cycles */
FLASH_SetLatency(FLASH_Latency_2);
/* Configure the AHB clock(HCLK): HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* Configure the High Speed APB2 clcok(PCLK2): PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* Configure the Low Speed APB1 clock(PCLK1): PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
/* Configure the PLL clock source and multiplication factor */
/* PLLCLK = HSE*PLLMul = 8*9 = 72MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Check whether the specified RCC flag is set or not */
/* Wait till PLL is ready */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Get System Clock Source */
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08);
}
}
void SysClkSetHSI_4xPLLMul (uint32_t PLLMul ) {
if (PLLMul > RCC_PLLMul_12) {
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
// Flash 2 wait state for freq > 4x12 48MHz
FLASH_SetLatency(FLASH_Latency_2);
}
else if (PLLMul > RCC_PLLMul_6) {
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
// Flash 1 wait state for freq > 4x6 24MHz
FLASH_SetLatency(FLASH_Latency_1);
}
// PLL provides frequency multiplier of (HSI/2) i.e. 4MHz x ...
RCC_PLLConfig(RCC_PLLSource_HSI_Div2, PLLMul);
// Enable PLL
RCC_PLLCmd(ENABLE);
// Wait till PLL is ready
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
// Select PLL as system clock source
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
// Wait till PLL is used as system clock source
while (RCC_GetSYSCLKSource() != 0x08);
// AHB, AP2 and AP1 clock are necessary for the peripherals to function
// HCLK for AHB = SYSCLK (max is SYSCLK, up to 72MHz)
RCC_HCLKConfig(RCC_SYSCLK_Div1);
// PCLK2 for APB2 = HCLK (max is SYSCLK, up to 72MHz)
RCC_PCLK2Config(RCC_HCLK_Div1);
if (PLLMul > RCC_PLLMul_9) {
// PCLK1 for APB1 = HCLK/2 (> 4x9MHz max of 36MHz, use slower clock)
RCC_PCLK1Config(RCC_HCLK_Div2);
}
else {
// PCLK1 for APB1 = HCLK (HCLK <= 36MHz)
RCC_PCLK1Config(RCC_HCLK_Div1);
}
RCC_GetClocksFreq(&ClksFreq); // update SYSCLK, HCLK, PCLK1 and PCLK2 in ClksFreq
}
void PIOS_Board_Init(void) {
if (board_init_complete) {
return;
}
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* Delay system */
PIOS_DELAY_Init();
/* Initialize the PiOS library */
PIOS_GPIO_Init();
#if defined(PIOS_INCLUDE_LED)
PIOS_LED_Init(&pios_led_cfg);
#endif /* PIOS_INCLUDE_LED */
#if defined(PIOS_INCLUDE_USB)
/* Initialize board specific USB data */
PIOS_USB_BOARD_DATA_Init();
/* Activate the HID-only USB configuration */
PIOS_USB_DESC_HID_ONLY_Init();
uint32_t pios_usb_id;
if (PIOS_USB_Init(&pios_usb_id, &pios_usb_main_cfg)) {
PIOS_Assert(0);
}
#if defined(PIOS_INCLUDE_USB_HID) && defined(PIOS_INCLUDE_COM_MSG)
uint32_t pios_usb_hid_id;
if (PIOS_USB_HID_Init(&pios_usb_hid_id, &pios_usb_hid_cfg, pios_usb_id)) {
PIOS_Assert(0);
}
if (PIOS_COM_MSG_Init(&pios_com_telem_usb_id, &pios_usb_hid_com_driver, pios_usb_hid_id)) {
PIOS_Assert(0);
}
#endif /* PIOS_INCLUDE_USB_HID && PIOS_INCLUDE_COM_MSG */
#endif /* PIOS_INCLUDE_USB */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_CRC, ENABLE);//TODO Tirar
board_init_complete = true;
}
/***************************************************************************//**
* @brief Selects HSE as System clock source and configure HCLK, PCLK2 and PCLK1 prescalers.
******************************************************************************/
void SetSysClockToHSE(void)
{
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig( RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if (HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 0 wait state */
FLASH_SetLatency( FLASH_Latency_0);
/* HCLK = SYSCLK */
RCC_HCLKConfig( RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config( RCC_HCLK_Div1);
/* PCLK1 = HCLK */
RCC_PCLK1Config(RCC_HCLK_Div1);
/* Select HSE as system clock source */
RCC_SYSCLKConfig( RCC_SYSCLKSource_HSE);
/* Wait till PLL is used as system clock source */
while (RCC_GetSYSCLKSource() != 0x04)
{
}
}
else
{ /* If HSE fails to start-up, the application will have wrong clock configuration.
User can add here some code to deal with this error */
/* Go to infinite loop */
while (1)
{
}
}
}
/**
* @brief Bootloader Main function
*/
int main() {
uint8_t GO_dfu = false;
/* Brings up System using CMSIS functions, enables the LEDs. */
PIOS_SYS_Init();
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_CRC, ENABLE);
/* Delay system */
PIOS_DELAY_Init();
for (uint32_t t = 0; t < 10000000; ++t) {
if (NSS_HOLD_STATE == 1)
GO_dfu = TRUE;
else {
GO_dfu = FALSE;
break;
}
}
//while(TRUE)
// {
// PIOS_LED_Toggle(LED1);
// PIOS_DELAY_WaitmS(1000);
// }
//GO_dfu = TRUE;
PIOS_IAP_Init();
GO_dfu = GO_dfu | PIOS_IAP_CheckRequest();// OR with app boot request
if (GO_dfu == FALSE) {
jump_to_app();
}
if (PIOS_IAP_CheckRequest()) {
PIOS_DELAY_WaitmS(1000);
PIOS_IAP_ClearRequest();
}
PIOS_Board_Init();
boot_status = idle;
Fw_crc = PIOS_BL_HELPER_CRC_Memory_Calc();
PIOS_LED_On(LED1);
while (1) {
process_spi_request();
}
return 0;
}
/**************************************************************/
//程 序 名： RCC_Config()
//开 发 者： Haichao.Xie
//入口参数： 无
//功能说明： 系统时钟配置
//**************************************************************/
void RCC_Config(void)
{
ErrorStatus HSEStartUpStatus; //定义结构体
/* RCC system reset(for debug purpose)将外设 RCC寄存器重设为缺省值 */
RCC_DeInit();
/* Enable HSE 设置外部高速晶振（HSE）*/
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready 等待 HSE 起振*/
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if (HSEStartUpStatus == SUCCESS)
{
/* Enable Prefetch Buffer 预取指缓存使能*/
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state 设置代码延时值*/
FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK 设置 AHB 时钟（HCLK）*/
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK 设置高速 AHB 时钟（PCLK2）*/
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/1 设置低速 AHB 时钟（PCLK1）*/
RCC_PCLK1Config(RCC_HCLK_Div1);
/* PLLCLK = 12MHz * 6 = 72 MHz 设置 PLL 时钟源及倍频系数*/
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_6);
/* Enable PLL 使能或者失能 PLL*/
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready 等待指定的 RCC 标志位设置成功 等待PLL初始化成功*/
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{
}
/* Select PLL as system clock source 设置系统时钟（SYSCLK） 设置PLL为系统时钟源*/
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source 等待PLL成功用作于系统时钟的时钟源*/
while(RCC_GetSYSCLKSource() != 0x08)
{
}
}
}
static void RCC_Configuration(void)
{
/*---------------------------------*/
/* /!\ PLL2 not configured /!\ */
/*---------------------------------*/
ErrorStatus HSEStartUpStatus;
// RCC system reset(for debug purpose)
RCC_DeInit();
// Enable HSE
RCC_HSEConfig(RCC_HSE_ON);
// Wait till HSE is ready
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS)
{
// Enable Prefetch Buffer
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
// Flash 2 wait state
FLASH_SetLatency(FLASH_Latency_2);
// HCLK = SYSCLK
RCC_HCLKConfig(RCC_SYSCLK_Div1);
// PCLK2 = HCLK
RCC_PCLK2Config(RCC_HCLK_Div1);
// PCLK1 = HCLK/2
RCC_PCLK1Config(RCC_HCLK_Div2);
/* ADCCLK = PCLK2/4 */
RCC_ADCCLKConfig(RCC_PCLK2_Div4);
// PLLCLK = 8MHz * 9 = 72 MHz
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
// Enable PLL
RCC_PLLCmd(ENABLE);
// Wait till PLL is ready
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
{;}
// Select PLL as system clock source
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
// Wait till PLL is used as system clock source
while(RCC_GetSYSCLKSource() != 0x08) ///????
{;}
}
/* Enable peripheral clocks (FOR USART1)---------------------------------*/
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
/* Enable GPIOA / GPIOC clock */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
}
void vHardwareInit()
{
// Enable HSE:
RCC_HSEConfig(RCC_HSE_ON);
// Wait for HSE to be ready:
while (RCC_WaitForHSEStartUp() != SUCCESS);
// Set PLL to be 9 * HSE = 72 MHz:
RCC_PLLCmd(DISABLE);
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
RCC_PLLCmd(ENABLE);
// Wait for PLL to be ready:
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) != SET);
// Two wait states, if 48 MHz < SYSCLK <= 72 MHz:
FLASH_SetLatency(FLASH_Latency_2);
// Set PLL as system clock:
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
// Disable HSI:
RCC_HSICmd(DISABLE);
// Set APB low-speed clock (PCLK1), divide by 2:
RCC_PCLK1Config(RCC_HCLK_Div2);
// Set APB high-speed clock (PCLK2), do not divide:
RCC_PCLK2Config(RCC_HCLK_Div1);
// Set AHB clock (HCLK), do not divide:
RCC_HCLKConfig(RCC_SYSCLK_Div1);
// 3 bits for pre-emption priority 1 bits for subpriority:
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_3);
// Set core clock as SYSTICK source:
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK);
#ifdef RAM_BOOT
// Put vector interrupt table in RAM:
NVIC_SetVectorTable(NVIC_VectTab_RAM, SCB_VTOR_TBLBASE);
#endif
}
/*
* RCC时钟频率引脚配置
*/
void RCC_Configuration(void)
{
//定义错误状态变量
ErrorStatus HSEStartUpStatus;
//将RCC寄存器重新设置为默认值
RCC_DeInit();
//打开外部高速时钟晶振
RCC_HSEConfig(RCC_HSE_ON);
//等待外部高速时钟晶振工作
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus != SUCCESS) return;
//使能预取指缓存
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
//设置FLASH代码延时
FLASH_SetLatency(FLASH_Latency_2);
//设置AHB时钟(HCLK)为系统时钟
RCC_HCLKConfig(RCC_SYSCLK_Div1);
//设置高速AHB时钟(APB2)为HCLK时钟
RCC_PCLK2Config(RCC_HCLK_Div1);
//设置低速AHB时钟(APB1)为HCLK的2分频
RCC_PCLK1Config(RCC_HCLK_Div2);
//设置PLL时钟，为HSE的12倍频 PLLCLK = 12MHz/2 * 12 = 72 MHz
RCC_PLLConfig(RCC_PLLSource_HSE_Div2, RCC_PLLMul_12);
//使能PLL
RCC_PLLCmd(ENABLE);
//等待PLL准备就绪
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
//设置PLL为系统时钟源
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
//判断PLL是否是系统时钟
while(RCC_GetSYSCLKSource() != 0x08);
}
void RCC_Configuration(void)
{
ErrorStatus HSEStartUpStatus;
RCC_DeInit();
RCC_HSEConfig(RCC_HSE_ON);
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS)
{
RCC_HCLKConfig(RCC_SYSCLK_Div1);
RCC_PCLK2Config(RCC_HCLK_Div1);
RCC_PCLK1Config(RCC_HCLK_Div2);
FLASH_SetLatency(FLASH_Latency_2);
FLASH_PrefetchBufferCmd(ENABLE);
RCC_PLLConfig(RCC_PLLSource_HSE_Div1,RCC_PLLMul_9);
RCC_PLLCmd(ENABLE);
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY)==RESET);
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
while(RCC_GetSYSCLKSource() !=0x08);
// the following is the selected part of the clock inicialization, according to your connecting devices
//SPI1 clock open
RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1,ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA,ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB,ENABLE);
//USART-XTend (wireless data transmittion) clock open
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
//USART-GPS clock open
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
//USART-sensor clock open
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
//GPIO LED clock open
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC,ENABLE);
//GPIO Launching clock open
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC,ENABLE);
SysTick_ITConfig(ENABLE);
}
}
/**
* PIOS_Board_Init()
* initializes all the core subsystems on this specific hardware
* called from System/openpilot.c
*/
void PIOS_Board_Init(void) {
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* Delay system */
PIOS_DELAY_Init();
/* Initialize the PiOS library */
#if defined(PIOS_INCLUDE_COM)
uint32_t pios_usart_telem_rf_id;
if (PIOS_USART_Init(&pios_usart_telem_rf_id, &pios_usart_telem_cfg)) {
PIOS_DEBUG_Assert(0);
}
if (PIOS_COM_Init(&pios_com_telem_rf_id, &pios_usart_com_driver,
pios_usart_telem_rf_id)) {
PIOS_DEBUG_Assert(0);
}
#endif /* PIOS_INCLUDE_COM */
PIOS_GPIO_Init();
#if defined(PIOS_INCLUDE_USB_HID)
PIOS_USB_HID_Init(0);
#if defined(PIOS_INCLUDE_COM)
if (PIOS_COM_Init(&pios_com_telem_usb_id, &pios_usb_com_driver, 0)) {
PIOS_DEBUG_Assert(0);
}
#endif /* PIOS_INCLUDE_COM */
#endif /* PIOS_INCLUDE_USB_HID */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_CRC, ENABLE);//TODO Tirar
/* Set up the SPI interface to the AHRS */
if (PIOS_SPI_Init(&pios_spi_ahrs_id, &pios_spi_ahrs_cfg)) {
PIOS_DEBUG_Assert(0);
}
/* Bind the AHRS comms layer to the AHRS SPI link */
PIOS_OPAHRS_Attach(pios_spi_ahrs_id);
}
void Startup::clkInit()
{
// Set STKALIGN in NVIC
SCB->CCR |= 0x200;
// 1. Clocking the controller from internal HSI RC (8 MHz)
RCC_HSICmd(ENABLE);
// wait until the HSI is ready
while(RCC_GetFlagStatus(RCC_FLAG_HSIRDY) == RESET);
RCC_SYSCLKConfig(RCC_SYSCLKSource_HSI);
// 2. Enable ext. high frequency OSC
RCC_HSEConfig(RCC_HSE_ON);
// wait until the HSE is ready
while(RCC_GetFlagStatus(RCC_FLAG_HSERDY) == RESET);
// 3. Init PLL
RCC_PLLConfig(RCC_PLLSource_HSE_Div1,RCC_PLLMul_9); // 72MHz
// RCC_PLLConfig(RCC_PLLSource_HSE_Div2,RCC_PLLMul_9); // 72MHz
RCC_PLLCmd(ENABLE);
// wait until the PLL is ready
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
// 4. Set system clock dividers
RCC_USBCLKConfig(RCC_USBCLKSource_PLLCLK_1Div5);
RCC_ADCCLKConfig(RCC_PCLK2_Div8);
RCC_PCLK2Config(RCC_HCLK_Div1);
RCC_PCLK1Config(RCC_HCLK_Div2);
RCC_HCLKConfig(RCC_SYSCLK_Div1);
// Flash 1 wait state
// *(vu32 *)0x40022000 = 0x12;
// *(vu32 *)0x40022000 = 0x01;
// Enable Prefetch Buffer
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
// Flash 2 wait state
FLASH_SetLatency(FLASH_Latency_2);
// Select PLL as system clock source
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
// Wait till PLL is used as system clock source
while(RCC_GetSYSCLKSource() != 0x08)
{
}
}
void RCC_Configuration(void)
{
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
while (RCC_GetFlagStatus(RCC_FLAG_HSERDY) == RESET)
;
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
/* PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
;
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while (RCC_GetSYSCLKSource() != 0x08)
;
}
