/* Indices for the voltage to frequency mapping table */
enum {
BCM_LOWA_MODE,
BCM_NORMAL_MODE,
BCM_MEDA_MODE,
BCM_MEDB_MODE,
// BCM_MEDC_MODE,
BCM_TURBO_MODE,
// BCM_TURBOA_MODE,
BCM_TURBOB_MODE,
};
/* Voltage-Frequency mapping for BCM21553 CPU0 */
static struct bcm_freq_tbl bcm215xx_cpu0_freq_tbl[] = {
FTBL_INIT(BCM_CORE_CLK_LOWA / 1000, 1160000),
FTBL_INIT(BCM_CORE_CLK_NORMAL / 1000, 1200000),
FTBL_INIT(BCM_CORE_CLK_MEDA / 1000, 1200000),
FTBL_INIT(BCM_CORE_CLK_MEDB / 1000, 1220000),
// FTBL_INIT(BCM_CORE_CLK_MEDC / 1000, 1240000),
FTBL_INIT(BCM_CORECLK_TURBO / 1000, 1300000),
// FTBL_INIT(BCM_CORECLK_TURBOA / 1000, 1320000),
FTBL_INIT(BCM_CORECLK_TURBOB / 1000, 1320000),
};
/* BCM21553 CPU info */
static struct bcm_cpu_info bcm215xx_cpu_info[] = {
[0] = {
.freq_tbl = bcm215xx_cpu0_freq_tbl,
.num_freqs = ARRAY_SIZE(bcm215xx_cpu0_freq_tbl),
.cpu_latency = 1000000,
.cpu_clk = "arm11",
#define BCM_CORE_CLK_NORMAL BCM21553_CORECLK_KHZ_312
#if defined(CONFIG_BCM_CPU_FREQ)
/*********************************************************************
* DATA FOR BCM CPUFREQ PLAT DRIVER *
*********************************************************************/
/* Indices for the voltage to frequency mapping table */
enum {
BCM_NORMAL_MODE,
BCM_TURBO_MODE,
};
/* Voltage-Frequency mapping for BCM21553 CPU0 */
static struct bcm_freq_tbl bcm215xx_cpu0_freq_tbl[] = {
FTBL_INIT(BCM_CORE_CLK_NORMAL / 1000, 1200000),
FTBL_INIT(BCM_CORECLK_TURBO / 1000, 1350000),
};
/* BCM21553 CPU info */
static struct bcm_cpu_info bcm215xx_cpu_info[] = {
[0] = {
.freq_tbl = bcm215xx_cpu0_freq_tbl,
.num_freqs = ARRAY_SIZE(bcm215xx_cpu0_freq_tbl),
.cpu_latency = CPUFREQ_ETERNAL,
.cpu_clk = "arm11",
.appspll_en_clk = "appspll_en",
.cpu_regulator = "csr_nm2",
.index_turbo = BCM_TURBO_MODE,
},
};
/* Platform data for BCM CPU freq driver */
* DATA FOR BCM CPUFREQ PLAT DRIVER *
*********************************************************************/
/* Indices for the voltage to frequency mapping table */
enum {
BCM_SLOW_MODE,
BCM_NORMAL_MODE,
BCM_MEDIUM_MODE,
BCM_FAST_MODE,
BCM_SPEED_MODE,
BCM_TURBO_MODE,
};
/* Voltage-Frequency mapping for BCM21553 CPU0 */
static struct bcm_freq_tbl bcm215xx_cpu0_freq_tbl[] = {
FTBL_INIT(BCM_CORE_CLK_SLOW / 1000, 1180000),
FTBL_INIT(BCM_CORE_CLK_NORMAL / 1000, 1220000),
FTBL_INIT(BCM_CORE_CLK_MEDIUM / 1000, 1240000),
FTBL_INIT(BCM_CORE_CLK_FAST / 1000, 1260000),
FTBL_INIT(BCM_CORE_CLK_SPEED / 1000, 1280000),
FTBL_INIT(BCM_CORECLK_TURBO / 1000, 1340000),
};
/* BCM21553 CPU info */
static struct bcm_cpu_info bcm215xx_cpu_info[] = {
[0] = {
.freq_tbl = bcm215xx_cpu0_freq_tbl,
.num_freqs = ARRAY_SIZE(bcm215xx_cpu0_freq_tbl),
.cpu_latency = CPUFREQ_ETERNAL,
.cpu_clk = "arm11",
.appspll_en_clk = "appspll_en",
.cpu_regulator = "csr_nm2",
