static DECLFW(M121Write)
{
// FCEU_printf("write: %04x:%04x\n",A&0xE003,V);
if((A&0xF003)==0x8003)
{
// FCEU_printf(" prot write");
// FCEU_printf("write: %04x:%04x\n",A,V);
if (V==0xAB) setprg8(0xE000,7);
else if(V==0x26) setprg8(0xE000,8);
// else if(V==0x26) setprg8(0xE000,1); // MK3
// else if(V==0x26) setprg8(0xE000,0x15); // sonic 3D blast, 8003 - command (0x26), 8001 - data 0x2A (<<1 = 0x15)
else if(V==0xFF) setprg8(0xE000,9);
else if(V==0x28) setprg8(0xC000,0xC);
else if(V==0xEC) setprg8(0xE000,0xD);
// else if(V==0xEC) setprg8(0xE000,0xC);//MK3
else if(V==0xEF) setprg8(0xE000,0xD); // damn mess, need real hardware to figure out bankswitching
else if(V==0x2A) setprg8(0xA000,0x0E);
// else if(V==0x2A) setprg8(0xE000,0x0C); // MK3
else if(V==0x20) setprg8(0xE000,0x13);
else if(V==0x29) setprg8(0xE000,0x1B);
else
{
// FCEU_printf(" unknown");
FixMMC3PRG(MMC3_cmd);
MMC3_CMDWrite(A,V);
}
// FCEU_printf("\n");
}
else
{
// FixMMC3PRG(MMC3_cmd);
MMC3_CMDWrite(A,V);
}
}
static DECLFW(Super24Write)
{
switch(A)
{
case 0x5FF0: EXPREGS[0]=V;
FixMMC3PRG(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
break;
case 0x5FF1: EXPREGS[1]=V;
FixMMC3PRG(MMC3_cmd);
break;
case 0x5FF2: EXPREGS[2]=V;
FixMMC3CHR(MMC3_cmd);
break;
}
}
static DECLFW(UNLSL1632CMDWrite)
{
if(A==0xA131)
{
bbrk=V;
}
if(bbrk&2)
{
FixMMC3PRG(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
if(A<0xC000)
MMC3_CMDWrite(A,V);
else
MMC3_IRQWrite(A,V);
}
else
{
if((A>=0xB000)&&(A<=0xE003))
{
int ind=((((A&2)|(A>>10))>>1)+2)&7;
int sar=((A&1)<<2);
chrcmd[ind]=(chrcmd[ind]&(0xF0>>sar))|((V&0x0F)<<sar);
}
else
switch(A&0xF003)
static DECLFW(Super24Write)
{
//printf("$%04x:$%02x\n",A,V);
switch(A)
{
case 0x5ff0:sizer=V;
FixMMC3PRG(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
break;
case 0x5FF1:
bigbank=V;
FixMMC3PRG(MMC3_cmd);
break;
case 0x5FF2:
bigbank2=V;
FixMMC3CHR(MMC3_cmd);
break;
}
}
static DECLFW(BMCFK23CWrite)
{
/* FCEU_printf("lo %04x:%02x\n",A,V);*/
if(dipswitch) /* нулевой дип берет любые записи по дефолту, дальше идет выбор*/
{
if(A&(1<<(dipswitch+3))) {
EXPREGS[A&3]=V;
/* FCEU_printf(" reg %d set!\n",A&3);*/
FixMMC3PRG(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
}
}
else
{
EXPREGS[A&3]=V;
/* FCEU_printf(" reg %d set!\n",A&3);*/
FixMMC3PRG(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
}
}
static void BMCFK23CAPower(void)
{
GenMMC3Power();
dipswitch = 0;
EXPREGS[0]=EXPREGS[1]=EXPREGS[2]=EXPREGS[3]=0;
EXPREGS[4]=EXPREGS[5]=EXPREGS[6]=EXPREGS[7]=0xFF;
SetWriteHandler(0x5000,0x5fff,BMCFK23CWrite);
SetWriteHandler(0x8000,0xFFFF,BMCFK23CHiWrite);
FixMMC3PRG(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
}
static DECLFW(M199Write) {
if ((A == 0x8001) && (MMC3_cmd & 8)) {
EXPREGS[MMC3_cmd & 3] = V;
FixMMC3PRG(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
} else
if (A < 0xC000)
MMC3_CMDWrite(A, V);
else
MMC3_IRQWrite(A, V);
}
static void BMCFK23CReset(void)
{
if(dipswitch<=8)
dipswitch++;
else
dipswitch=0;
EXPREGS[0]=EXPREGS[1]=EXPREGS[2]=EXPREGS[3]=0;
EXPREGS[4]=EXPREGS[5]=EXPREGS[6]=EXPREGS[7]=0xFF;
MMC3RegReset();
FixMMC3PRG(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
}
static DECLFW(BMC8IN1Write) {
if(A & 0x1000) {
EXPREGS[0] = V;
FixMMC3PRG(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
} else {
if(A < 0xC000)
MMC3_CMDWrite(A, V);
else
MMC3_IRQWrite(A, V);
}
}
static DECLFW(BMCFK23CWrite)
{
//FCEU_printf("lo %04x:%02x\n",A,V);
if(dipswitch) // нулевой дип берет любые записи по дефолту, дальше идет выбор
{
if(A&(1<<(dipswitch+3))) {
EXPREGS[A&3]=V;
// FCEU_printf(" reg %d set!\n",A&3);
FixMMC3PRG(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
}
}
else
{
EXPREGS[A&3]=V;
// FCEU_printf(" reg %d set!\n",A&3);
FixMMC3PRG(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
}
if(EXPREGS[3]&2)
EXPREGS[0] &= ~7; // hacky hacky! if someone wants extra banking, then for sure doesn't want mode 4 for it! (allow to run A version boards on normal mapper)
}
static DECLFW(SA9602BWrite)
{
switch(A & 0xe001)
{
case 0x8000: EXPREGS[0] = V; break;
case 0x8001:
if((EXPREGS[0] & 7) < 6)
{
EXPREGS[1] = V >> 6;
FixMMC3PRG(MMC3_cmd);
}
break;
}
void MMC3RegReset(void) {
IRQCount = IRQLatch = IRQa = MMC3_cmd = 0;
DRegBuf[0] = 0;
DRegBuf[1] = 2;
DRegBuf[2] = 4;
DRegBuf[3] = 5;
DRegBuf[4] = 6;
DRegBuf[5] = 7;
DRegBuf[6] = 0;
DRegBuf[7] = 1;
FixMMC3PRG(0);
FixMMC3CHR(0);
}
static DECLFW(M199Write)
{
if((A==0x8001)&&(MMC3_cmd&8))
{
// FCEU_printf("%02x=>%02x\n",MMC3_cmd,V);
EXPREGS[MMC3_cmd&3]=V;
FixMMC3PRG(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
}
else
if(A<0xC000)
MMC3_CMDWrite(A,V);
else
MMC3_IRQWrite(A,V);
}
static DECLFW(BMCFK23CHiWrite)
{
if(EXPREGS[0]&0x40)
{
if(EXPREGS[0]&0x30)
unromchr=0;
else
{
unromchr=V&3;
FixMMC3CHR(MMC3_cmd);
}
}
else
{
if((A==0x8001)&&(EXPREGS[3]&2)&&(MMC3_cmd&8))
{
EXPREGS[4|(MMC3_cmd&3)]=V;
FixMMC3PRG(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
}
else
if(A<0xC000) {
if(UNIFchrrama) { // hacky... strange behaviour, must be bit scramble due to pcb layot restrictions
// check if it not interfer with other dumps
if((A==0x8000)&&(V==0x46))
V=0x47;
else if((A==0x8000)&&(V==0x47))
V=0x46;
}
MMC3_CMDWrite(A,V);
FixMMC3PRG(MMC3_cmd);
}
else
MMC3_IRQWrite(A,V);
}
}
static void Super24Reset(CartInfo *info)
{
GameHBIRQHook=Sup24_hb;
IRQCount=IRQLatch=IRQa=resetmode=0;
sizer=0x24;
bigbank=159;
bigbank2=0;
MMC3_cmd=0;
DRegBuf[6]=0;
DRegBuf[7]=1;
FixMMC3PRG(0);
FixMMC3CHR(0);
}
static void Super24Reset(void)
{
SetWriteHandler(0x8000,0xBFFF,Super24hiwrite);
SetWriteHandler(0x5000,0x7FFF,Super24Write);
SetWriteHandler(0xC000,0xFFFF,Sup24IRQWrite);
SetReadHandler(0x8000,0xFFFF,CartBR);
GameHBIRQHook=Sup24_hb;
IRQCount=IRQLatch=IRQa=resetmode=0;
sizer=0x24;
bigbank=159;
bigbank2=0;
MMC3_cmd=0;
DRegBuf[6]=0;
DRegBuf[7]=1;
FixMMC3PRG(0);
FixMMC3CHR(0);
}
static DECLFW(Super24hiwrite)
{
//printf("$%04x:$%02x, %d\n",A,V,scanline);
switch(A&0xE001)
{
case 0x8000:
if((V&0x40) != (MMC3_cmd&0x40))
FixMMC3PRG(V);
if((V&0x80) != (MMC3_cmd&0x80))
FixMMC3CHR(V);
MMC3_cmd = V;
break;
case 0x8001:
{
int cbase=(MMC3_cmd&0x80)<<5;
DRegBuf[MMC3_cmd&0x7]=V;
switch(MMC3_cmd&0x07)
{
case 0: V>>=1;swsetchr2((cbase^0x000),V);break;
case 1: V>>=1;swsetchr2((cbase^0x800),V);break;
case 2: swsetchr1(cbase^0x1000,V); break;
case 3: swsetchr1(cbase^0x1400,V); break;
case 4: swsetchr1(cbase^0x1800,V); break;
case 5: swsetchr1(cbase^0x1C00,V); break;
case 6: if (MMC3_cmd&0x40) swsetprg8(0xC000,V);
else swsetprg8(0x8000,V);
break;
case 7: swsetprg8(0xA000,V);
break;
}
}
break;
case 0xA000:
mbia=V;
setmirror((V&1)^1);
break;
}
}
static int StateAction(StateMem *sm, int load, int data_only)
{
SFORMAT StateRegs[] =
{
SFARRAYN(CHRRAM, 8192, "CHRR"),
SFARRAYN(DRegBuf, 8, "DREG"),
SFVARN(IRQCount, "IRQC"),
SFVARN(IRQLatch, "IQL1"),
SFVARN(IRQa, "IRQA"),
SFVARN(sizer, "SIZA"),
SFVARN(bigbank, "BIG1"),
SFVARN(bigbank2, "BIG2"),
SFEND
};
int ret = MDFNSS_StateAction(sm, load, data_only, StateRegs, "MAPR");
if(load)
{
FixMMC3PRG(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
setmirror((mbia & 1) ^ 1);
}
return(ret);
}
static DECLFW(UNLA9711WriteLo)
{
FCEU_printf("bs %04x %02x\n",A,V);
EXPREGS[0]=V;
FixMMC3PRG(MMC3_cmd);
}
void GenMMC3Restore(int version) {
FixMMC3PRG(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
}
static void MrRestore(int version)
{
FixMMC3PRG(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
setmirror((mbia&1)^1);
}
static DECLFW(BMCF15Write) {
if (A001B & 0x80) {
EXPREGS[0] = V & 0xF;
FixMMC3PRG(MMC3_cmd);
}
}
void GenMMC3Restore(int version)
{
if(mwrap) mwrap(A000B);
FixMMC3PRG(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
}
