static void omap4_tuna_init_hw_rev(void)
{
int ret;
int i;
u32 r;
/* Disable weak driver pulldown on usbb2_hsic_strobe */
r = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_USBB_HSIC);
r &= ~OMAP4_USBB2_HSIC_STROBE_WD_MASK;
omap4_ctrl_pad_writel(r, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_USBB_HSIC);
ret = gpio_request_array(tuna_hw_rev_gpios,
ARRAY_SIZE(tuna_hw_rev_gpios));
BUG_ON(ret);
for (i = 0; i < ARRAY_SIZE(tuna_hw_rev_gpios); i++)
tuna_hw_rev |= gpio_get_value(tuna_hw_rev_gpios[i].gpio) << i;
snprintf(omap4_tuna_bd_info_string,
ARRAY_SIZE(omap4_tuna_bd_info_string),
"Tuna HW revision: %02x (%s), cpu %s ES%d.%d ",
tuna_hw_rev,
omap4_tuna_hw_rev_name(),
cpu_is_omap443x() ? "OMAP4430" : "OMAP4460",
(GET_OMAP_REVISION() >> 4) & 0xf,
GET_OMAP_REVISION() & 0xf);
pr_info("%s\n", omap4_tuna_bd_info_string);
mach_panic_string = omap4_tuna_bd_info_string;
}
static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
{
/* platforms which support all ECC schemes */
if (soc_is_am33xx() || soc_is_am43xx() || cpu_is_omap44xx() ||
soc_is_omap54xx() || soc_is_dra7xx())
return 1;
if (ecc_opt == OMAP_ECC_BCH4_CODE_HW_DETECTION_SW ||
ecc_opt == OMAP_ECC_BCH8_CODE_HW_DETECTION_SW) {
if (cpu_is_omap24xx())
return 0;
else if (cpu_is_omap3630() && (GET_OMAP_REVISION() == 0))
return 0;
else
return 1;
}
/* OMAP3xxx do not have ELM engine, so cannot support ECC schemes
* which require H/W based ECC error detection */
if ((cpu_is_omap34xx() || cpu_is_omap3630()) &&
((ecc_opt == OMAP_ECC_BCH4_CODE_HW) ||
(ecc_opt == OMAP_ECC_BCH8_CODE_HW)))
return 0;
/* legacy platforms support only HAM1 (1-bit Hamming) ECC scheme */
if (ecc_opt == OMAP_ECC_HAM1_CODE_HW ||
ecc_opt == OMAP_ECC_HAM1_CODE_SW)
return 1;
else
return 0;
}
/**
* iommu_get - Get iommu handler
* @name: target iommu name
**/
struct iommu *iommu_get(const char *name)
{
int err = -ENOMEM;
struct device *dev;
struct iommu *obj;
int rev;
dev = driver_find_device(&omap_iommu_driver.driver, NULL, (void *)name,
device_match_by_alias);
if (!dev)
return ERR_PTR(-ENODEV);
obj = to_iommu(dev);
mutex_lock(&obj->iommu_lock);
if (obj->refcount++ == 0) {
err = iommu_enable(obj);
if (err)
goto err_enable;
if (!strcmp(obj->name, "ducati")) {
rev = GET_OMAP_REVISION();
if (rev == 0x0)
iommu_set_twl(obj, false);
}
flush_iotlb_all(obj);
}
if (!try_module_get(obj->owner))
goto err_module;
mutex_unlock(&obj->iommu_lock);
dev_dbg(obj->dev, "%s: %s\n", __func__, obj->name);
return obj;
err_module:
if (obj->refcount == 1)
iommu_disable(obj);
err_enable:
obj->refcount--;
mutex_unlock(&obj->iommu_lock);
return ERR_PTR(err);
}
static int __init omap_init_drm(void)
{
struct omap_hwmod *oh = NULL;
struct platform_device *pdev;
/* lookup and populate the DMM information, if present - OMAP4+ */
oh = omap_hwmod_lookup("dmm");
if (oh) {
pdev = omap_device_build(oh->name, -1, oh, NULL, 0, NULL, 0,
false);
WARN(IS_ERR(pdev), "Could not build omap_device for %s\n",
oh->name);
}
platform_data.omaprev = GET_OMAP_REVISION();
return platform_device_register(&omap_drm_device);
}
static ssize_t omap4_soc_revision_show(struct kobject *kobj,
struct kobj_attribute *attr, char *buf)
{
return sprintf(buf, "ES%d.%d\n", (GET_OMAP_REVISION() >> 4) & 0xf,
GET_OMAP_REVISION() & 0xf);
}