Exemple #1
0
//@board schematic: m3_skt_v1.pdf
//@pinmax: AppNote-M3-CorePinMux.xlsx
//GPIOA_26 used to set VCCX2_EN: 0 to enable power and 1 to disable power
static void gpio_set_vbus_power(char is_power_on)
{
#if 0
	if(is_power_on)
	{
		//@WA-AML8726-M3_REF_V1.0.pdf
	    //GPIOA_26 -- VCCX2_EN
		set_gpio_mode(GPIOA_bank_bit0_27(26), GPIOA_bit_bit0_27(26), GPIO_OUTPUT_MODE);
		set_gpio_val(GPIOA_bank_bit0_27(26), GPIOA_bit_bit0_27(26), 0);
	
		//@WA-AML8726-M3_REF_V1.0.pdf
		//GPIOD_9 -- USB_PWR_CTL
		set_gpio_mode(GPIOD_bank_bit0_9(9), GPIOD_bit_bit0_9(9), GPIO_OUTPUT_MODE);
		set_gpio_val(GPIOD_bank_bit0_9(9), GPIOD_bit_bit0_9(9), 1);
		
		udelay(100000);
	}
	else
	{
		set_gpio_mode(GPIOD_bank_bit0_9(9), GPIOD_bit_bit0_9(9), GPIO_OUTPUT_MODE);
		set_gpio_val(GPIOD_bank_bit0_9(9), GPIOD_bit_bit0_9(9), 0);

		set_gpio_mode(GPIOA_bank_bit0_27(26), GPIOA_bit_bit0_27(26), GPIO_OUTPUT_MODE);
		set_gpio_val(GPIOA_bank_bit0_27(26), GPIOA_bit_bit0_27(26), 1);		
	}
#endif	
}
//#define NET_EXT_CLK 1
static void __init eth_pinmux_init(void)
{
	
   CLEAR_CBUS_REG_MASK(PERIPHS_PIN_MUX_6,(3<<17));//reg6[17/18]=0
   #ifdef NET_EXT_CLK
       eth_set_pinmux(ETH_BANK0_GPIOY1_Y9, ETH_CLK_IN_GPIOY0_REG6_18, 0);
   #else
       eth_set_pinmux(ETH_BANK0_GPIOY1_Y9, ETH_CLK_OUT_GPIOY0_REG6_17, 0);
   #endif
	
    //power hold
    //setbits_le32(P_PREG_AGPIO_O,(1<<8));
    //clrbits_le32(P_PREG_AGPIO_EN_N,(1<<8));
    //set_gpio_mode(GPIOA_bank_bit(4),GPIOA_bit_bit0_14(4),GPIO_OUTPUT_MODE);
    //set_gpio_val(GPIOA_bank_bit(4),GPIOA_bit_bit0_14(4),1);

    CLEAR_CBUS_REG_MASK(PREG_ETHERNET_ADDR0, 1);           // Disable the Ethernet clocks
	// ---------------------------------------------
	// Test 50Mhz Input Divide by 2
	// ---------------------------------------------
	// Select divide by 2
    CLEAR_CBUS_REG_MASK(PREG_ETHERNET_ADDR0, (1<<3));     // desc endianess "same order" 
    CLEAR_CBUS_REG_MASK(PREG_ETHERNET_ADDR0, (1<<2));     // ata endianess "little"
    SET_CBUS_REG_MASK(PREG_ETHERNET_ADDR0, (1 << 1));     // divide by 2 for 100M
    SET_CBUS_REG_MASK(PREG_ETHERNET_ADDR0, 1);            // enable Ethernet clocks
    udelay(100);

    // ethernet reset
    set_gpio_mode(GPIOD_bank_bit0_9(7), GPIOD_bit_bit0_9(7), GPIO_OUTPUT_MODE);
    set_gpio_val(GPIOD_bank_bit0_9(7), GPIOD_bit_bit0_9(7), 0);
    mdelay(100);
    set_gpio_val(GPIOD_bank_bit0_9(7), GPIOD_bit_bit0_9(7), 1);
}
Exemple #3
0
//@board schematic: m3_skt_v1.pdf
//@pinmax: AppNote-M3-CorePinMux.xlsx
//GPIOA_26 used to set VCCX2_EN: 0 to enable power and 1 to disable power
static void gpio_set_vbus_power(char is_power_on)
{
	if(is_power_on)
	{
		set_gpio_mode(GPIOD_bank_bit0_9(9), GPIOD_bit_bit0_9(9), GPIO_OUTPUT_MODE);
		set_gpio_val(GPIOD_bank_bit0_9(9), GPIOD_bit_bit0_9(9), 1);
		udelay(100000);
	}
	else
	{
		set_gpio_mode(GPIOD_bank_bit0_9(9), GPIOD_bit_bit0_9(9), GPIO_OUTPUT_MODE);
		set_gpio_val(GPIOD_bank_bit0_9(9), GPIOD_bit_bit0_9(9), 0);
	}
}
int board_eth_init(bd_t *bis)
{
	unsigned v;
	
	CLEAR_CBUS_REG_MASK(PERIPHS_PIN_MUX_6,(3<<17));//reg6[17/18]=0
#ifdef CONFIG_NET_CLK_EXTERNAL
	//rmii 50 in
	//set clock
    eth_clk_set_invert(7,50*CLK_1M,50*CLK_1M);
  eth_set_pinmux(ETH_BANK0_GPIOY1_Y9, ETH_CLK_IN_GPIOY0_REG6_18, 0);
#else
	/* Use Misc PLL for the source of ethernet */
	eth_clk_set(ETH_CLKSRC_MISC_CLK, get_misc_pll_clk(), (50 * CLK_1M));
	/* Use Internal clock output from GPIOY0*/
	eth_set_pinmux(ETH_BANK0_GPIOY1_Y9, ETH_CLK_OUT_GPIOY0_REG6_17, 0);
#endif //CONFIG_NET_CLK_EXTERNAL
	
	/*disalbe*/
	//reset:LCD_G5
	writel(readl(ETH_PLL_CNTL) & ~(1 << 0), ETH_PLL_CNTL); // Disable the Ethernet clocks     
	// ---------------------------------------------
	// Test 50Mhz Input Divide by 2
	// ---------------------------------------------
	// Select divide by 2
	writel(readl(ETH_PLL_CNTL) | (0 << 3), ETH_PLL_CNTL); // desc endianess "same order"   
	writel(readl(ETH_PLL_CNTL) | (0 << 2), ETH_PLL_CNTL); // data endianess "little"    
	writel(readl(ETH_PLL_CNTL) | (1 << 1), ETH_PLL_CNTL); // divide by 2 for 100M     
	writel(readl(ETH_PLL_CNTL) | (1 << 0), ETH_PLL_CNTL);  // enable Ethernet clocks   
	udelay(100);

	/* reset phy with GPIOD_7*/
	set_gpio_mode(GPIOD_bank_bit0_9(7), GPIOD_bit_bit0_9(7), GPIO_OUTPUT_MODE);
	set_gpio_val(GPIOD_bank_bit0_9(7), GPIOD_bit_bit0_9(7), 0);
	udelay(2000);    
	set_gpio_val(GPIOD_bank_bit0_9(7), GPIOD_bit_bit0_9(7), 1);
	udelay(2000);	//waiting reset end;
	
	/* reset phy with GPIOAO_6*/
/*	v = ~((1<<6)|(1<22));
	writel(v,0xC81000024);
	udelay(2000);   
	v |= (1<22);
	writel(v,0xC81000024);
	udelay(2000);	//waiting reset end;
	*/
    aml_eth_init(bis);
    return 0;
}
static void __init power_hold(void)
{
    printk(KERN_INFO "power hold set high!\n");
  //  set_gpio_val(GPIOAO_bank_bit0_11(6), GPIOAO_bit_bit0_11(6), 1);
  //  set_gpio_mode(GPIOAO_bank_bit0_11(6), GPIOAO_bit_bit0_11(6), GPIO_OUTPUT_MODE);

        // VCC5V
        set_gpio_mode(GPIOD_bank_bit0_9(9), GPIOD_bit_bit0_9(9), GPIO_OUTPUT_MODE);
        set_gpio_val(GPIOD_bank_bit0_9(9), GPIOD_bit_bit0_9(9), 1);
		 // hdmi power on
        set_gpio_mode(GPIOD_bank_bit0_9(6), GPIOD_bit_bit0_9(6), GPIO_OUTPUT_MODE);
        set_gpio_val(GPIOD_bank_bit0_9(6), GPIOD_bit_bit0_9(6), 1);

		// MUTE
       set_gpio_mode(GPIOX_bank_bit0_31(29), GPIOX_bit_bit0_31(29), GPIO_OUTPUT_MODE);
       set_gpio_val(GPIOX_bank_bit0_31(29), GPIOX_bit_bit0_31(29), 0);

      // PC Link
//       set_gpio_mode(GPIOC_bank_bit0_15(4), GPIOC_bit_bit0_15(4), GPIO_OUTPUT_MODE);
//       set_gpio_val(GPIOC_bank_bit0_15(4), GPIOC_bit_bit0_15(4), 1);
			 
		// VCC, set to high when suspend 
        set_gpio_mode(GPIOAO_bank_bit0_11(4), GPIOAO_bit_bit0_11(4), GPIO_OUTPUT_MODE);
        set_gpio_val(GPIOAO_bank_bit0_11(4), GPIOAO_bit_bit0_11(4), 0);
        set_gpio_mode(GPIOAO_bank_bit0_11(5), GPIOAO_bit_bit0_11(5), GPIO_OUTPUT_MODE);
        set_gpio_val(GPIOAO_bank_bit0_11(5), GPIOAO_bit_bit0_11(5), 0);

     // VCCK
        set_gpio_mode(GPIOAO_bank_bit0_11(6), GPIOAO_bit_bit0_11(6), GPIO_OUTPUT_MODE);
        set_gpio_val(GPIOAO_bank_bit0_11(6), GPIOAO_bit_bit0_11(6), 1);
	 // VCCIO
        set_gpio_mode(GPIOAO_bank_bit0_11(2), GPIOAO_bit_bit0_11(2), GPIO_OUTPUT_MODE);
        set_gpio_val(GPIOAO_bank_bit0_11(2), GPIOAO_bit_bit0_11(2), 1);

    //init sata
    set_gpio_mode(GPIOC_bank_bit0_15(7), GPIOC_bit_bit0_15(7), GPIO_OUTPUT_MODE);
    set_gpio_val(GPIOC_bank_bit0_15(7), GPIOC_bit_bit0_15(7), 1);
		
    //VCCx2 power up
    printk(KERN_INFO "set_vccx2 power up\n");
//    set_gpio_mode(GPIOA_bank_bit0_27(26), GPIOA_bit_bit0_27(26), GPIO_OUTPUT_MODE);
//    set_gpio_val(GPIOA_bank_bit0_27(26), GPIOA_bit_bit0_27(26), 0);
}
static inline int _gpio_setup_bank_bit(cmd_t  *op)
{
    switch (op->bank) {
    case 'a': //bank a
        op->bank = GPIOA_bank_bit0_27(0);
        if (op->bit < 28) { //bit0..27
            op->bit = GPIOA_bit_bit0_27(op->bit);
        } else {
            return -1;
        }
        break;
    case 'b': //bank b
        op->bank = GPIOB_bank_bit0_23(0);
        if (op->bit < 24) { //bit0..23
            op->bit = GPIOB_bit_bit0_23(op->bit);
        } else {
            return -1;
        }
        break;
    case 'c': //bank c
        op->bank = GPIOC_bank_bit0_15(0);
        if (op->bit < 16) { //bit0..15
            op->bit = GPIOC_bit_bit0_15(op->bit);
        } else {
            return -1;
        }
        break;
    case 'd': //bank d
        op->bank = GPIOD_bank_bit0_9(0);
        if (op->bit < 10) { //bit0..9
            op->bit = GPIOD_bit_bit0_9(op->bit);
        } else {
            return -1;
        }
        break;
    case 'x': //bank x
        if (op->bit < 32) { //bit0..31 ,bit no change .
            op->bank = GPIOX_bank_bit0_31(0); //bit 0..15 16..21 share one bank
		} else if (op->bit <36) { //bit 32..35
            op->bank = GPIOX_bank_bit32_35(0);
			op->bit = GPIOX_bit_bit32_35(op->bit);
		} else {
            return -1;
        }
        break;
    case 'y': //bank y
        if (op->bit < 23) { //bit0..22 ,bit no change .
            op->bank = GPIOY_bank_bit0_22(0); //bit 0..15 16..21 share one bank
		} else {
            return -1;
        }
        break;
    case 'o': //bank ao
        if (op->bit < 12) { //bit0..11 ,bit no change .
            op->bank = GPIOAO_bank_bit0_11(0); //bit 0..11
	    op->bit  = GPIOAO_bit_bit0_11(op->bit);
		} else {
            return -1;
        }
        break;
	/* FIXME AO/BOOT/CARD GPIO can not controle todo */
    default:
	printk("GPIO, invalid selection.\n");
	return -1;
    }
    return 0;
}
	int inverse_flag;
} device_power_t;

#define DEF_DEVICE_POWER(name_param, gpio_bank_param, gpio_bit_param, inverse_flag_param) \
{ \
	.name = (name_param), \
	.gpio_bank = (gpio_bank_param), \
	.gpio_bit = (gpio_bit_param), \
	.inverse_flag = (inverse_flag_param), \
} 

static device_power_t devices_power[] = {
	DEF_DEVICE_POWER("VCCX2_EN", GPIOA_bank_bit0_27(26), GPIOA_bit_bit0_27(26), 1),
	DEF_DEVICE_POWER("VCCX3_EN", GPIOC_bank_bit0_15(2), GPIOC_bit_bit0_15(2), 0),
	DEF_DEVICE_POWER("LCD_POWER_EN", GPIOA_bank_bit0_27(27), GPIOA_bit_bit0_27(27), 1),
	DEF_DEVICE_POWER("BL_EN", GPIOD_bank_bit0_9(1), GPIOD_bit_bit0_9(1), 0),
	DEF_DEVICE_POWER("CARD_EN", GPIOCARD_bank_bit0_8(8), GPIOCARD_bit_bit0_8(8), 1),
	DEF_DEVICE_POWER("USB_PWR_CTRL", GPIOD_bank_bit0_9(9), GPIOD_bit_bit0_9(9), 0),
	DEF_DEVICE_POWER("SPK", GPIOC_bank_bit0_15(4), GPIOC_bit_bit0_15(4), 0),
	DEF_DEVICE_POWER("CAP_TP_EN", GPIOC_bank_bit0_15(3), GPIOC_bit_bit0_15(3), 0),
	DEF_DEVICE_POWER("WIFI_PWREN", GPIOC_bank_bit0_15(8), GPIOC_bit_bit0_15(8), 0),
	DEF_DEVICE_POWER("WL_RST_N", GPIOC_bank_bit0_15(7), GPIOC_bit_bit0_15(7), 0),
	DEF_DEVICE_POWER("BT_RST_N", GPIOC_bank_bit0_15(6), GPIOC_bit_bit0_15(6), 0),
	DEF_DEVICE_POWER("GPS_RSTN", GPIOC_bank_bit0_15(5), GPIOC_bit_bit0_15(5), 0),
};	

static int get_dev_power_state(char* info_buf)
{
	int dev_num = sizeof(devices_power)/sizeof(device_power_t);
	int power_state = 0;
	int i;
void HDMI_power_on()
{
        set_gpio_mode(GPIOD_bank_bit0_9(6), GPIOD_bit_bit0_9(6), GPIO_OUTPUT_MODE);
        set_gpio_val(GPIOD_bank_bit0_9(6), GPIOD_bit_bit0_9(6), 1);
		 hdmi_print(1, "HDMI power on...\n");
}
static struct resource mxl101_resource[]  = {

	[0] = {
		.start = 0,                                    //frontend  i2c adapter id
		.end   = 0,
		.flags = IORESOURCE_MEM,
		.name  = "frontend0_i2c"
	},
	[1] = {
		.start = 0xc0,                                 //frontend 0 demod address
		.end   = 0xc0,
		.flags = IORESOURCE_MEM,
		.name  = "frontend0_demod_addr"
	},
	[2] = {
		.start = (GPIOD_bank_bit0_9(8)<<16)|GPIOD_bit_bit0_9(8), //reset pin
		.end   = (GPIOD_bank_bit0_9(8)<<16)|GPIOD_bit_bit0_9(8),
		.flags = IORESOURCE_MEM,
		.name  = "frontend0_reset_pin"
	},
	[3] = {
		.start = 0, //reset enable value
		.end   = 0,
		.flags = IORESOURCE_MEM,
		.name  = "frontend0_reset_value_enable"
	},
	[4] = {
		.start = (GPIOC_bank_bit0_15(3)<<16)|GPIOC_bit_bit0_15(3),  //power enable pin
		.end   = (GPIOC_bank_bit0_15(3)<<16)|GPIOC_bit_bit0_15(3),
		.flags = IORESOURCE_MEM,
		.name  = "frontend0_reset"
#endif

#if defined(CONFIG_SUSPEND)

typedef struct {
	char name[32];
	unsigned bank;
	unsigned bit;
	gpio_mode_t mode;
	unsigned value;
	unsigned enable;
} gpio_data_t;

#define MAX_GPIO 3
static gpio_data_t gpio_data[MAX_GPIO] = {
{"GPIOD6--HDMI", 	GPIOD_bank_bit0_9(6), 	GPIOD_bit_bit0_9(6), 	GPIO_OUTPUT_MODE, 1, 1},
{"GPIOD9--VCC5V", GPIOD_bank_bit0_9(9), 	GPIOD_bit_bit0_9(9), 	GPIO_OUTPUT_MODE, 1, 1},
{"GPIOX29--MUTE", 	GPIOX_bank_bit0_31(29), GPIOX_bit_bit0_31(29), GPIO_OUTPUT_MODE, 1, 1},
{"GPIOC7--SATA", 	GPIOC_bank_bit0_15(7), GPIOC_bit_bit0_15(7), GPIO_OUTPUT_MODE, 1, 1},
};	

static void save_gpio(int port) 
{
	gpio_data[port].mode = get_gpio_mode(gpio_data[port].bank, gpio_data[port].bit);
	if (gpio_data[port].mode==GPIO_OUTPUT_MODE)
	{
		if (gpio_data[port].enable){
			printk("change %s output %d to input\n", gpio_data[port].name, gpio_data[port].value); 
			gpio_data[port].value = get_gpio_val(gpio_data[port].bank, gpio_data[port].bit);
			set_gpio_mode(gpio_data[port].bank, gpio_data[port].bit, GPIO_INPUT_MODE);
		}