void Buttons_Init(void) { /* Enable GPIO in CMU */ CMU_ClockEnable(cmuClock_GPIO, true); /* Initialize ODD and EVEN GPIO interrupts dispatcher */ GPIOINT_Init(); GPIOINT_CallbackRegister(BTN0, buttonCallback); GPIOINT_CallbackRegister(BTN1, buttonCallback); GPIOINT_CallbackRegister(BTN2, buttonCallback); GPIOINT_CallbackRegister(BTN3, buttonCallback); GPIOINT_CallbackRegister(BTN4, buttonCallback); Bitless_GpioSetup(); }
__LINK_C error_t hw_gpio_configure_interrupt(pin_id_t pin_id, gpio_inthandler_t callback, uint8_t event_mask) { if(interrupts[pin_id.pin].interrupt_port != pin_id.port) return EOFF; else if(callback == 0x0 || event_mask > (GPIO_RISING_EDGE | GPIO_FALLING_EDGE)) return EINVAL; error_t err; start_atomic(); //do this check atomically: interrupts[..] callback is altered by this function //so the check belongs in the critical section as well if(interrupts[pin_id.pin].callback != 0x0 && interrupts[pin_id.pin].callback != callback) err = EBUSY; else { interrupts[pin_id.pin].callback = callback; GPIOINT_CallbackRegister(pin_id.pin, &gpio_int_callback); GPIO_IntConfig(pin_id.port, pin_id.pin, !!(event_mask & GPIO_RISING_EDGE), !!(event_mask & GPIO_FALLING_EDGE), false); err = SUCCESS; } end_atomic(); return err; }
/*============================================================================== hal_extIntInit() =============================================================================*/ uint8_t hal_extIntInit(en_targetExtInt_t e_intSource, pfn_intCallb_t pfn_intCallback) { int8_t c_ret = 0; s_hal_gpio_pin_t* p_gpioPin = NULL; if( pfn_intCallback != NULL ) { /* Initialize GPIO interrupt dispatcher */ GPIOINT_Init(); switch( e_intSource ){ case E_TARGET_RADIO_INT: pf_hal_radioCb = pfn_intCallback; p_gpioPin = &s_hal_gpio[e_hal_gpios_rf_irq]; /* configure pin */ GPIO_PinModeSet( p_gpioPin->port, p_gpioPin->pin, p_gpioPin->mode, p_gpioPin->val ); /* Register callbacks before setting up and enabling pin interrupt. */ GPIOINT_CallbackRegister( p_gpioPin->pin, _hal_radioCb ); /* Set falling edge interrupt */ GPIO_IntConfig( p_gpioPin->port, p_gpioPin->pin, true, false, true ); c_ret = 1; break; case E_TARGET_USART_INT: break; default: break; } } return c_ret; } /* hal_extIntInit() */
/** * Configures the EZRadio GPIO port and pins * * @param[in] ezradioIrqCallback EZRadio interrupt callback configuration * @param[in] enablePTI If true enables the radio PTI bridge in the controller. */ void ezradio_hal_GpioInit( GPIOINT_IrqCallbackPtr_t ezradioIrqCallback, bool enablePTI ) { #if defined(_EZR32_HAPPY_FAMILY) (void)enablePTI; #endif #if !defined(EZRADIODRV_SPI_4WIRE_MODE) GPIO_PinModeSet( (GPIO_Port_TypeDef) RF_USARTRF_CS_PORT, RF_USARTRF_CS_PIN, gpioModePushPull, 1 ); #endif /* Setup enable and interrupt pins to radio */ GPIO_PinModeSet( (GPIO_Port_TypeDef) RF_SDN_PORT, RF_SDN_PIN, gpioModePushPull, 0 ); GPIO_PinModeSet( (GPIO_Port_TypeDef) RF_INT_PORT, RF_INT_PIN, gpioModeInputPull, 1 ); /* EZR32HG family uses hard wired PTI interface from the radio to the board controller */ #if ( !defined(_EZR32_HAPPY_FAMILY) && !defined(EZRADIODRV_DISABLE_PTI) ) if (enablePTI) { /* Setup PRS for PTI pins */ CMU_ClockEnable(cmuClock_PRS, true); /* Configure RF_GPIO0 and RF_GPIO1 to inputs. */ GPIO_PinModeSet((GPIO_Port_TypeDef)RF_GPIO0_PORT, RF_GPIO0_PIN, gpioModeInput, 0); GPIO_PinModeSet((GPIO_Port_TypeDef)RF_GPIO1_PORT, RF_GPIO1_PIN, gpioModeInput, 0); /* Pin PA0 and PA1 output the GPIO0 and GPIO1 via PRS to PTI */ GPIO_PinModeSet(gpioPortA, 0, gpioModePushPull, 0); GPIO_PinModeSet(gpioPortA, 1, gpioModePushPull, 0); /* Disable INT for PRS channels */ GPIO_IntConfig((GPIO_Port_TypeDef)RF_GPIO0_PORT, RF_GPIO0_PIN, false, false, false); GPIO_IntConfig((GPIO_Port_TypeDef)RF_GPIO1_PORT, RF_GPIO1_PIN, false, false, false); /* Setup PRS for RF GPIO pins */ PRS_SourceAsyncSignalSet(0, PRS_CH_CTRL_SOURCESEL_GPIOH, PRS_CH_CTRL_SIGSEL_GPIOPIN15); PRS_SourceAsyncSignalSet(1, PRS_CH_CTRL_SOURCESEL_GPIOH, PRS_CH_CTRL_SIGSEL_GPIOPIN14); PRS->ROUTE = (PRS_ROUTE_CH0PEN | PRS_ROUTE_CH1PEN); /* Make sure PRS sensing is enabled (should be by default) */ GPIO_InputSenseSet(GPIO_INSENSE_PRS, GPIO_INSENSE_PRS); } #endif //#if !defined(_EZR32_HAPPY_FAMILY) #if defined(EZRADIODRV_DISABLE_PTI) && defined(EZRADIODRV_COMM_USE_GPIO1_FOR_CTS) //Enable GPIO1 for CTS input GPIO_PinModeSet((GPIO_Port_TypeDef)RF_GPIO1_PORT, RF_GPIO1_PIN, gpioModeInput, 0); #endif if (NULL != ezradioIrqCallback) { /* Register callback and enable interrupt */ GPIOINT_CallbackRegister( RF_INT_PIN, ezradioIrqCallback ); GPIO_IntConfig( (GPIO_Port_TypeDef) RF_INT_PORT, RF_INT_PIN, false, true, true ); } }
/**************************************************************************//** * @brief Gpio setup. Setup button pins to trigger falling edge interrupts. * Register callbacks for that interrupts. *****************************************************************************/ void gpioSetup(void) { /* Enable GPIO in CMU */ CMU_ClockEnable(cmuClock_GPIO, true); /* Initialize GPIO interrupt dispatcher */ GPIOINT_Init(); /* Configure PB9 and PB10 as input */ GPIO_PinModeSet(gpioPortB, 9, gpioModeInput, 0); GPIO_PinModeSet(gpioPortB, 10, gpioModeInput, 0); /* Register callbacks before setting up and enabling pin interrupt. */ GPIOINT_CallbackRegister(9, gpioCallback); GPIOINT_CallbackRegister(10, gpioCallback); /* Set falling edge interrupt for both ports */ GPIO_IntConfig(gpioPortB, 9, false, true, true); GPIO_IntConfig(gpioPortB, 10, false, true, true); }
/** @brief Configure and enable/disable the device interrupt IRQ */ static void halExtDeviceIntCfgIrq(void) { /* Configure nIRQ signal to trigger Port Pin ISR */ GPIO_PinModeSet((GPIO_Port_TypeDef) RF_INT_PORT, RF_INT_PIN, gpioModeInput, 1u); GPIO_InputSenseSet(GPIO_INSENSE_INT, GPIO_INSENSE_INT); GPIOINT_CallbackRegister(RF_INT_PIN, halIrqxIsr); GPIO_IntConfig((GPIO_Port_TypeDef) RF_INT_PORT, RF_INT_PIN, false, true, true); if (halExtDeviceIntCB == NULL) { halExtDeviceIntLevel = EXT_DEVICE_INT_UNCONFIGURED; } else { halExtDeviceIntLevel = EXT_DEVICE_INT_LEVEL_OFF; // Callers need to use halExtDeviceIntEnable() to enable top level } }