void gpio_bbb_drv::pinMode (uint8_t gpio, uint16_t mode) {
if (gpio >= GPIO_COUNT) {
throw gpio_exception("GPIO number out of range, ", EINVAL);
}
int ret = ioctl(_fd, IOCTL_PIN_MODE, GPIO_DATA(gpio, mode));
if (ret < 0) {
throw gpio_exception("Error in pinMode, ", ret);
}
}
void gpio_bbb_drv::attachInterrupt (uint8_t gpio, void (*f)(uint8_t gpio), uint16_t mode) {
if (gpio >= GPIO_COUNT) {
throw gpio_exception("GPIO number out of range, ", EINVAL);
}
int ret = ioctl(_fd, IOCTL_ATTACH_INTERRUPT, GPIO_DATA(gpio, mode));
if (ret < 0) {
throw gpio_exception("Error in attachInterrupt, ", ret);
}
usrHandler[gpio] = f;
enableInterrupt(gpio);
}
void gpio_clear(u32 gpioport, u8 gpios)
{
GPIO_DATA(gpioport)[gpios] = 0;
}
void gpio_set(u32 gpioport, u8 gpios)
{
/* ipaddr[9:2] mask the bits to be set, hence the array index */
GPIO_DATA(gpioport)[gpios] = 0xff;
}
.flags = IORESOURCE_IRQ, \
}
#define GPIO_DEVICE(block) \
{ \
.name = "gpio", \
.id = block, \
.num_resources = 3, \
.resource = &u8500_gpio_resources[block * 3], \
.dev = { \
.platform_data = &u8500_gpio_data[block], \
}, \
}
static struct nmk_gpio_platform_data u8500_gpio_data[] = {
GPIO_DATA("GPIO-0-31", 0, 32),
GPIO_DATA("GPIO-32-63", 32, 5), /* 37..63 not routed to pin */
GPIO_DATA("GPIO-64-95", 64, 32),
GPIO_DATA("GPIO-96-127", 96, 2), /* 98..127 not routed to pin */
GPIO_DATA("GPIO-128-159", 128, 32),
GPIO_DATA("GPIO-160-191", 160, 12), /* 172..191 not routed to pin */
GPIO_DATA("GPIO-192-223", 192, 32),
GPIO_DATA("GPIO-224-255", 224, 7), /* 231..255 not routed to pin */
GPIO_DATA("GPIO-256-288", 256, 12), /* 268..288 not routed to pin */
};
static struct resource u8500_gpio_resources[] = {
GPIO_RESOURCE(0),
GPIO_RESOURCE(1),
GPIO_RESOURCE(2),
GPIO_RESOURCE(3),
/**
* \brief Toggle a Group of Pins
*
* Toggle one or more pins of the given GPIO port.
*
* @param[in] gpioport GPIO block register address base @ref gpio_reg_base
* @param[in] gpios Pin identifiers. @ref gpio_pin_id
*/
void gpio_toggle(uint32_t gpioport, uint8_t gpios)
{
/* The mask makes sure we only toggle the GPIOs we want to */
GPIO_DATA(gpioport)[gpios] ^= GPIO_ALL;
}
/* config modem pintrl status */
void pintrl_config(struct pintrl_stru *iocfg_stru, unsigned int length)
{
unsigned int i;
unsigned int uregv, value, value1, addr, addr1;
if(NULL == iocfg_stru || (0 == length))
{
return;
}
for (i = 0; i < length; i++) {
//pintrl_data_convert(&iocfg_stru, &(iocfg_table[i]));
uregv = ((iocfg_stru[i].ugpiog << 3) + iocfg_stru[i].ugpio_bit);
/* set iomg register */
if (0xfff != iocfg_stru[i].uiomg_off) {
value = iocfg_stru[i].iomg_val;
if (uregv <= 164) {
addr = HI_PINTRL_REG_ADDR + (iocfg_stru[i].uiomg_off);
} else {
addr = HI_PINTRL_SYS_REG_ADDR + (iocfg_stru[i].uiomg_off);
}
writel(value, addr);
}
/* set iocg register */
if (uregv <= 164) {
addr = HI_PINTRL_REG_ADDR + 0x800 + (iocfg_stru[i].uiocg_off);
} else {
addr = HI_PINTRL_SYS_REG_ADDR + 0x800 + (iocfg_stru[i].uiocg_off);
}
value = readl(addr) & (~0x03);
writel(value | iocfg_stru[i].iocg_val, addr);
/* gpio controller register */
if (!iocfg_stru[i].iomg_val) {
if (!iocfg_stru[i].gpio_dir) { /* direction is in */
if (uregv <= 164) {
addr = GPIO_DIR(iocfg_stru[i].ugpiog);
} else {
addr = GPIO_SYS_DIR(iocfg_stru[i].ugpiog);
}
value = readl(addr) & (~(GPIO_BIT(1, iocfg_stru[i].ugpio_bit)));
writel(value, addr);
} else { /* direction is out */
if (uregv <= 164) {
addr = GPIO_DIR(iocfg_stru[i].ugpiog);
addr1 = GPIO_DATA(iocfg_stru[i].ugpiog, iocfg_stru[i].ugpio_bit);
} else {
addr = GPIO_SYS_DIR(iocfg_stru[i].ugpiog);
addr1= GPIO_SYS_DATA(iocfg_stru[i].ugpiog, iocfg_stru[i].ugpio_bit);
}
value = readl(addr) | GPIO_BIT(1, iocfg_stru[i].ugpio_bit);
value1 = GPIO_BIT(iocfg_stru[i].gpio_val, iocfg_stru[i].ugpio_bit);
writel(value, addr);
writel(value1, addr1);
}
}
}
}
void iomux_debug_show(int check)
{
int i = 0;
int iflg = 0;
unsigned int uregv = 0;
struct iocfg_lp *iocfg_lookups = NULL;
get_active_io_cfglp();
iocfg_lookups = p_active_io_cfglp;
for (i = 0; i < IO_LIST_LENGTH; i++) {
iflg = 0;
printk("GPIO_%02d_%d (%03d) ",\
iocfg_lookups[i].ugpiog, iocfg_lookups[i].ugpio_bit,\
((iocfg_lookups[i].ugpiog<<3)+iocfg_lookups[i].ugpio_bit));
uregv = readl(IOC_BASE_ADDR + (iocfg_lookups[i].uiomg_off));
printk("IOMG=0x%02X ", uregv);
if (check == 1) {
if ((uregv == iocfg_lookups[i].iomg_val)\
|| (-1 == iocfg_lookups[i].iomg_val))
printk("(0x%02X) ", (unsigned char)uregv);
else {
iflg = 1;
printk("(0x%02X) ", (unsigned char)iocfg_lookups[i].iomg_val);
}
}
uregv = readl(IOC_BASE_ADDR + 0x800 + (iocfg_lookups[i].uiocg_off));
printk("IOCG=0x%02X ", uregv);
if (check == 1) {
if (((uregv & 0x3) == iocfg_lookups[i].iocg_val)\
|| (-1 == iocfg_lookups[i].iocg_val))
printk("(0x%02X) ", (unsigned char)uregv);
else {
iflg = 1;
printk("(0x%02X) ", (unsigned char)iocfg_lookups[i].iocg_val);
}
}
uregv = readl(GPIO_DIR(iocfg_lookups[i].ugpiog));
printk("DIR=0x%02X ", GPIO_IS_SET(iocfg_lookups[i].ugpio_bit));
if (check == 1) {
if ((uregv & GPIO_BIT(1, iocfg_lookups[i].ugpio_bit))\
== (GPIO_BIT(iocfg_lookups[i].gpio_dir, iocfg_lookups[i].ugpio_bit)))
printk("(0x%02X) ", GPIO_IS_SET(iocfg_lookups[i].ugpio_bit));
else {
iflg = 1;
printk("(0x%02X) ", (unsigned char)iocfg_lookups[i].gpio_dir);
}
}
uregv = readl(GPIO_DATA(iocfg_lookups[i].ugpiog));
printk("VAL=0x%02X ", GPIO_IS_SET(iocfg_lookups[i].ugpio_bit));
if (check == 1) {
if (((uregv & GPIO_BIT(1, iocfg_lookups[i].ugpio_bit))\
== GPIO_BIT(iocfg_lookups[i].gpio_val, iocfg_lookups[i].ugpio_bit))\
|| (uregv & GPIO_BIT(iocfg_lookups[i].iocg_val, iocfg_lookups[i].ugpio_bit)))
printk("(0x%02X) ", GPIO_IS_SET(iocfg_lookups[i].ugpio_bit));
else {
iflg = 1;
printk("(0x%02X) ", (unsigned char)iocfg_lookups[i].gpio_val);
}
}
if (iflg == 1)
printk("e");
printk("\n");
}
}
void iomux_debug_set(void)
{
int i = 0;
unsigned int uregv = 0;
struct iocfg_lp *iocfg_lookups = NULL;
get_active_io_cfglp();
iocfg_lookups = p_active_io_cfglp;
for (i = 0; i < IO_LIST_LENGTH; i++) {
uregv = ((iocfg_lookups[i].ugpiog<<3)+iocfg_lookups[i].ugpio_bit);
/*uart0 suspend printk*/
if ((0 == console_suspend_enabled)
&& ((uregv >= 117) && (uregv <= 120)))
continue;
if (E_BOARD_TYPE_PLATFORM == get_board_type()) {
/*oem board*/
if ((uregv == 40) || (uregv == 83))
continue;
if ((uregv >= 129) && (uregv <= 132))
continue;
if ((uregv >= 137) && (uregv <= 140))
continue;
} else {
if ((uregv == 145) || (uregv == 146))
continue;
}
uregv = readl(IOC_BASE_ADDR + (iocfg_lookups[i].uiomg_off));
if (iocfg_lookups[i].iomg_val != -1) {
if ((uregv&0x1) == iocfg_lookups[i].iomg_val)
writel(uregv, IOC_BASE_ADDR + (iocfg_lookups[i].uiomg_off));
else
writel(iocfg_lookups[i].iomg_val, IOC_BASE_ADDR + (iocfg_lookups[i].uiomg_off));
}
uregv = readl(IOC_BASE_ADDR + 0x800 + (iocfg_lookups[i].uiocg_off));
if (iocfg_lookups[i].iocg_val != -1) {
if ((uregv&0x3) == iocfg_lookups[i].iocg_val)
writel(uregv, IOC_BASE_ADDR + 0x800 + (iocfg_lookups[i].uiocg_off));
else
writel(iocfg_lookups[i].iocg_val, IOC_BASE_ADDR + 0x800 + (iocfg_lookups[i].uiocg_off));
}
uregv = readl(GPIO_DIR(iocfg_lookups[i].ugpiog));
uregv &= ~GPIO_BIT(1, iocfg_lookups[i].ugpio_bit);
uregv |= GPIO_BIT(iocfg_lookups[i].gpio_dir, iocfg_lookups[i].ugpio_bit);
writel(uregv, GPIO_DIR(iocfg_lookups[i].ugpiog));
uregv = readl(GPIO_DIR(iocfg_lookups[i].ugpiog));
uregv = readl(GPIO_DATA(iocfg_lookups[i].ugpiog));
uregv &= ~GPIO_BIT(1, iocfg_lookups[i].ugpio_bit);
uregv |= GPIO_BIT(iocfg_lookups[i].gpio_val, iocfg_lookups[i].ugpio_bit);
writel(uregv, GPIO_DATA(iocfg_lookups[i].ugpiog));
}
}
void gpio_bbb_drv::digitalWrite (uint8_t gpio, bool value) {
int ret = ioctl(_fd, IOCTL_DIGITAL_WRITE, GPIO_DATA(gpio, value));
if (ret < 0) {
throw gpio_exception("Error in digitalWrite, ", ret);
}
}
void gpio_bbb_drv::setDebounce (uint8_t gpio, uint16_t usdelay) {
int ret = ioctl(_fd, IOCTL_SET_DEBOUNCE, GPIO_DATA(gpio, usdelay));
if (ret < 0) {
throw gpio_exception("Error in setDebounce, ", ret);
}
}
.flags = IORESOURCE_IRQ, \
}
#define GPIO_DEVICE(block) \
{ \
.name = "gpio", \
.id = block, \
.num_resources = 3, \
.resource = &u5500_gpio_resources[block * 3], \
.dev = { \
.platform_data = &u5500_gpio_data[block], \
}, \
}
static struct nmk_gpio_platform_data u5500_gpio_data[] = {
GPIO_DATA("GPIO-0-31", 0, 32),
GPIO_DATA("GPIO-32-63", 32, 4), /* 36..63 not routed to pin */
GPIO_DATA("GPIO-64-95", 64, 19), /* 83..95 not routed to pin */
GPIO_DATA("GPIO-96-127", 96, 6), /* 102..127 not routed to pin */
GPIO_DATA("GPIO-128-159", 128, 21), /* 149..159 not routed to pin */
GPIO_DATA("GPIO-160-191", 160, 32),
GPIO_DATA("GPIO-192-223", 192, 32),
GPIO_DATA("GPIO-224-255", 224, 4), /* 228..255 not routed to pin */
};
static struct resource u5500_gpio_resources[] = {
GPIO_RESOURCE(0),
GPIO_RESOURCE(1),
GPIO_RESOURCE(2),
GPIO_RESOURCE(3),
GPIO_RESOURCE(4),
/* check all io status */
void io_debug_show(void)
{
int i;
unsigned int uregv, value, data;
void __iomem *addr, *addr1;
printk("IO_LIST_LENGTH is %d\n", IO_LIST_LENGTH);
for (i = 0; i < IO_LIST_LENGTH; i++) {
uregv = ((hisi_iocfg_lookups[i].ugpiog << 3) + hisi_iocfg_lookups[i].ugpio_bit);
printk("gpio - %d\t", uregv);
/* show iomg register's value */
if (hisi_iocfg_lookups[i].uiomg_off != -1) {
if (uregv <= 164)
addr = sysreg_base.ioc_base[0] + hisi_iocfg_lookups[i].uiomg_off;
else
addr = sysreg_base.ioc_base[1] + hisi_iocfg_lookups[i].uiomg_off;
value = readl(addr);
printk("iomg = Func-%d", value);
if (value != hisi_iocfg_lookups[i].iomg_val) {
printk(" -E [Func-%d]", hisi_iocfg_lookups[i].iomg_val);
} else {
printk(" ");
}
printk("\t");
} else {
printk("iomg = Null \t");
}
/* show iocg register */
if (uregv <= 164)
addr = sysreg_base.ioc_base[2] + hisi_iocfg_lookups[i].uiocg_off;
else
addr = sysreg_base.ioc_base[3] + hisi_iocfg_lookups[i].uiocg_off;
value = readl(addr) & 0x03;
printk("iocg = %s", pulltype[value]);
if (value != hisi_iocfg_lookups[i].iocg_val) {
printk(" -E [%s]", pulltype[hisi_iocfg_lookups[i].iocg_val]);
} else {
printk(" ");
}
printk("\t");
/* gpio controller register */
if (!hisi_iocfg_lookups[i].iomg_val) {
addr = GPIO_DIR(sysreg_base.gpio_base[hisi_iocfg_lookups[i].ugpiog]);
addr1 = GPIO_DATA(sysreg_base.gpio_base[hisi_iocfg_lookups[i].ugpiog], hisi_iocfg_lookups[i].ugpio_bit);
value = GPIO_IS_SET(readl(addr), hisi_iocfg_lookups[i].ugpio_bit);
data = GPIO_IS_SET(readl(addr1), hisi_iocfg_lookups[i].ugpio_bit);
printk("gpio - %s", value ? "O" : "I ");
if (value)
printk("%s", data ? "H" : "L");
if (value != hisi_iocfg_lookups[i].gpio_dir) {
printk(" -E [%s", hisi_iocfg_lookups[i].gpio_dir ? "O" : "I");
if (hisi_iocfg_lookups[i].gpio_dir && (data != hisi_iocfg_lookups[i].gpio_val))
printk("%s", hisi_iocfg_lookups[i].gpio_val ? "H" : "L");
printk("]");
}
printk("\n");
}
}
}