void iomux_debug_show(int check)
{
int i = 0;
int iflg = 0;
unsigned int uregv = 0;
struct iocfg_lp *iocfg_lookups = NULL;
get_active_io_cfglp();
iocfg_lookups = p_active_io_cfglp;
for (i = 0; i < IO_LIST_LENGTH; i++) {
iflg = 0;
printk("GPIO_%02d_%d (%03d) ",\
iocfg_lookups[i].ugpiog, iocfg_lookups[i].ugpio_bit,\
((iocfg_lookups[i].ugpiog<<3)+iocfg_lookups[i].ugpio_bit));
uregv = readl(IOC_BASE_ADDR + (iocfg_lookups[i].uiomg_off));
printk("IOMG=0x%02X ", uregv);
if (check == 1) {
if ((uregv == iocfg_lookups[i].iomg_val)\
|| (-1 == iocfg_lookups[i].iomg_val))
printk("(0x%02X) ", (unsigned char)uregv);
else {
iflg = 1;
printk("(0x%02X) ", (unsigned char)iocfg_lookups[i].iomg_val);
}
}
uregv = readl(IOC_BASE_ADDR + 0x800 + (iocfg_lookups[i].uiocg_off));
printk("IOCG=0x%02X ", uregv);
if (check == 1) {
if (((uregv & 0x3) == iocfg_lookups[i].iocg_val)\
|| (-1 == iocfg_lookups[i].iocg_val))
printk("(0x%02X) ", (unsigned char)uregv);
else {
iflg = 1;
printk("(0x%02X) ", (unsigned char)iocfg_lookups[i].iocg_val);
}
}
uregv = readl(GPIO_DIR(iocfg_lookups[i].ugpiog));
printk("DIR=0x%02X ", GPIO_IS_SET(iocfg_lookups[i].ugpio_bit));
if (check == 1) {
if ((uregv & GPIO_BIT(1, iocfg_lookups[i].ugpio_bit))\
== (GPIO_BIT(iocfg_lookups[i].gpio_dir, iocfg_lookups[i].ugpio_bit)))
printk("(0x%02X) ", GPIO_IS_SET(iocfg_lookups[i].ugpio_bit));
else {
iflg = 1;
printk("(0x%02X) ", (unsigned char)iocfg_lookups[i].gpio_dir);
}
}
uregv = readl(GPIO_DATA(iocfg_lookups[i].ugpiog));
printk("VAL=0x%02X ", GPIO_IS_SET(iocfg_lookups[i].ugpio_bit));
if (check == 1) {
if (((uregv & GPIO_BIT(1, iocfg_lookups[i].ugpio_bit))\
== GPIO_BIT(iocfg_lookups[i].gpio_val, iocfg_lookups[i].ugpio_bit))\
|| (uregv & GPIO_BIT(iocfg_lookups[i].iocg_val, iocfg_lookups[i].ugpio_bit)))
printk("(0x%02X) ", GPIO_IS_SET(iocfg_lookups[i].ugpio_bit));
else {
iflg = 1;
printk("(0x%02X) ", (unsigned char)iocfg_lookups[i].gpio_val);
}
}
if (iflg == 1)
printk("e");
printk("\n");
}
}
/* check all io status */
void io_debug_show(void)
{
int i;
unsigned int uregv, value, data;
void __iomem *addr, *addr1;
printk("IO_LIST_LENGTH is %d\n", IO_LIST_LENGTH);
for (i = 0; i < IO_LIST_LENGTH; i++) {
uregv = ((hisi_iocfg_lookups[i].ugpiog << 3) + hisi_iocfg_lookups[i].ugpio_bit);
printk("gpio - %d\t", uregv);
/* show iomg register's value */
if (hisi_iocfg_lookups[i].uiomg_off != -1) {
if (uregv <= 164)
addr = sysreg_base.ioc_base[0] + hisi_iocfg_lookups[i].uiomg_off;
else
addr = sysreg_base.ioc_base[1] + hisi_iocfg_lookups[i].uiomg_off;
value = readl(addr);
printk("iomg = Func-%d", value);
if (value != hisi_iocfg_lookups[i].iomg_val) {
printk(" -E [Func-%d]", hisi_iocfg_lookups[i].iomg_val);
} else {
printk(" ");
}
printk("\t");
} else {
printk("iomg = Null \t");
}
/* show iocg register */
if (uregv <= 164)
addr = sysreg_base.ioc_base[2] + hisi_iocfg_lookups[i].uiocg_off;
else
addr = sysreg_base.ioc_base[3] + hisi_iocfg_lookups[i].uiocg_off;
value = readl(addr) & 0x03;
printk("iocg = %s", pulltype[value]);
if (value != hisi_iocfg_lookups[i].iocg_val) {
printk(" -E [%s]", pulltype[hisi_iocfg_lookups[i].iocg_val]);
} else {
printk(" ");
}
printk("\t");
/* gpio controller register */
if (!hisi_iocfg_lookups[i].iomg_val) {
addr = GPIO_DIR(sysreg_base.gpio_base[hisi_iocfg_lookups[i].ugpiog]);
addr1 = GPIO_DATA(sysreg_base.gpio_base[hisi_iocfg_lookups[i].ugpiog], hisi_iocfg_lookups[i].ugpio_bit);
value = GPIO_IS_SET(readl(addr), hisi_iocfg_lookups[i].ugpio_bit);
data = GPIO_IS_SET(readl(addr1), hisi_iocfg_lookups[i].ugpio_bit);
printk("gpio - %s", value ? "O" : "I ");
if (value)
printk("%s", data ? "H" : "L");
if (value != hisi_iocfg_lookups[i].gpio_dir) {
printk(" -E [%s", hisi_iocfg_lookups[i].gpio_dir ? "O" : "I");
if (hisi_iocfg_lookups[i].gpio_dir && (data != hisi_iocfg_lookups[i].gpio_val))
printk("%s", hisi_iocfg_lookups[i].gpio_val ? "H" : "L");
printk("]");
}
printk("\n");
}
}
}
