//{{{
uint8_t SD_Init() {
//{{{ sdDetect init
SD_DETECT_GPIO_CLK_ENABLE();
GPIO_InitTypeDef gpio_init_structure;
gpio_init_structure.Pin = SD_DETECT_PIN;
gpio_init_structure.Mode = GPIO_MODE_INPUT;
gpio_init_structure.Pull = GPIO_PULLUP;
gpio_init_structure.Speed = GPIO_SPEED_HIGH;
HAL_GPIO_Init (SD_DETECT_GPIO_PORT, &gpio_init_structure);
//}}}
uSdHandle.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING;
uSdHandle.Init.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE;
uSdHandle.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE;
uSdHandle.Init.BusWide = SDMMC_BUS_WIDE_1B;
uSdHandle.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE;
uSdHandle.Init.ClockDiv = SDMMC_TRANSFER_CLK_DIV;
__HAL_RCC_DMA2_CLK_ENABLE();
// sd interrupt
#ifdef STM32F746G_DISCO
uSdHandle.Instance = SDMMC1;
__HAL_RCC_SDMMC1_CLK_ENABLE();
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
//{{{ gpio init
gpio_init_structure.Mode = GPIO_MODE_AF_PP;
gpio_init_structure.Pull = GPIO_PULLUP;
gpio_init_structure.Speed = GPIO_SPEED_HIGH;
gpio_init_structure.Alternate = GPIO_AF12_SDMMC1;
gpio_init_structure.Pin = GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12;
HAL_GPIO_Init (GPIOC, &gpio_init_structure);
gpio_init_structure.Pin = GPIO_PIN_2;
HAL_GPIO_Init (GPIOD, &gpio_init_structure);
//}}}
//{{{ DMA rx parameters
dma_rx_handle.Instance = DMA2_Stream3;
dma_rx_handle.Init.Channel = DMA_CHANNEL_4;
dma_rx_handle.Init.Direction = DMA_PERIPH_TO_MEMORY;
dma_rx_handle.Init.PeriphInc = DMA_PINC_DISABLE;
dma_rx_handle.Init.MemInc = DMA_MINC_ENABLE;
dma_rx_handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
dma_rx_handle.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
dma_rx_handle.Init.Mode = DMA_PFCTRL;
dma_rx_handle.Init.Priority = DMA_PRIORITY_VERY_HIGH;
dma_rx_handle.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
dma_rx_handle.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
dma_rx_handle.Init.MemBurst = DMA_MBURST_INC4;
dma_rx_handle.Init.PeriphBurst = DMA_PBURST_INC4;
__HAL_LINKDMA (&uSdHandle, hdmarx, dma_rx_handle);
HAL_DMA_DeInit (&dma_rx_handle);
HAL_DMA_Init (&dma_rx_handle);
//}}}
//{{{ DMA tx parameters
dma_tx_handle.Instance = DMA2_Stream6;
dma_tx_handle.Init.Channel = DMA_CHANNEL_4;
dma_tx_handle.Init.Direction = DMA_MEMORY_TO_PERIPH;
dma_tx_handle.Init.PeriphInc = DMA_PINC_DISABLE;
dma_tx_handle.Init.MemInc = DMA_MINC_ENABLE;
dma_tx_handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
dma_tx_handle.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
dma_tx_handle.Init.Mode = DMA_PFCTRL;
dma_tx_handle.Init.Priority = DMA_PRIORITY_VERY_HIGH;
dma_tx_handle.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
dma_tx_handle.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
dma_tx_handle.Init.MemBurst = DMA_MBURST_INC4;
dma_tx_handle.Init.PeriphBurst = DMA_PBURST_INC4;
__HAL_LINKDMA (&uSdHandle, hdmatx, dma_tx_handle);
HAL_DMA_DeInit (&dma_tx_handle);
HAL_DMA_Init (&dma_tx_handle);
//}}}
HAL_NVIC_SetPriority (SDMMC1_IRQn, 5, 0);
HAL_NVIC_EnableIRQ (SDMMC1_IRQn);
HAL_NVIC_SetPriority (DMA2_Stream3_IRQn, 6, 0); // f for 769
HAL_NVIC_EnableIRQ (DMA2_Stream3_IRQn);
HAL_NVIC_SetPriority (DMA2_Stream6_IRQn, 6, 0); // f for 769
HAL_NVIC_EnableIRQ (DMA2_Stream6_IRQn);
#else
uSdHandle.Instance = SDMMC2;
__HAL_RCC_SDMMC2_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
__HAL_RCC_GPIOG_CLK_ENABLE();
//{{{ gpio init
gpio_init_structure.Mode = GPIO_MODE_AF_PP;
gpio_init_structure.Pull = GPIO_PULLUP;
gpio_init_structure.Speed = GPIO_SPEED_HIGH;
gpio_init_structure.Alternate = GPIO_AF10_SDMMC2;
gpio_init_structure.Pin = GPIO_PIN_3 | GPIO_PIN_4;
HAL_GPIO_Init (GPIOB, &gpio_init_structure);
gpio_init_structure.Alternate = GPIO_AF11_SDMMC2;
gpio_init_structure.Pin = GPIO_PIN_6 | GPIO_PIN_7;
HAL_GPIO_Init (GPIOD, &gpio_init_structure);
gpio_init_structure.Pin = GPIO_PIN_9 | GPIO_PIN_10;
HAL_GPIO_Init (GPIOG, &gpio_init_structure);
//}}}
//{{{ DMA rx parameters
dma_rx_handle.Instance = DMA2_Stream0;
dma_rx_handle.Init.Channel = DMA_CHANNEL_11;
dma_rx_handle.Init.Direction = DMA_PERIPH_TO_MEMORY;
dma_rx_handle.Init.PeriphInc = DMA_PINC_DISABLE;
dma_rx_handle.Init.MemInc = DMA_MINC_ENABLE;
dma_rx_handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
dma_rx_handle.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
dma_rx_handle.Init.Mode = DMA_PFCTRL;
dma_rx_handle.Init.Priority = DMA_PRIORITY_VERY_HIGH;
dma_rx_handle.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
dma_rx_handle.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
dma_rx_handle.Init.MemBurst = DMA_MBURST_INC4;
dma_rx_handle.Init.PeriphBurst = DMA_PBURST_INC4;
__HAL_LINKDMA (&uSdHandle, hdmarx, dma_rx_handle);
HAL_DMA_DeInit (&dma_rx_handle);
HAL_DMA_Init (&dma_rx_handle);
//}}}
//{{{ DMA tx parameters
dma_tx_handle.Instance = DMA2_Stream5;
dma_tx_handle.Init.Channel = DMA_CHANNEL_11;
dma_tx_handle.Init.Direction = DMA_MEMORY_TO_PERIPH;
dma_tx_handle.Init.PeriphInc = DMA_PINC_DISABLE;
dma_tx_handle.Init.MemInc = DMA_MINC_ENABLE;
dma_tx_handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
dma_tx_handle.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
dma_tx_handle.Init.Mode = DMA_PFCTRL;
dma_tx_handle.Init.Priority = DMA_PRIORITY_VERY_HIGH;
dma_tx_handle.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
dma_tx_handle.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
dma_tx_handle.Init.MemBurst = DMA_MBURST_INC4;
dma_tx_handle.Init.PeriphBurst = DMA_PBURST_INC4;
__HAL_LINKDMA (&uSdHandle, hdmatx, dma_tx_handle);
HAL_DMA_DeInit (&dma_tx_handle);
HAL_DMA_Init (&dma_tx_handle);
//}}}
HAL_NVIC_SetPriority (SDMMC2_IRQn, 0x5, 0); //e
HAL_NVIC_EnableIRQ (SDMMC2_IRQn);
HAL_NVIC_SetPriority (DMA2_Stream0_IRQn, 0x6, 0); //f
HAL_NVIC_EnableIRQ (DMA2_Stream0_IRQn);
HAL_NVIC_SetPriority (DMA2_Stream5_IRQn, 0x6, 0); // f
HAL_NVIC_EnableIRQ (DMA2_Stream5_IRQn);
#endif
// HAL SD initialization
if (HAL_SD_Init (&uSdHandle, &uSdCardInfo) != SD_OK)
return MSD_ERROR;
if (HAL_SD_WideBusOperation_Config (&uSdHandle, SDMMC_BUS_WIDE_4B) != SD_OK)
return MSD_ERROR;
if (HAL_SD_HighSpeed (&uSdHandle) != SD_OK)
return MSD_ERROR;
//osMutexDef (sdMutex);
//mSdMutex = osMutexCreate (osMutex (sdMutex));
mReadCache = (uint8_t*)pvPortMalloc (512 * mReadCacheSize);
return MSD_OK;
}
bool sdInit() {
/* Enable SDIO clock */
__HAL_RCC_SDIO_CLK_ENABLE();
/* Enable DMA2 clocks */
SD_DMAx_TxRx_CLK_ENABLE();
/* Enable GPIOs clock */
__GPIOC_CLK_ENABLE(); // sd data lines PC8..PC12
__GPIOD_CLK_ENABLE(); // cmd line D2
__GPIOB_CLK_ENABLE(); // pin detect
/* Common GPIO configuration */
GPIO_InitTypeDef GPIO_Init_Structure = { 0 };
GPIO_Init_Structure.Mode = GPIO_MODE_AF_PP;
GPIO_Init_Structure.Pull = GPIO_PULLUP;
GPIO_Init_Structure.Speed = GPIO_SPEED_FREQ_HIGH;
GPIO_Init_Structure.Alternate = GPIO_AF12_SDIO;
/* GPIOC configuration */
GPIO_Init_Structure.Pin = GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12;
HAL_GPIO_Init(GPIOC, &GPIO_Init_Structure);
/* GPIOD configuration */
GPIO_Init_Structure.Pin = GPIO_PIN_2;
HAL_GPIO_Init(GPIOD, &GPIO_Init_Structure);
/* SD Card detect pin configuration */
GPIO_Init_Structure.Mode = GPIO_MODE_INPUT;
GPIO_Init_Structure.Pull = GPIO_PULLUP;
GPIO_Init_Structure.Speed = GPIO_SPEED_LOW;
GPIO_Init_Structure.Pin = 8;
HAL_GPIO_Init(GPIOB, &GPIO_Init_Structure);
/* Initialize SD interface
* Note HW flow control must be disabled on STM32f415 due to hardware glitches on the SDIOCLK
* line. See errata:
*
* "When enabling the HW flow control by setting bit 14 of the SDIO_CLKCR register to ‘1’,
* glitches can occur on the SDIOCLK output clock resulting in wrong data to be written
* into the SD/MMC card or into the SDIO device. As a consequence, a CRC error will be
* reported to the SD/SDIO MMC host interface (DCRCFAIL bit set to ‘1’ in SDIO_STA register)."
**/
uSdHandle.Instance = SDIO;
uSdHandle.Init.ClockEdge = SDIO_CLOCK_EDGE_RISING;
uSdHandle.Init.ClockBypass = SDIO_CLOCK_BYPASS_DISABLE;
uSdHandle.Init.ClockPowerSave = SDIO_CLOCK_POWER_SAVE_DISABLE;
uSdHandle.Init.BusWide = SDIO_BUS_WIDE_1B;
uSdHandle.Init.HardwareFlowControl = SDIO_HARDWARE_FLOW_CONTROL_DISABLE;
uSdHandle.Init.ClockDiv = SDIO_TRANSFER_CLK_DIV;
HAL_SD_ErrorTypedef status;
if ((status = HAL_SD_Init(&uSdHandle, &uSdCardInfo)) != SD_OK) {
error("Failed to init sd: status=%d\n", status);
return false;
}
if ((status = HAL_SD_WideBusOperation_Config(&uSdHandle, SDIO_BUS_WIDE_4B)) != SD_OK) {
error("Failed to init wide bus mode, status=%d\n", status);
return false;
}
/* NVIC configuration for SDIO interrupts */
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
HAL_NVIC_SetPriority(SDIO_IRQn, SD_NVIC_PRIORITY, 0);
HAL_NVIC_EnableIRQ(SDIO_IRQn);
// try high speed mode
if ((status = HAL_SD_HighSpeed(&uSdHandle)) != SD_OK) {
error("Failed to set high speed mode, status=%d\n", status);
MatchBox::blinkOfDeath(*led, (MatchBox::BlinkCode) SDIO_HS_MODE);
}
return true;
}