static int hinfc610_toshiba_24nm_set_rr_param(struct hinfc_host *host, int param) { hinfc_write(host, HINFC_CMD_SEQ(0x5C, 0xC5), HINFC610_CMD); hinfc_write(host, HINFC610_WRITE_2CMD_0ADD_NODATA, HINFC610_OP); WAIT_CONTROLLER_FINISH(); hinfc610_toshiba_24nm_set_rr_reg(host, param); hinfc_write(host, HINFC_CMD_SEQ(0x26, 0x5D), HINFC610_CMD); hinfc_write(host, HINFC610_WRITE_2CMD_0ADD_NODATA, HINFC610_OP); WAIT_CONTROLLER_FINISH(); return 0; }
static int hinfc610_toshiba_24nm_set_rr_param(struct hinfc_host *host, int param) { int opval; host->enable_ecc_randomizer(host, DISABLE, DISABLE); opval = (HINFC610_IS_SYNC(host) ? HINFC610_WRITE_2CMD_0ADD_NODATA_SYNC : HINFC610_WRITE_2CMD_0ADD_NODATA); hinfc_write(host, HINFC_CMD_SEQ(0x5C, 0xC5), HINFC610_CMD); hinfc_write(host, opval, HINFC610_OP); WAIT_CONTROLLER_FINISH(); hinfc610_toshiba_24nm_set_rr_reg(host, param); hinfc_write(host, HINFC_CMD_SEQ(0x26, 0x5D), HINFC610_CMD); hinfc_write(host, opval, HINFC610_OP); WAIT_CONTROLLER_FINISH(); host->enable_ecc_randomizer(host, ENABLE, ENABLE); return 0; }