int32_t I2CM_Write(uint8_t index, uint8_t addr, const uint8_t *cmd, uint32_t cmd_bytes, const uint8_t *data, uint32_t data_bytes)
{
mxc_i2cm_regs_t *regs = MXC_I2CM_GET_I2CM(index);
int32_t retval = data_bytes;
if (regs->trans_f.tx_in_progress) {
return -1;
}
if (!cmd_bytes && !data_bytes) {
return -1;
}
regs->intfl = 0x3FF; /* clear all interrupts */
if (cmd_bytes) {
if(I2CM_Tx(index, addr, cmd, cmd_bytes, FALSE) != cmd_bytes) {
retval = -1;
}
}
if (data_bytes) {
if(I2CM_Tx(index, addr, data, data_bytes, TRUE) != data_bytes) {
retval = -1;
}
}
if(I2CM_TxInProgress(index)) {
retval = -1;
}
return retval;
}
/* ************************************************************************* */
int I2CM_Write(mxc_i2cm_regs_t *i2cm, uint8_t addr, const uint8_t *cmd_data,
uint32_t cmd_len, uint8_t* data, uint32_t len)
{
int i2cm_num;
int error = E_NO_ERROR;
int retval = E_NO_ERROR;
mxc_i2cm_fifo_regs_t *fifo;
if(data == NULL) {
return E_NULL_PTR;
}
// Make sure the I2CM has been initialized
if(i2cm->ctrl == 0) {
return E_UNINITIALIZED;
}
if(!(len > 0)) {
return E_NO_ERROR;
}
// Lock this I2CM
i2cm_num = MXC_I2CM_GET_IDX(i2cm);
while(mxc_get_lock((uint32_t*)&states[i2cm_num].req,1) != E_NO_ERROR) {}
// Get the FIFO pointer for this I2CM
fifo = MXC_I2CM_GET_FIFO(i2cm_num);
// Disable and clear the interrupts
i2cm->inten = 0;
i2cm->intfl = i2cm->intfl;
// Transmit the command if there is command data and length, don't send stop bit
if((cmd_data != NULL) && (cmd_len > 0)) {
retval = I2CM_Tx(i2cm, fifo, addr, cmd_data, cmd_len, 0);
}
// Write data to the slave, send the stop bit
if(retval == E_NO_ERROR) {
retval = I2CM_Tx(i2cm, fifo, addr, data, len, 1);
}
// Wait for the transaction to complete
if((error = I2CM_TxInProgress(i2cm)) != E_NO_ERROR) {
retval = error;
}
// Unlock this I2CM
mxc_free_lock((uint32_t*)&states[i2cm_num].req);
if(retval != E_NO_ERROR) {
return retval;
}
return len;
}
