static int i2c_mcux_init(struct device *dev) { I2C_Type *base = DEV_BASE(dev); const struct i2c_mcux_config *config = DEV_CFG(dev); struct i2c_mcux_data *data = DEV_DATA(dev); u32_t clock_freq, bitrate_cfg; i2c_master_config_t master_config; int error; k_sem_init(&data->device_sync_sem, 0, UINT_MAX); clock_freq = CLOCK_GetFreq(config->clock_source); I2C_MasterGetDefaultConfig(&master_config); I2C_MasterInit(base, &master_config, clock_freq); I2C_MasterTransferCreateHandle(base, &data->handle, i2c_mcux_master_transfer_callback, dev); bitrate_cfg = _i2c_map_dt_bitrate(config->bitrate); error = i2c_mcux_configure(dev, I2C_MODE_MASTER | bitrate_cfg); if (error) { return error; } config->irq_config_func(dev); return 0; }
void BOARD_I2C_Init(I2C_Type *base, uint32_t clkSrc_Hz) { i2c_master_config_t i2cConfig = {0}; I2C_MasterGetDefaultConfig(&i2cConfig); I2C_MasterInit(base, &i2cConfig, clkSrc_Hz); }
status_t I2C_RTOS_Init(i2c_rtos_handle_t *handle, I2C_Type *base, const i2c_master_config_t *masterConfig, uint32_t srcClock_Hz) { if (handle == NULL) { return kStatus_InvalidArgument; } if (base == NULL) { return kStatus_InvalidArgument; } memset(handle, 0, sizeof(i2c_rtos_handle_t)); #if (configSUPPORT_STATIC_ALLOCATION == 1) handle->mutex = xSemaphoreCreateMutexStatic(&handle->mutexBuffer); #else handle->mutex = xSemaphoreCreateMutex(); #endif if (handle->mutex == NULL) { return kStatus_Fail; } #if (configSUPPORT_STATIC_ALLOCATION == 1) handle->semaphore = xSemaphoreCreateBinaryStatic(&handle->semaphoreBuffer); #else handle->semaphore = xSemaphoreCreateBinary(); #endif if (handle->semaphore == NULL) { vSemaphoreDelete(handle->mutex); return kStatus_Fail; } handle->base = base; I2C_MasterInit(handle->base, masterConfig, srcClock_Hz); I2C_MasterTransferCreateHandle(base, &handle->drv_handle, I2C_RTOS_Callback, (void *)handle); return kStatus_Success; }
static Status tml_Init(void) { i2c_master_config_t masterConfig; uint32_t sourceClock; gpio_pin_config_t irq_config = {kGPIO_DigitalInput, 0,}; gpio_pin_config_t ven_config = {kGPIO_DigitalOutput, 0,}; GPIO_PinInit(NXPNCI_IRQ_GPIO, NXPNCI_IRQ_PIN, &irq_config); GPIO_PinInit(NXPNCI_VEN_GPIO, NXPNCI_VEN_PIN, &ven_config); I2C_MasterGetDefaultConfig(&masterConfig); masterConfig.baudRate_Bps = NXPNCI_I2C_BAUDRATE; sourceClock = CLOCK_GetFreq(I2C0_CLK_SRC); masterXfer.slaveAddress = NXPNCI_I2C_ADDR_7BIT; masterXfer.subaddress = 0; masterXfer.subaddressSize = 0; masterXfer.flags = kI2C_TransferDefaultFlag; I2C_MasterInit(NXPNCI_I2C_INSTANCE, &masterConfig, sourceClock); IrqSem = xSemaphoreCreateBinary(); return SUCCESS; }
void i2c_init(i2c_t *obj, PinName sda, PinName scl) { uint32_t i2c_sda = pinmap_peripheral(sda, PinMap_I2C_SDA); uint32_t i2c_scl = pinmap_peripheral(scl, PinMap_I2C_SCL); obj->instance = pinmap_merge(i2c_sda, i2c_scl); obj->next_repeated_start = 0; MBED_ASSERT((int)obj->instance != NC); i2c_master_config_t master_config; I2C_MasterGetDefaultConfig(&master_config); I2C_MasterInit(i2c_addrs[obj->instance], &master_config, CLOCK_GetFreq(i2c_clocks[obj->instance])); I2C_EnableInterrupts(i2c_addrs[obj->instance], kI2C_GlobalInterruptEnable); pinmap_pinout(sda, PinMap_I2C_SDA); pinmap_pinout(scl, PinMap_I2C_SCL); #if defined(FSL_FEATURE_PORT_HAS_OPEN_DRAIN) && FSL_FEATURE_PORT_HAS_OPEN_DRAIN PORT_Type *port_addrs[] = PORT_BASE_PTRS; PORT_Type *base = port_addrs[sda >> GPIO_PORT_SHIFT]; base->PCR[sda & 0xFF] |= PORT_PCR_ODE_MASK; base->PCR[scl & 0xFF] |= PORT_PCR_ODE_MASK; #endif }
/*! * @brief Main function */ int main(void) { i2c_slave_config_t slaveConfig; i2c_master_config_t masterConfig; uint32_t sourceClock; BOARD_InitPins(); BOARD_BootClockRUN(); BOARD_InitDebugConsole(); PRINTF("\r\nI2C example -- MasterFunctionalInterrupt_SlaveFunctionalInterrupt.\r\n"); /* Enable master and slave NVIC interrupt. */ EnableIRQ(I2C_MASTER_IRQ); EnableIRQ(I2C_SLAVE_IRQ); /* Set i2c slave interrupt priority higher. */ NVIC_SetPriority(I2C_SLAVE_IRQ, 0); NVIC_SetPriority(I2C_MASTER_IRQ, 1); /*1.Set up i2c slave first*/ /* * slaveConfig.addressingMode = kI2C_Address7bit; * slaveConfig.enableGeneralCall = false; * slaveConfig.enableWakeUp = false; * slaveConfig.enableHighDrive = false; * slaveConfig.enableBaudRateCtl = false; * slaveConfig.enableSlave = true; */ I2C_SlaveGetDefaultConfig(&slaveConfig); slaveConfig.addressingMode = kI2C_Address7bit; slaveConfig.slaveAddress = I2C_MASTER_SLAVE_ADDR_7BIT; I2C_SlaveInit(EXAMPLE_I2C_SLAVE_BASEADDR, &slaveConfig); for (uint32_t i = 0U; i < I2C_DATA_LENGTH; i++) { g_slave_buff[i] = 0; } /*2.Set up i2c master to send data to slave*/ for (uint32_t i = 0U; i < I2C_DATA_LENGTH; i++) { g_master_buff[i] = i; } PRINTF("Master will send data :"); for (uint32_t i = 0U; i < I2C_DATA_LENGTH; i++) { if (i % 8 == 0) { PRINTF("\r\n"); } PRINTF("0x%2x ", g_master_buff[i]); } PRINTF("\r\n\r\n"); /* * masterConfig.baudRate_Bps = 100000U; * masterConfig.enableHighDrive = false; * masterConfig.enableStopHold = false; * masterConfig.glitchFilterWidth = 0U; * masterConfig.enableMaster = true; */ I2C_MasterGetDefaultConfig(&masterConfig); masterConfig.baudRate_Bps = I2C_BAUDRATE; sourceClock = CLOCK_GetFreq(I2C_MASTER_CLK_SRC); I2C_MasterInit(EXAMPLE_I2C_MASTER_BASEADDR, &masterConfig, sourceClock); /* Master send address to slave. */ I2C_MasterStart(EXAMPLE_I2C_MASTER_BASEADDR, I2C_MASTER_SLAVE_ADDR_7BIT, kI2C_Write); /* Enable module interrupt. */ I2C_EnableInterrupts(EXAMPLE_I2C_MASTER_BASEADDR, kI2C_GlobalInterruptEnable); I2C_EnableInterrupts(EXAMPLE_I2C_SLAVE_BASEADDR, kI2C_GlobalInterruptEnable); /* Wait slave receive finished. */ while (g_slaveRxIndex < I2C_DATA_LENGTH) { } /* Disable module interrupt. */ I2C_DisableInterrupts(EXAMPLE_I2C_MASTER_BASEADDR, kI2C_GlobalInterruptEnable); I2C_DisableInterrupts(EXAMPLE_I2C_SLAVE_BASEADDR, kI2C_GlobalInterruptEnable); /* Master send stop command. */ I2C_MasterStop(EXAMPLE_I2C_MASTER_BASEADDR); /*3.Transfer completed. Check the data.*/ for (uint32_t i = 0U; i < I2C_DATA_LENGTH; i++) { if (g_slave_buff[i] != g_master_buff[i]) { PRINTF("\r\nError occured in this transfer ! \r\n"); break; } } PRINTF("Slave received data :"); for (uint32_t i = 0U; i < I2C_DATA_LENGTH; i++) { if (i % 8 == 0) { PRINTF("\r\n"); } PRINTF("0x%2x ", g_slave_buff[i]); } PRINTF("\r\n\r\n"); /*4.Set up slave ready to send data to master.*/ for (uint32_t i = 0U; i < I2C_DATA_LENGTH; i++) { g_slave_buff[i] = ~g_slave_buff[i]; } PRINTF("This time , slave will send data: :"); for (uint32_t i = 0U; i < I2C_DATA_LENGTH; i++) { if (i % 8 == 0) { PRINTF("\r\n"); } PRINTF("0x%2x ", g_slave_buff[i]); } PRINTF("\r\n\r\n"); /* Already setup the slave transfer ready in item 1. */ /* 5.Set up master to receive data from slave. */ for (uint32_t i = 0U; i < I2C_DATA_LENGTH; i++) { g_master_buff[i] = 0; } /* Master send address to slave. */ I2C_MasterStart(EXAMPLE_I2C_MASTER_BASEADDR, I2C_MASTER_SLAVE_ADDR_7BIT, kI2C_Read); /* Enable module interrupt. */ I2C_EnableInterrupts(EXAMPLE_I2C_MASTER_BASEADDR, kI2C_GlobalInterruptEnable); I2C_EnableInterrupts(EXAMPLE_I2C_SLAVE_BASEADDR, kI2C_GlobalInterruptEnable); g_masterReadBegin = true; /* Master put receive data in receive buffer. */ g_masterRxIndex = 0; /* Wait master receive finished. */ while (g_masterRxIndex < I2C_DATA_LENGTH) { } /* Disable module interrupt. */ I2C_DisableInterrupts(EXAMPLE_I2C_MASTER_BASEADDR, kI2C_GlobalInterruptEnable); I2C_DisableInterrupts(EXAMPLE_I2C_SLAVE_BASEADDR, kI2C_GlobalInterruptEnable); /*6.Transfer completed. Check the data.*/ for (uint32_t i = 0U; i < I2C_DATA_LENGTH; i++) { if (g_slave_buff[i] != g_master_buff[i]) { PRINTF("\r\nError occured in the transfer ! \r\n"); break; } } PRINTF("Master received data :"); for (uint32_t i = 0U; i < I2C_DATA_LENGTH; i++) { if (i % 8 == 0) { PRINTF("\r\n"); } PRINTF("0x%2x ", g_master_buff[i]); } PRINTF("\r\n\r\n"); PRINTF("\r\nEnd of I2C example .\r\n"); while (1) { } }
static OsStatus_t KL25Z_I2CConfig(Device_t *dev, uint32_t expectedSpeed, uint32_t *actualSpeed, uint32_t configMask, uint16_t slaveAddr) { OsStatus_t ret = kStatusOk; KL25ZI2CDevData_t *dat = (KL25ZI2CDevData_t *)dev->config->devConfigData; KL25ZCustomI2CData_t *custom = (KL25ZCustomI2CData_t *)dev->deviceData; DeviceConfig_t *dcfg = (DeviceConfig_t *)dev->config; (void)actualSpeed; if(custom->busy) { /* device busy, exit */ ret = kDeviceBusy; goto cleanup; } custom->busy = true; /* select the mode of I2C operation */ if(configMask & I2C_DEVICE_SLAVE) { custom->master = false; I2C_SlaveTransferCreateHandle(dat->I2C, &custom->shnadle,KL25Z_SlaveI2CIsr , dev); custom->enabled = false; i2c_slave_config_t cfg; I2C_SlaveGetDefaultConfig(&cfg); cfg.enableHighDrive = false; /* perform addressing mode setup */ if(configMask & I2C_10BIT_ADDR) { cfg.addressingMode = kI2C_Address7bit; } else { cfg.addressingMode = kI2C_RangeMatch; } cfg.slaveAddress = slaveAddr; /* perfom I2C configuration */ I2C_SlaveInit(dat->I2C,&cfg,OS_CPU_RATE/2); } else { custom->master = true; I2C_MasterTransferCreateHandle(dat->I2C, &custom->mhandle, KL25Z_MasterI2CIsr, dev); custom->enabled = false; i2c_master_config_t cfg; I2C_MasterGetDefaultConfig(&cfg); cfg.baudRate_Bps = expectedSpeed; cfg.enableMaster = false; /* perfom I2C configuration */ I2C_MasterInit(dat->I2C,&cfg,OS_CPU_RATE/2); } /* keeps the I2C disabled */ NVIC_ClearPendingIRQ(dcfg->irqOffset); NVIC_DisableIRQ(dcfg->irqOffset); I2C_SlaveClearStatusFlags(dat->I2C, 0xFFFFFFFF); I2C_DisableInterrupts(dat->I2C, 0xFFFFFFFF); custom->busy = false; cleanup: return(ret); }
int main(void) { i2c_slave_config_t slaveConfig; i2c_master_config_t masterConfig; uint32_t sourceClock; i2c_master_transfer_t masterXfer; BOARD_InitPins(); BOARD_BootClockRUN(); BOARD_InitDebugConsole(); /*Init DMA for example*/ DMAMGR_Init(); /* set master priority lower than slave */ NVIC_EnableIRQ(DMA0_IRQn); NVIC_SetPriority(DMA0_IRQn, 1); PRINTF("\r\nI2C example -- MasterDMA_SlaveInterrupt.\r\n"); /*1.Set up i2c slave first*/ /* * slaveConfig.addressingMode = kI2C_Address7bit; * slaveConfig.enableGeneralCall = false; * slaveConfig.enableWakeUp = false; * slaveConfig.enableHighDrive = false; * slaveConfig.enableBaudRateCtl = false; * slaveConfig.enableSlave = true; */ I2C_SlaveGetDefaultConfig(&slaveConfig); slaveConfig.addressingMode = kI2C_Address7bit; slaveConfig.slaveAddress = I2C_MASTER_SLAVE_ADDR_7BIT; slaveConfig.upperAddress = 0; I2C_SlaveInit(EXAMPLE_I2C_SLAVE_BASEADDR, &slaveConfig); for (uint32_t i = 0U; i < I2C_DATA_LENGTH; i++) { g_slave_buff[i] = 0; } memset(&g_s_handle, 0, sizeof(g_s_handle)); I2C_SlaveTransferCreateHandle(EXAMPLE_I2C_SLAVE_BASEADDR, &g_s_handle, i2c_slave_callback, NULL); I2C_SlaveTransferNonBlocking(EXAMPLE_I2C_SLAVE_BASEADDR, &g_s_handle, kI2C_SlaveCompletionEvent); /*2.Set up i2c master to send data to slave*/ for (uint32_t i = 0U; i < I2C_DATA_LENGTH; i++) { g_master_buff[i] = i; } PRINTF("Master will send data :"); for (uint32_t i = 0U; i < I2C_DATA_LENGTH; i++) { if (i % 8 == 0U) { PRINTF("\r\n"); } PRINTF("0x%2x ", g_master_buff[i]); } PRINTF("\r\n\r\n"); /* * masterConfig.baudRate_Bps = 100000U; * masterConfig.enableHighDrive = false; * masterConfig.enableStopHold = false; * masterConfig.glitchFilterWidth = 0U; * masterConfig.enableMaster = true; */ I2C_MasterGetDefaultConfig(&masterConfig); masterConfig.baudRate_Bps = I2C_BAUDRATE; sourceClock = CLOCK_GetFreq(I2C_MASTER_CLK_SRC); I2C_MasterInit(EXAMPLE_I2C_MASTER_BASEADDR, &masterConfig, sourceClock); memset(&g_m_dma_handle, 0, sizeof(g_m_dma_handle)); memset(&masterXfer, 0, sizeof(masterXfer)); masterXfer.slaveAddress = I2C_MASTER_SLAVE_ADDR_7BIT; masterXfer.direction = kI2C_Write; masterXfer.subaddress = 0; masterXfer.subaddressSize = 0; masterXfer.data = g_master_buff; masterXfer.dataSize = I2C_DATA_LENGTH; masterXfer.flags = kI2C_TransferDefaultFlag; DMAMGR_RequestChannel((dma_request_source_t)DMA_REQUEST_SRC, 0, &dmaHandle); I2C_MasterTransferCreateHandleDMA(EXAMPLE_I2C_MASTER_BASEADDR, &g_m_dma_handle, NULL, NULL, &dmaHandle); I2C_MasterTransferDMA(EXAMPLE_I2C_MASTER_BASEADDR, &g_m_dma_handle, &masterXfer); /* wait for transfer completed. */ while (!completionFlag) { } completionFlag = false; /*3.Transfer completed. Check the data.*/ for (uint32_t i = 0U; i < I2C_DATA_LENGTH; i++) { if (g_slave_buff[i] != g_master_buff[i]) { PRINTF("\r\nError occured in this transfer ! \r\n"); break; } } PRINTF("Slave received data :"); for (uint32_t i = 0U; i < I2C_DATA_LENGTH; i++) { if (i % 8 == 0) { PRINTF("\r\n"); } PRINTF("0x%2x ", g_slave_buff[i]); } PRINTF("\r\n\r\n"); /*4.Set up slave ready to send data to master.*/ for (uint32_t i = 0U; i < I2C_DATA_LENGTH; i++) { g_slave_buff[i] = ~g_slave_buff[i]; } PRINTF("This time , slave will send data: :"); for (uint32_t i = 0U; i < I2C_DATA_LENGTH; i++) { if (i % 8 == 0) { PRINTF("\r\n"); } PRINTF("0x%2x ", g_slave_buff[i]); } PRINTF("\r\n\r\n"); /* Already setup the slave transfer in item 1 */ /*5.Set up master to receive data from slave.*/ for (uint32_t i = 0U; i < I2C_DATA_LENGTH; i++) { g_master_buff[i] = 0; } masterXfer.slaveAddress = I2C_MASTER_SLAVE_ADDR_7BIT; masterXfer.direction = kI2C_Read; masterXfer.subaddress = 0; masterXfer.subaddressSize = 0; masterXfer.data = g_master_buff; masterXfer.dataSize = I2C_DATA_LENGTH; masterXfer.flags = kI2C_TransferDefaultFlag; I2C_MasterTransferDMA(EXAMPLE_I2C_MASTER_BASEADDR, &g_m_dma_handle, &masterXfer); /* wait for transfer completed. */ while (!completionFlag) { } completionFlag = false; /*6.Transfer completed. Check the data.*/ for (uint32_t i = 0U; i < I2C_DATA_LENGTH; i++) { if (g_slave_buff[i] != g_master_buff[i]) { PRINTF("\r\nError occured in the transfer ! \r\n"); break; } } PRINTF("Master received data :"); for (uint32_t i = 0U; i < I2C_DATA_LENGTH; i++) { if (i % 8 == 0) { PRINTF("\r\n"); } PRINTF("0x%2x ", g_master_buff[i]); } PRINTF("\r\n\r\n"); PRINTF("\r\nEnd of I2C example .\r\n"); while (1) { } }