/**
* Main entry point for the AMD_INIT_MID function.
*
* This entry point is responsible for performing any necessary functions needed
* after PCI bus enumeration and just before control is passed to the video option ROM.
*
* @param[in,out] MidParams Required input parameters for the AMD_INIT_MID
* entry point.
*
* @return Aggregated status across all internal AMD mid calls invoked.
*
*/
AGESA_STATUS
AmdInitMid (
IN OUT AMD_MID_PARAMS *MidParams
)
{
AGESA_STATUS AgesaStatus;
AGESA_STATUS CalledStatus;
IDS_HDT_CONSOLE (MAIN_FLOW, "AmdInitMid: Start\n\n");
AGESA_TESTPOINT (TpIfAmdInitMidEntry, &MidParams->StdHeader);
IDS_PERF_TIME_MEASURE (&MidParams->StdHeader);
AgesaStatus = AGESA_SUCCESS;
ASSERT (MidParams != NULL);
IDS_OPTION_HOOK (IDS_INIT_MID_BEFORE, MidParams, &MidParams->StdHeader);
IDS_HDT_CONSOLE (MAIN_FLOW, "DispatchCpuFeatures: MidStart\n");
CalledStatus = DispatchCpuFeatures (CPU_FEAT_INIT_MID_END, &MidParams->PlatformConfig, &MidParams->StdHeader);
IDS_HDT_CONSOLE (MAIN_FLOW, "DispatchCpuFeatures: MidEnd\n");
if (CalledStatus > AgesaStatus) {
AgesaStatus = CalledStatus;
}
CalledStatus = GnbInitAtMid (MidParams);
if (CalledStatus > AgesaStatus) {
AgesaStatus = CalledStatus;
}
IDS_OPTION_HOOK (IDS_INIT_MID_AFTER, MidParams, &MidParams->StdHeader);
IDS_PERF_TIME_MEASURE (&MidParams->StdHeader);
AGESA_TESTPOINT (TpIfAmdInitMidExit, &MidParams->StdHeader);
IDS_HDT_CONSOLE (MAIN_FLOW, "\nAmdInitMid: End\n\n");
IDS_HDT_CONSOLE_FLUSH_BUFFER (&MidParams->StdHeader);
return AgesaStatus;
}
/**
* Main entry point for the AMD_INIT_LATE function.
*
* This entry point is responsible for creating any desired ACPI tables, providing
* information for DMI, and to prepare the processors for the operating system
* bootstrap load process.
*
* @param[in,out] LateParams Required input parameters for the AMD_INIT_LATE
* entry point.
*
* @return Aggregated status across all internal AMD late calls invoked.
*
*/
AGESA_STATUS
AmdInitLate (
IN OUT AMD_LATE_PARAMS *LateParams
)
{
AGESA_STATUS AgesaStatus;
AGESA_STATUS AmdInitLateStatus;
IDS_HDT_CONSOLE (MAIN_FLOW, "AmdInitLate: Start\n\n");
AGESA_TESTPOINT (TpIfAmdInitLateEntry, &LateParams->StdHeader);
IDS_PERF_TIME_MEASURE (&LateParams->StdHeader);
ASSERT (LateParams != NULL);
AmdInitLateStatus = AGESA_SUCCESS;
IDS_OPTION_HOOK (IDS_INIT_LATE_BEFORE, LateParams, &LateParams->StdHeader);
IDS_HDT_CONSOLE (MAIN_FLOW, "CreatSystemTable: Start\n");
// _PSS, XPSS, _PCT, _PSD, _PPC, _CST, _CSD Tables
if ((LateParams->PlatformConfig.UserOptionPState) || (IsFeatureEnabled (IoCstate, &LateParams->PlatformConfig, &LateParams->StdHeader))) {
AgesaStatus = ((*(OptionPstateLateConfiguration.SsdtFeature)) (&LateParams->StdHeader, &LateParams->PlatformConfig, &LateParams->AcpiPState));
if (AgesaStatus > AmdInitLateStatus) {
AmdInitLateStatus = AgesaStatus;
}
}
// SRAT Table Generation
if (LateParams->PlatformConfig.UserOptionSrat) {
AgesaStatus = CreateAcpiSrat (&LateParams->StdHeader, &LateParams->AcpiSrat);
if (AgesaStatus > AmdInitLateStatus) {
AmdInitLateStatus = AgesaStatus;
}
}
// SLIT Table Generation
if (LateParams->PlatformConfig.UserOptionSlit) {
AgesaStatus = CreateAcpiSlit (&LateParams->StdHeader, &LateParams->PlatformConfig, &LateParams->AcpiSlit);
if (AgesaStatus > AmdInitLateStatus) {
AmdInitLateStatus = AgesaStatus;
}
}
// WHEA Table Generation
if (LateParams->PlatformConfig.UserOptionWhea) {
AgesaStatus = CreateAcpiWhea (&LateParams->StdHeader, &LateParams->AcpiWheaMce, &LateParams->AcpiWheaCmc);
if (AgesaStatus > AmdInitLateStatus) {
AmdInitLateStatus = AgesaStatus;
}
}
// DMI Table Generation
if (LateParams->PlatformConfig.UserOptionDmi) {
AgesaStatus = CreateDmiRecords (&LateParams->StdHeader, &LateParams->DmiTable);
if (AgesaStatus > AmdInitLateStatus) {
AmdInitLateStatus = AgesaStatus;
}
}
IDS_HDT_CONSOLE (MAIN_FLOW, "CreatSystemTable: End\n");
// Cpu Features
IDS_HDT_CONSOLE (MAIN_FLOW, "DispatchCpuFeatures: LateStart\n");
AgesaStatus = DispatchCpuFeatures (CPU_FEAT_INIT_LATE_END, &LateParams->PlatformConfig, &LateParams->StdHeader);
IDS_HDT_CONSOLE (MAIN_FLOW, "DispatchCpuFeatures: LateEnd\n");
if (AgesaStatus > AmdInitLateStatus) {
AmdInitLateStatus = AgesaStatus;
}
// It is the last function run by the AGESA CPU module and prepares the processor
// for the operating system bootstrap load process.
IDS_HDT_CONSOLE (MAIN_FLOW, "AmdCpuLate: Start\n");
AgesaStatus = AmdCpuLate (&LateParams->StdHeader);
IDS_HDT_CONSOLE (MAIN_FLOW, "AmdCpuLate: End\n");
if (AgesaStatus > AmdInitLateStatus) {
AmdInitLateStatus = AgesaStatus;
}
AgesaStatus = GnbInitAtLate (LateParams);
if (AgesaStatus > AmdInitLateStatus) {
AmdInitLateStatus = AgesaStatus;
}
IDS_OPTION_HOOK (IDS_INIT_LATE_AFTER, LateParams, &LateParams->StdHeader);
IDS_OPTION_HOOK (IDS_BEFORE_OS, LateParams, &LateParams->StdHeader);
IDS_PERF_TIME_MEASURE (&LateParams->StdHeader);
AGESA_TESTPOINT (TpIfAmdInitLateExit, &LateParams->StdHeader);
IDS_HDT_CONSOLE (MAIN_FLOW, "\nAmdInitLate: End\n\n");
AGESA_TESTPOINT (EndAgesaTps, &LateParams->StdHeader);
//End Debug Print Service
IDS_HDT_CONSOLE_EXIT (&LateParams->StdHeader);
return AmdInitLateStatus;
}
/**
* Main entry point for the AMD_INIT_LATE function.
*
* This entry point is responsible for creating any desired ACPI tables, providing
* information for DMI, and to prepare the processors for the operating system
* bootstrap load process.
*
* @param[in,out] LateParams Required input parameters for the AMD_INIT_LATE
* entry point.
*
* @return Aggregated status across all internal AMD late calls invoked.
*
*/
AGESA_STATUS
AmdInitLate (
IN OUT AMD_LATE_PARAMS *LateParams
)
{
AGESA_STATUS AgesaStatus;
AGESA_STATUS AmdInitLateStatus;
AGESA_TESTPOINT (TpIfAmdInitLateEntry, &LateParams->StdHeader);
IDS_PERF_TIME_MEASURE (&LateParams->StdHeader);
ASSERT (LateParams != NULL);
AmdInitLateStatus = AGESA_SUCCESS;
IDS_OPTION_HOOK (IDS_INIT_LATE_BEFORE, LateParams, &LateParams->StdHeader);
// _PSS, XPSS, _PCT, _PSD, _PPC Tables
if (LateParams->PlatformConfig.UserOptionPState) {
AgesaStatus = CreateAcpiTables (&LateParams->StdHeader, &LateParams->PlatformConfig, &LateParams->AcpiPState);
if (AgesaStatus > AmdInitLateStatus) {
AmdInitLateStatus = AgesaStatus;
}
}
// SRAT Table Generation
if (LateParams->PlatformConfig.UserOptionSrat) {
AgesaStatus = CreateAcpiSrat (&LateParams->StdHeader, &LateParams->AcpiSrat);
if (AgesaStatus > AmdInitLateStatus) {
AmdInitLateStatus = AgesaStatus;
}
}
// SLIT Table Generation
if (LateParams->PlatformConfig.UserOptionSlit) {
AgesaStatus = CreateAcpiSlit (&LateParams->StdHeader, &LateParams->PlatformConfig, &LateParams->AcpiSlit);
if (AgesaStatus > AmdInitLateStatus) {
AmdInitLateStatus = AgesaStatus;
}
}
// WHEA Table Generation
if (LateParams->PlatformConfig.UserOptionWhea) {
AgesaStatus = CreateAcpiWhea (&LateParams->StdHeader, &LateParams->AcpiWheaMce, &LateParams->AcpiWheaCmc);
if (AgesaStatus > AmdInitLateStatus) {
AmdInitLateStatus = AgesaStatus;
}
}
// DMI Table Generation
if (LateParams->PlatformConfig.UserOptionDmi) {
AgesaStatus = CreateDmiRecords (&LateParams->StdHeader, &LateParams->DmiTable);
if (AgesaStatus > AmdInitLateStatus) {
AmdInitLateStatus = AgesaStatus;
}
}
// Cpu Features
AgesaStatus = DispatchCpuFeatures (CPU_FEAT_INIT_LATE_END, &LateParams->PlatformConfig, &LateParams->StdHeader);
if (AgesaStatus > AmdInitLateStatus) {
AmdInitLateStatus = AgesaStatus;
}
// It is the last function run by the AGESA CPU module and prepares the processor
// for the operating system bootstrap load process.
AgesaStatus = AmdCpuLate (&LateParams->StdHeader);
if (AgesaStatus > AmdInitLateStatus) {
AmdInitLateStatus = AgesaStatus;
}
IDS_OPTION_HOOK (IDS_INIT_LATE_AFTER, LateParams, &LateParams->StdHeader);
IDS_OPTION_HOOK (IDS_BEFORE_OS, LateParams, &LateParams->StdHeader);
IDS_PERF_TIME_MEASURE (&LateParams->StdHeader);
AGESA_TESTPOINT (TpIfAmdInitLateExit, &LateParams->StdHeader);
AGESA_TESTPOINT (EndAgesaTps, &LateParams->StdHeader);
return AmdInitLateStatus;
}
/**
* Perform initialization services required at the Early Init POST time point.
*
* Execution Cache, HyperTransport, and AP Init advanced services are performed.
*
* @param[in] EarlyParams The interface struct for all early services
*
* @return The most severe AGESA_STATUS returned by any called service.
*
*/
AGESA_STATUS
AmdInitEarly (
IN OUT AMD_EARLY_PARAMS *EarlyParams
)
{
AGESA_STATUS CalledAgesaStatus;
AGESA_STATUS EarlyInitStatus;
WARM_RESET_REQUEST Request;
AGESA_TESTPOINT (TpIfAmdInitEarlyEntry, &EarlyParams->StdHeader);
IDS_PERF_TIME_MEASURE (&EarlyParams->StdHeader);
ASSERT (EarlyParams != NULL);
EarlyInitStatus = AGESA_SUCCESS;
GetWarmResetFlag (&EarlyParams->StdHeader, &Request);
Request.RequestBit = FALSE;
SetWarmResetFlag (&EarlyParams->StdHeader, &Request);
IDS_OPTION_HOOK (IDS_INIT_EARLY_BEFORE, EarlyParams, &EarlyParams->StdHeader);
// Setup ROM execution cache
CalledAgesaStatus = AllocateExecutionCache (&EarlyParams->StdHeader, &EarlyParams->CacheRegion[0]);
if (CalledAgesaStatus > EarlyInitStatus) {
EarlyInitStatus = CalledAgesaStatus;
}
// Full Hypertransport Initialization
// IMPORTANT: All AP cores call Ht Init. HT Init handles full init for the BSC, and map init for APs.
CalledAgesaStatus = AmdHtInitialize (&EarlyParams->StdHeader, &EarlyParams->PlatformConfig, &EarlyParams->HtConfig);
if (CalledAgesaStatus > EarlyInitStatus) {
EarlyInitStatus = CalledAgesaStatus;
}
// AP launch
CalledAgesaStatus = AmdCpuEarly (&EarlyParams->StdHeader, &EarlyParams->PlatformConfig);
if (CalledAgesaStatus > EarlyInitStatus) {
EarlyInitStatus = CalledAgesaStatus;
}
// Warm Rest, should be at the end of AmdInitEarly
GetWarmResetFlag (&EarlyParams->StdHeader, &Request);
if (Request.RequestBit == TRUE) {
Request.RequestBit = FALSE;
Request.StateBits = WR_STATE_EARLY;
SetWarmResetFlag (&EarlyParams->StdHeader, &Request);
AgesaDoReset (WARM_RESET_WHENEVER, &EarlyParams->StdHeader);
} else {
if (Request.StateBits < WR_STATE_EARLY) {
Request.StateBits = WR_STATE_EARLY;
SetWarmResetFlag (&EarlyParams->StdHeader, &Request);
}
}
CalledAgesaStatus = GnbInitAtEarly (
&EarlyParams->StdHeader,
&EarlyParams->PlatformConfig,
&EarlyParams->GnbConfig
);
if (CalledAgesaStatus > EarlyInitStatus) {
EarlyInitStatus = CalledAgesaStatus;
}
// Check for Cache As Ram Corruption
IDS_CAR_CORRUPTION_CHECK (&EarlyParams->StdHeader);
IDS_OPTION_HOOK (IDS_AFTER_WARM_RESET, EarlyParams, &EarlyParams->StdHeader);
IDS_OPTION_HOOK (IDS_INIT_EARLY_AFTER, EarlyParams, &EarlyParams->StdHeader);
IDS_PERF_TIME_MEASURE (&EarlyParams->StdHeader);
AGESA_TESTPOINT (TpIfAmdInitEarlyExit, &EarlyParams->StdHeader);
return EarlyInitStatus;
}