static int imx_pinctrl_parse_groups(struct device_node *np, struct imx_pin_group *grp, struct imx_pinctrl_soc_info *info, u32 index) { unsigned int pin_func_id; int ret, size; const __be32 *list; int i, j; u32 config; dev_dbg(info->dev, "group(%d): %s\n", index, np->name); /* Initialise group */ grp->name = np->name; /* * the binding format is fsl,pins = <PIN_FUNC_ID CONFIG ...>, * do sanity check and calculate pins number */ list = of_get_property(np, "fsl,pins", &size); /* we do not check return since it's safe node passed down */ size /= sizeof(*list); if (!size || size % 2) { dev_err(info->dev, "wrong pins number or pins and configs should be pairs\n"); return -EINVAL; } grp->npins = size / 2; grp->pins = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned int), GFP_KERNEL); grp->mux_mode = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned int), GFP_KERNEL); grp->configs = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned long), GFP_KERNEL); for (i = 0, j = 0; i < size; i += 2, j++) { pin_func_id = be32_to_cpu(*list++); ret = imx_pinctrl_get_pin_id_and_mux(info, pin_func_id, &grp->pins[j], &grp->mux_mode[j]); if (ret) { dev_err(info->dev, "get invalid pin function id\n"); return -EINVAL; } /* SION bit is in mux register */ config = be32_to_cpu(*list++); if (config & IMX_PAD_SION) grp->mux_mode[j] |= IOMUXC_CONFIG_SION; grp->configs[j] = config & ~IMX_PAD_SION; } #ifdef DEBUG IMX_PMX_DUMP(info, grp->pins, grp->mux_mode, grp->configs, grp->npins); #endif return 0; }
static int imx_pinctrl_parse_groups(struct device_node *np, struct imx_pin_group *grp, struct imx_pinctrl_soc_info *info, u32 index) { int size, pin_size; const __be32 *list; int i; u32 config; dev_dbg(info->dev, "group(%d): %s\n", index, np->name); if (info->flags & SHARE_MUX_CONF_REG) pin_size = SHARE_FSL_PIN_SIZE; else pin_size = FSL_PIN_SIZE; /* Initialise group */ grp->name = np->name; /* * the binding format is fsl,pins = <PIN_FUNC_ID CONFIG ...>, * do sanity check and calculate pins number */ list = of_get_property(np, "fsl,pins", &size); /* we do not check return since it's safe node passed down */ if (!size || size % pin_size) { dev_err(info->dev, "Invalid fsl,pins property\n"); return -EINVAL; } grp->npins = size / pin_size; grp->pins = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned int), GFP_KERNEL); grp->mux_mode = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned int), GFP_KERNEL); grp->input_reg = devm_kzalloc(info->dev, grp->npins * sizeof(u16), GFP_KERNEL); grp->input_val = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned int), GFP_KERNEL); grp->configs = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned long), GFP_KERNEL); for (i = 0; i < grp->npins; i++) { u32 mux_reg = be32_to_cpu(*list++); u32 conf_reg; unsigned int pin_id; struct imx_pin_reg *pin_reg; if (info->flags & SHARE_MUX_CONF_REG) conf_reg = mux_reg; else conf_reg = be32_to_cpu(*list++); pin_id = mux_reg ? mux_reg / 4 : conf_reg / 4; pin_reg = &info->pin_regs[pin_id]; grp->pins[i] = pin_id; pin_reg->mux_reg = mux_reg; pin_reg->conf_reg = conf_reg; grp->input_reg[i] = be32_to_cpu(*list++); grp->mux_mode[i] = be32_to_cpu(*list++); grp->input_val[i] = be32_to_cpu(*list++); /* SION bit is in mux register */ config = be32_to_cpu(*list++); if (config & IMX_PAD_SION) grp->mux_mode[i] |= IOMUXC_CONFIG_SION; grp->configs[i] = config & ~IMX_PAD_SION; } #ifdef DEBUG IMX_PMX_DUMP(info, grp->pins, grp->mux_mode, grp->configs, grp->npins); #endif return 0; }