VOID Instruction(INS ins, VOID *v) { CheckXlat(ins); // Some checking of properties INS_HasProperty(ins, INS_PROP_IPF_LOAD_SPECULATIVE); INS_HasProperty(ins, INS_PROP_IPF_LOAD_CHECK); INS_HasProperty(ins, INS_PROP_IPF_LOAD_ADVANCED); INS_HasProperty(ins, INS_PROP_IPF_LOAD_ORDERED); INS_HasProperty(ins, INS_PROP_IPF_LOAD_BIASED); INS_HasProperty(ins, INS_PROP_IPF_ALAT_CLEAR); INS_HasProperty(ins, INS_PROP_IPF_STOP); INS_HasProperty(ins, INS_PROP_IPF_DOUBLE_SYLLABLE); INS_InsertCall(ins, IPOINT_BEFORE, (AFUNPTR)CheckFlow, IARG_INST_PTR, IARG_BRANCH_TAKEN, IARG_FALLTHROUGH_ADDR, IARG_BRANCH_TARGET_ADDR, IARG_UINT32, INS_Stutters(ins), IARG_END); if (INS_IsBranchOrCall(ins)) { INS_InsertCall(ins, IPOINT_TAKEN_BRANCH, (AFUNPTR)Taken, IARG_END); } #if defined(TARGET_IA32) || defined(TARGET_IA32E) if (INS_IsSysenter(ins)) { // sysenter on x86 has some funny control flow that we can't correctly verify for now INS_InsertCall(ins, IPOINT_BEFORE, (AFUNPTR)Skip, IARG_END); } #endif }
VOID Trace(TRACE trace, VOID *v) { static BOOL programStart = TRUE; if (programStart) { programStart = FALSE; next_pc = (void*)INS_Address(BBL_InsHead(TRACE_BblHead(trace))); } for (BBL bbl = TRACE_BblHead(trace); BBL_Valid(bbl); bbl = BBL_Next(bbl)) { // check BBL entry PC INS_InsertCall( BBL_InsHead(bbl), IPOINT_BEFORE, (AFUNPTR)CheckPc, IARG_INST_PTR, IARG_END); INS tail = BBL_InsTail(bbl); if (INS_IsBranchOrCall(tail)) { // record taken branch targets INS_InsertCall( tail, IPOINT_BEFORE, AFUNPTR(RecordPc), IARG_INST_PTR, IARG_BRANCH_TARGET_ADDR, IARG_BRANCH_TAKEN, IARG_END); } if (INS_HasFallThrough(tail)) { // record fall-through INS_InsertCall( tail, IPOINT_AFTER, (AFUNPTR)RecordPc, IARG_INST_PTR, IARG_FALLTHROUGH_ADDR, IARG_BOOL, TRUE, IARG_END); } #if defined(TARGET_IA32) || defined(TARGET_IA32E) if (INS_IsSysenter(tail) || INS_HasRealRep(tail)) { // sysenter on x86 has some funny control flow that we can't correctly verify for now // Genuinely REP prefixed instructions are also odd, they appear to stutter. INS_InsertCall(tail, IPOINT_BEFORE, (AFUNPTR)Skip, IARG_END); } #endif } }