/**
* @brief Clears the DMAy Channelx's interrupt pending bits.
* @param DMA_IT: specifies the DMA interrupt pending bit to clear.
* This parameter can be any combination (for the same DMA) of the following values:
* @arg DMA1_IT_GL1: DMA1 Channel1 global interrupt.
* @arg DMA1_IT_TC1: DMA1 Channel1 transfer complete interrupt.
* @arg DMA1_IT_HT1: DMA1 Channel1 half transfer interrupt.
* @arg DMA1_IT_TE1: DMA1 Channel1 transfer error interrupt.
* @arg DMA1_IT_GL2: DMA1 Channel2 global interrupt.
* @arg DMA1_IT_TC2: DMA1 Channel2 transfer complete interrupt.
* @arg DMA1_IT_HT2: DMA1 Channel2 half transfer interrupt.
* @arg DMA1_IT_TE2: DMA1 Channel2 transfer error interrupt.
* @arg DMA1_IT_GL3: DMA1 Channel3 global interrupt.
* @arg DMA1_IT_TC3: DMA1 Channel3 transfer complete interrupt.
* @arg DMA1_IT_HT3: DMA1 Channel3 half transfer interrupt.
* @arg DMA1_IT_TE3: DMA1 Channel3 transfer error interrupt.
* @arg DMA1_IT_GL4: DMA1 Channel4 global interrupt.
* @arg DMA1_IT_TC4: DMA1 Channel4 transfer complete interrupt.
* @arg DMA1_IT_HT4: DMA1 Channel4 half transfer interrupt.
* @arg DMA1_IT_TE4: DMA1 Channel4 transfer error interrupt.
* @arg DMA1_IT_GL5: DMA1 Channel5 global interrupt.
* @arg DMA1_IT_TC5: DMA1 Channel5 transfer complete interrupt.
* @arg DMA1_IT_HT5: DMA1 Channel5 half transfer interrupt.
* @arg DMA1_IT_TE5: DMA1 Channel5 transfer error interrupt.
*
* @note
* Clearing the Global interrupt (DMAy_IT_GLx) results in clearing all other
* interrupts relative to the same channel (Transfer Complete, Half-transfer
* Complete and Transfer Error interrupts: DMAy_IT_TCx, DMAy_IT_HTx and
* DMAy_IT_TEx).
*
* @retval None
*/
void DMA_ClearITPendingBit(uint32_t DMA_IT)
{
/* Check the parameters */
assert_param(IS_DMA_CLEAR_IT(DMA_IT));
/* Clear the selected DMA interrupt pending bits */
DMA1->IFCR = DMA_IT;
}
/*******************************************************************************
* Function Name : DMA_ClearITPendingBit
* Description : Clears the DMA’s interrupt pending bits.
* Input : - DMA_IT: specifies the DMA interrupt pending bit to clear.
* This parameter can be any combination of the following values:
* - DMA_IT_GL1: Channel1 global interrupt.
* - DMA_IT_TC1: Channel1 transfer complete interrupt.
* - DMA_IT_HT1: Channel1 half transfer interrupt.
* - DMA_IT_TE1: Channel1 transfer error interrupt.
* - DMA_IT_GL2: Channel2 global interrupt.
* - DMA_IT_TC2: Channel2 transfer complete interrupt.
* - DMA_IT_HT2: Channel2 half transfer interrupt.
* - DMA_IT_TE2: Channel2 transfer error interrupt.
* - DMA_IT_GL3: Channel3 global interrupt.
* - DMA_IT_TC3: Channel3 transfer complete interrupt.
* - DMA_IT_HT3: Channel3 half transfer interrupt.
* - DMA_IT_TE3: Channel3 transfer error interrupt.
* - DMA_IT_GL4: Channel4 global interrupt.
* - DMA_IT_TC4: Channel4 transfer complete interrupt.
* - DMA_IT_HT4: Channel4 half transfer interrupt.
* - DMA_IT_TE4: Channel4 transfer error interrupt.
* - DMA_IT_GL5: Channel5 global interrupt.
* - DMA_IT_TC5: Channel5 transfer complete interrupt.
* - DMA_IT_HT5: Channel5 half transfer interrupt.
* - DMA_IT_TE5: Channel5 transfer error interrupt.
* - DMA_IT_GL6: Channel6 global interrupt.
* - DMA_IT_TC6: Channel6 transfer complete interrupt.
* - DMA_IT_HT6: Channel6 half transfer interrupt.
* - DMA_IT_TE6: Channel6 transfer error interrupt.
* - DMA_IT_GL7: Channel7 global interrupt.
* - DMA_IT_TC7: Channel7 transfer complete interrupt.
* - DMA_IT_HT7: Channel7 half transfer interrupt.
* - DMA_IT_TE7: Channel7 transfer error interrupt.
* Output : None
* Return : None
*******************************************************************************/
void DMA_ClearITPendingBit(uint32 DMA_IT)
{
/* Check the parameters */
ASSERT(IS_DMA_CLEAR_IT(DMA_IT));
/* Clear the selected DMA interrupt pending bits */
DMA->IFCR = DMA_IT;
}
/**
* @brief Clears the DMAy Channelx’s interrupt pending bits.
* @param DMA_IT: specifies the DMA interrupt pending bit to clear.
* This parameter can be any combination (for the same DMA) of the following values:
* @arg DMA1_IT_GL1: DMA1 Channel1 global interrupt.
* @arg DMA1_IT_TC1: DMA1 Channel1 transfer complete interrupt.
* @arg DMA1_IT_HT1: DMA1 Channel1 half transfer interrupt.
* @arg DMA1_IT_TE1: DMA1 Channel1 transfer error interrupt.
* @arg DMA1_IT_GL2: DMA1 Channel2 global interrupt.
* @arg DMA1_IT_TC2: DMA1 Channel2 transfer complete interrupt.
* @arg DMA1_IT_HT2: DMA1 Channel2 half transfer interrupt.
* @arg DMA1_IT_TE2: DMA1 Channel2 transfer error interrupt.
* @arg DMA1_IT_GL3: DMA1 Channel3 global interrupt.
* @arg DMA1_IT_TC3: DMA1 Channel3 transfer complete interrupt.
* @arg DMA1_IT_HT3: DMA1 Channel3 half transfer interrupt.
* @arg DMA1_IT_TE3: DMA1 Channel3 transfer error interrupt.
* @arg DMA1_IT_GL4: DMA1 Channel4 global interrupt.
* @arg DMA1_IT_TC4: DMA1 Channel4 transfer complete interrupt.
* @arg DMA1_IT_HT4: DMA1 Channel4 half transfer interrupt.
* @arg DMA1_IT_TE4: DMA1 Channel4 transfer error interrupt.
* @arg DMA1_IT_GL5: DMA1 Channel5 global interrupt.
* @arg DMA1_IT_TC5: DMA1 Channel5 transfer complete interrupt.
* @arg DMA1_IT_HT5: DMA1 Channel5 half transfer interrupt.
* @arg DMA1_IT_TE5: DMA1 Channel5 transfer error interrupt.
* @arg DMA1_IT_GL6: DMA1 Channel6 global interrupt.
* @arg DMA1_IT_TC6: DMA1 Channel6 transfer complete interrupt.
* @arg DMA1_IT_HT6: DMA1 Channel6 half transfer interrupt.
* @arg DMA1_IT_TE6: DMA1 Channel6 transfer error interrupt.
* @arg DMA1_IT_GL7: DMA1 Channel7 global interrupt.
* @arg DMA1_IT_TC7: DMA1 Channel7 transfer complete interrupt.
* @arg DMA1_IT_HT7: DMA1 Channel7 half transfer interrupt.
* @arg DMA1_IT_TE7: DMA1 Channel7 transfer error interrupt.
*
* @note
* Clearing the Global interrupt (DMAy_IT_GLx) results in clearing all other
* interrupts relative to the same channel (Transfer Complete, Half-transfer
* Complete and Transfer Error interrupts: DMAy_IT_TCx, DMAy_IT_HTx and
* DMAy_IT_TEx).
*
* @retval None
*/
void DMA_ClearITPendingBit(uint32_t DMA_IT)
{
/* Check the parameters */
assert_param(IS_DMA_CLEAR_IT(DMA_IT));
/* Calculate the used DMA */
if ((DMA_IT & FLAG_MASK) == (uint32_t)RESET)
{
/* Clear the selected DMA interrupt pending bits */
DMA1->IFCR = DMA_IT;
}
}
/**
* @簡述 清除 DMA y 通道 x 中斷待處理標誌位.
* @參數 DMA_IT: 指定的 DMA 中斷掛起位.
* 這個參數可以是下面的值之一:
* DMA1_IT_GL1: DMA1 通道1 全局中斷.
* DMA1_IT_TC1: DMA1 通道1 傳輸完成中斷.
* DMA1_IT_HT1: DMA1 通道1 半傳輸中斷.
* DMA1_IT_TE1: DMA1 通道1 傳輸錯誤中斷.
* DMA1_IT_GL2: DMA1 通道2 全局中斷.
* DMA1_IT_TC2: DMA1 通道2 傳輸完成中斷.
* DMA1_IT_HT2: DMA1 通道2 半傳輸中斷.
* DMA1_IT_TE2: DMA1 通道2 傳輸錯誤中斷.
* DMA1_IT_GL3: DMA1 通道3 全局中斷.
* DMA1_IT_TC3: DMA1 通道3 傳輸完成中斷.
* DMA1_IT_HT3: DMA1 通道3 半傳輸中斷.
* DMA1_IT_TE3: DMA1 通道3 傳輸錯誤中斷.
* DMA1_IT_GL4: DMA1 通道4 全局中斷.
* DMA1_IT_TC4: DMA1 通道4 傳輸完成中斷.
* DMA1_IT_HT4: DMA1 通道4 半傳輸中斷.
* DMA1_IT_TE4: DMA1 通道4 傳輸錯誤中斷.
* DMA1_IT_GL5: DMA1 通道5 全局中斷.
* DMA1_IT_TC5: DMA1 通道5 傳輸完成中斷.
* DMA1_IT_HT5: DMA1 通道5 半傳輸中斷.
* DMA1_IT_TE5: DMA1 通道5 傳輸錯誤中斷.
* DMA1_IT_GL6: DMA1 通道6 全局中斷.
* DMA1_IT_TC6: DMA1 通道6 傳輸完成中斷.
* DMA1_IT_HT6: DMA1 通道6 半傳輸中斷.
* DMA1_IT_TE6: DMA1 通道6 傳輸錯誤中斷.
* DMA1_IT_GL7: DMA1 通道7 全局中斷.
* DMA1_IT_TC7: DMA1 通道7 傳輸完成中斷.
* DMA1_IT_HT7: DMA1 通道7 半傳輸中斷.
* DMA1_IT_TE7: DMA1 通道7 傳輸錯誤中斷.
* DMA2_IT_GL1: DMA2 通道1 全局中斷.
* DMA2_IT_TC1: DMA2 通道1 傳輸完成中斷.
* DMA2_IT_HT1: DMA2 通道1 半傳輸中斷.
* DMA2_IT_TE1: DMA2 通道1 傳輸錯誤中斷.
* DMA2_IT_GL2: DMA2 通道2 全局中斷.
* DMA2_IT_TC2: DMA2 通道2 傳輸完成中斷.
* DMA2_IT_HT2: DMA2 通道2 半傳輸中斷.
* DMA2_IT_TE2: DMA2 通道2 傳輸錯誤中斷.
* DMA2_IT_GL3: DMA2 通道3 全局中斷.
* DMA2_IT_TC3: DMA2 通道3 傳輸完成中斷.
* DMA2_IT_HT3: DMA2 通道3 半傳輸中斷.
* DMA2_IT_TE3: DMA2 通道3 傳輸錯誤中斷.
* DMA2_IT_GL4: DMA2 通道4 全局中斷.
* DMA2_IT_TC4: DMA2 通道4 傳輸完成中斷.
* DMA2_IT_HT4: DMA2 通道4 半傳輸中斷.
* DMA2_IT_TE4: DMA2 通道4 傳輸錯誤中斷.
* DMA2_IT_GL5: DMA2 通道5 全局中斷.
* DMA2_IT_TC5: DMA2 通道5 傳輸完成中斷.
* DMA2_IT_HT5: DMA2 通道5 半傳輸中斷.
* DMA2_IT_TE5: DMA2 通道5 傳輸錯誤中斷.
* @返回 沒有
*/
void DMA_ClearITPendingBit(uint32_t DMA_IT)
{
/* 檢查參數 */
assert_param(IS_DMA_CLEAR_IT(DMA_IT));
/* 計算使用的 DMA */
if ((DMA_IT & FLAG_Mask) != (uint32_t)RESET)
{
/* 清除選擇的DMA中斷掛起位 */
DMA2->IFCR = DMA_IT;
}
else
{
/* 清除選擇的DMA中斷掛起位 */
DMA1->IFCR = DMA_IT;
}
}
