void InitEPwmGpio(void)
{
#if DSP28_EPWM1
InitEPwm1Gpio();
#endif // endif DSP28_EPWM1
#if DSP28_EPWM2
InitEPwm2Gpio();
#endif // endif DSP28_EPWM2
#if DSP28_EPWM3
InitEPwm3Gpio();
#endif // endif DSP28_EPWM3
#if DSP28_EPWM4
InitEPwm4Gpio();
#endif // endif DSP28_EPWM4
#if DSP28_EPWM5
InitEPwm5Gpio();
#endif // endif DSP28_EPWM5
#if DSP28_EPWM6
InitEPwm6Gpio();
#endif // endif DSP28_EPWM6
#if DSP28_EPWM7
InitEPwm7Gpio();
#endif // endif DSP28_EPWM7
#if DSP28_EPWM8
InitEPwm8Gpio();
#endif // endif DSP28_EPWM8
}
void InitEPwmGpio(void)
{
InitEPwm1Gpio();
InitEPwm2Gpio();
InitEPwm3Gpio();
InitEPwm4Gpio();
#if DSP28_EPWM5
InitEPwm5Gpio();
#endif // endif DSP28_EPWM5
#if DSP28_EPWM6
InitEPwm6Gpio();
#endif // endif DSP28_EPWM6
}
static void init_peripherals_drivers(void)
{
uint16_t i;
/// Initialization of HRADC boards
stop_DMA();
decimation_factor = (uint16_t) roundf(HRADC_FREQ_SAMP / ISR_CONTROL_FREQ);
decimation_coeff = 1.0 / (float) decimation_factor;
HRADCs_Info.enable_Sampling = 0;
HRADCs_Info.n_HRADC_boards = NUM_HRADC_BOARDS;
Init_DMA_McBSP_nBuffers(NUM_HRADC_BOARDS, decimation_factor, HRADC_SPI_CLK);
Init_SPIMaster_McBSP(HRADC_SPI_CLK);
Init_SPIMaster_Gpio();
InitMcbspa20bit();
DELAY_US(500000);
send_ipc_lowpriority_msg(0,Enable_HRADC_Boards);
DELAY_US(2000000);
for(i = 0; i < NUM_HRADC_BOARDS; i++)
{
Init_HRADC_Info(&HRADCs_Info.HRADC_boards[i], i, decimation_factor,
buffers_HRADC[i], TRANSDUCER_GAIN[i]);
Config_HRADC_board(&HRADCs_Info.HRADC_boards[i], TRANSDUCER_OUTPUT_TYPE[i],
HRADC_HEATER_ENABLE[i], HRADC_MONITOR_ENABLE[i]);
}
Config_HRADC_SoC(HRADC_FREQ_SAMP);
/**
*
* Initialization of PWM modules. PWM signals are mapped as the following:
*
* ePWM => Signal POF transmitter
* channel Name on BCB
*
* ePWM1A => Q1_MOD_1 PWM1
* ePWM1B => Q1_MOD_5 PWM2
* ePWM2A => Q2_MOD_1 PWM3
* ePWM2B => Q2_MOD_5 PWM4
* ePWM3A => Q1_MOD_2 PWM5
* ePWM3B => Q1_MOD_6 PWM6
* ePWM4A => Q2_MOD_2 PWM7
* ePWM4B => Q2_MOD_6 PWM8
* ePWM5A => Q1_MOD_3 PWM9
* ePWM5B => Q1_MOD_7 PWM10
* ePWM6A => Q2_MOD_3 PWM11
* ePWM6B => Q2_MOD_7 PWM12
* ePWM7A => Q1_MOD_4 PWM13
* ePWM7B => Q1_MOD_8 PWM14
* ePWM8A => Q2_MOD_4 PWM15
* ePWM8B => Q2_MOD_8 PWM16
*
*/
g_pwm_modules.num_modules = 8;
PWM_MODULATOR_Q1_MOD_1_5 = &EPwm1Regs;
PWM_MODULATOR_Q2_MOD_1_5 = &EPwm2Regs;
PWM_MODULATOR_Q1_MOD_2_6 = &EPwm3Regs;
PWM_MODULATOR_Q2_MOD_2_6 = &EPwm4Regs;
PWM_MODULATOR_Q1_MOD_3_7 = &EPwm5Regs;
PWM_MODULATOR_Q2_MOD_3_7 = &EPwm6Regs;
PWM_MODULATOR_Q1_MOD_4_8 = &EPwm7Regs;
PWM_MODULATOR_Q2_MOD_4_8 = &EPwm8Regs;
disable_pwm_outputs();
disable_pwm_tbclk();
init_pwm_mep_sfo();
init_pwm_module(PWM_MODULATOR_Q1_MOD_1_5, PWM_FREQ, 0, PWM_Sync_Master, 0,
PWM_ChB_Independent, PWM_DEAD_TIME);
init_pwm_module(PWM_MODULATOR_Q2_MOD_1_5, PWM_FREQ, 1, PWM_Sync_Slave, 180,
PWM_ChB_Independent, PWM_DEAD_TIME);
cfg_pwm_module_h_brigde_q2(PWM_MODULATOR_Q2_MOD_1_5);
init_pwm_module(PWM_MODULATOR_Q1_MOD_2_6, PWM_FREQ, 0, PWM_Sync_Slave, 45,
PWM_ChB_Independent, PWM_DEAD_TIME);
init_pwm_module(PWM_MODULATOR_Q2_MOD_2_6, PWM_FREQ, 3, PWM_Sync_Slave, 225,
PWM_ChB_Independent, PWM_DEAD_TIME);
cfg_pwm_module_h_brigde_q2(PWM_MODULATOR_Q2_MOD_2_6);
init_pwm_module(PWM_MODULATOR_Q1_MOD_3_7, PWM_FREQ, 0, PWM_Sync_Slave, 90,
PWM_ChB_Independent, PWM_DEAD_TIME);
init_pwm_module(PWM_MODULATOR_Q2_MOD_3_7, PWM_FREQ, 5, PWM_Sync_Slave, 270,
PWM_ChB_Independent, PWM_DEAD_TIME);
cfg_pwm_module_h_brigde_q2(PWM_MODULATOR_Q2_MOD_3_7);
init_pwm_module(PWM_MODULATOR_Q1_MOD_4_8, PWM_FREQ, 0, PWM_Sync_Slave, 135,
PWM_ChB_Independent, PWM_DEAD_TIME);
init_pwm_module(PWM_MODULATOR_Q2_MOD_4_8, PWM_FREQ, 7, PWM_Sync_Slave, 315,
PWM_ChB_Independent, PWM_DEAD_TIME);
cfg_pwm_module_h_brigde_q2(PWM_MODULATOR_Q2_MOD_4_8);
InitEPwm1Gpio();
InitEPwm2Gpio();
InitEPwm3Gpio();
InitEPwm4Gpio();
InitEPwm5Gpio();
InitEPwm6Gpio();
InitEPwm7Gpio();
InitEPwm8Gpio();
/// Initialization of timers
InitCpuTimers();
ConfigCpuTimer(&CpuTimer0, C28_FREQ_MHZ, 1000000);
CpuTimer0Regs.TCR.bit.TIE = 0;
}
//
// Main
//
void main(void)
{
//
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the F2837xS_SysCtrl.c file.
//
InitSysCtrl();
//
// Step 2. Initialize GPIO:
// This example function is found in the F2837xS_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
//
// InitGpio();
//
// enable PWM2, PWM6, PWM7 and PWM8
//
CpuSysRegs.PCLKCR2.bit.EPWM2=1;
CpuSysRegs.PCLKCR2.bit.EPWM6=1;
CpuSysRegs.PCLKCR2.bit.EPWM7=1;
CpuSysRegs.PCLKCR2.bit.EPWM8=1;
//
// For this case just init GPIO pins for PWM2, PWM6, PWM7 and PWM8
// These functions are in the F2837xS_EPwm.c file
//
InitEPwm2Gpio(); //
InitEPwm6Gpio();
InitEPwm7Gpio();
InitEPwm8Gpio();
//
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
//
DINT;
//
// Initialize the PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the F2837xS_PieCtrl.c file.
//
InitPieCtrl();
//
// Disable CPU interrupts and clear all CPU interrupt flags:
//
IER = 0x0000;
IFR = 0x0000;
//
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in F2837xS_DefaultIsr.c.
// This function is found in F2837xS_PieVect.c.
//
InitPieVectTable();
//
// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
//
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.EPWM2_INT = &epwm2_isr;
PieVectTable.EPWM6_INT = &epwm6_isr;
PieVectTable.EPWM7_INT = &epwm7_isr;
PieVectTable.EPWM8_INT = &epwm8_isr;
EDIS; // This is needed to disable write to EALLOW protected registers
//
// For this example, only initialize the ePWM
//
EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 0;
EDIS;
InitEPwm2Example();
InitEPwm6Example();
InitEPwm7Example();
InitEPwm8Example();
EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1;
EDIS;
//
// Step 4. User specific code, enable interrupts:
//
//
// Enable CPU INT3 which is connected to EPWM1-3 INT:
//
IER |= M_INT3;
//
// Enable EPWM INTn in the PIE: Group 3 interrupt 1-3
//
PieCtrlRegs.PIEIER3.bit.INTx2 = 1;
PieCtrlRegs.PIEIER3.bit.INTx6 = 1; // ePWM6
PieCtrlRegs.PIEIER3.bit.INTx7 = 1; // ePWM7
PieCtrlRegs.PIEIER3.bit.INTx8 = 1; // ePWM8
//
// Enable global Interrupts and higher priority real-time debug events:
//
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
//
// Step 5. IDLE loop. Just sit and loop forever (optional):
//
for(;;)
{
asm (" NOP");
}
}
