static void arm_lcd_h3800_enable(void)
{
  //arm_lcd_h3800_disable();

  //printf("Enabling LCD controller.\n");

#if 0
  GPIO_GAFR_WRITE(0xff << 2);
  GPIO_GPDR_WRITE(0xff << 2);

  sa_vidmem[0] = 0x2077;

  LCCR3 = 0x10 | LCCR3_VrtSnchL | LCCR3_HorSnchL;
  LCCR2 = LCCR2_DisHght(VESA_YRES + 1) + LCCR2_VrtSnchWdth(3)
          + LCCR2_BegFrmDel(10) + LCCR2_EndFrmDel(1);
  LCCR1 = LCCR1_DisWdth(VESA_XRES) + LCCR1_HorSnchWdth(4) +
	  LCCR1_BegLnDel(0xC) + LCCR1_EndLnDel(0x11);
  LCCR0 = (LCCR0_LEN + LCCR0_Color + LCCR0_Sngl + LCCR0_Act +
           LCCR0_LtlEnd + LCCR0_LDM + LCCR0_BAM + LCCR0_ERM +
           LCCR0_DMADel(0))
          & ~LCCR0_LEN;

#endif
  {
    l4_size_t phys_size;

    if (!l4dm_mem_phys_addr(sa_vidmem, 4, &phys, 1, &pnum)
	|| !pnum)
      {
	printf("Cannot get physical address of vidmem.\n");
	return;
      }
    printf("Physical address of vidmem is %08lx\n", phys.addr);

    DBAR1 = phys.addr;
  }

#if 0
  LCCR0 |= LCCR0_LEN;

  sa_control_egpio(IPAQ_EGPIO_LCD_ON, 1);

  CTL_REG_WRITE(GPIO_BASE+GPIO_GPDR_OFF, 0xff << 2);
  CTL_REG_WRITE(GPIO_BASE+GPIO_GPSR_OFF, 0);

  sa_control_egpio(IPAQ_EGPIO_LCD_ON, 1);

#endif
  sa_lcd_light(1, 5);
}
Exemple #2
0
static void setup_parallel_timing(struct pxafb_info *fbi)
{
	struct fb_info *info = &fbi->info;
	struct fb_videomode *mode = info->mode;

	unsigned int lines_per_panel, pcd = get_pcd(fbi, mode->pixclock);

	fbi->reg_lccr1 =
		LCCR1_DisWdth(mode->xres) +
		LCCR1_HorSnchWdth(mode->hsync_len) +
		LCCR1_BegLnDel(mode->left_margin) +
		LCCR1_EndLnDel(mode->right_margin);

	/*
	 * If we have a dual scan LCD, we need to halve
	 * the YRES parameter.
	 */
	lines_per_panel = mode->yres;
	if ((fbi->lccr0 & LCCR0_SDS) == LCCR0_Dual)
		lines_per_panel /= 2;

	fbi->reg_lccr2 =
		LCCR2_DisHght(lines_per_panel) +
		LCCR2_VrtSnchWdth(mode->vsync_len) +
		LCCR2_BegFrmDel(mode->upper_margin) +
		LCCR2_EndFrmDel(mode->lower_margin);

	fbi->reg_lccr3 = fbi->lccr3 |
		(mode->sync & FB_SYNC_HOR_HIGH_ACT ?
		 LCCR3_HorSnchH : LCCR3_HorSnchL) |
		(mode->sync & FB_SYNC_VERT_HIGH_ACT ?
		 LCCR3_VrtSnchH : LCCR3_VrtSnchL);

	if (pcd)
		fbi->reg_lccr3 |= LCCR3_PixClkDiv(pcd);
}
static int pxafb_init (vidinfo_t *vid)
{
    struct pxafb_info *fbi = &vid->pxa;

    debug("Configuring PXA LCD\n");

    fbi->reg_lccr0 = REG_LCCR0;
    fbi->reg_lccr3 = REG_LCCR3;

    debug("vid: vl_col=%d hslen=%d lm=%d rm=%d\n",
          vid->vl_col, vid->vl_hpw,
          vid->vl_blw, vid->vl_elw);
    debug("vid: vl_row=%d vslen=%d um=%d bm=%d\n",
          vid->vl_row, vid->vl_vpw,
          vid->vl_bfw, vid->vl_efw);

    fbi->reg_lccr1 =
        LCCR1_DisWdth(vid->vl_col) +
        LCCR1_HorSnchWdth(vid->vl_hpw) +
        LCCR1_BegLnDel(vid->vl_blw) +
        LCCR1_EndLnDel(vid->vl_elw);

    fbi->reg_lccr2 =
        LCCR2_DisHght(vid->vl_row) +
        LCCR2_VrtSnchWdth(vid->vl_vpw) +
        LCCR2_BegFrmDel(vid->vl_bfw) +
        LCCR2_EndFrmDel(vid->vl_efw);

    fbi->reg_lccr3 = REG_LCCR3 & ~(LCCR3_HSP | LCCR3_VSP);
    fbi->reg_lccr3 |= (vid->vl_hsp ? LCCR3_HorSnchL : LCCR3_HorSnchH)
                      | (vid->vl_vsp ? LCCR3_VrtSnchL : LCCR3_VrtSnchH);


    /* setup dma descriptors */
    fbi->dmadesc_fblow = (struct pxafb_dma_descriptor *)((unsigned int)fbi->palette - 3*16);
    fbi->dmadesc_fbhigh = (struct pxafb_dma_descriptor *)((unsigned int)fbi->palette - 2*16);
    fbi->dmadesc_palette = (struct pxafb_dma_descriptor *)((unsigned int)fbi->palette - 1*16);

#define BYTES_PER_PANEL	((fbi->reg_lccr0 & LCCR0_SDS) ? \
		(vid->vl_col * vid->vl_row * NBITS(vid->vl_bpix) / 8 / 2) : \
		(vid->vl_col * vid->vl_row * NBITS(vid->vl_bpix) / 8))

    /* populate descriptors */
    fbi->dmadesc_fblow->fdadr = (u_long)fbi->dmadesc_fblow;
    fbi->dmadesc_fblow->fsadr = fbi->screen + BYTES_PER_PANEL;
    fbi->dmadesc_fblow->fidr  = 0;
    fbi->dmadesc_fblow->ldcmd = BYTES_PER_PANEL;

    fbi->fdadr1 = (u_long)fbi->dmadesc_fblow; /* only used in dual-panel mode */

    fbi->dmadesc_fbhigh->fsadr = fbi->screen;
    fbi->dmadesc_fbhigh->fidr = 0;
    fbi->dmadesc_fbhigh->ldcmd = BYTES_PER_PANEL;

    fbi->dmadesc_palette->fsadr = fbi->palette;
    fbi->dmadesc_palette->fidr  = 0;
    fbi->dmadesc_palette->ldcmd = (fbi->palette_size * 2) | LDCMD_PAL;

    if( NBITS(vid->vl_bpix) < 12)
    {
        /* assume any mode with <12 bpp is palette driven */
        fbi->dmadesc_palette->fdadr = (u_long)fbi->dmadesc_fbhigh;
        fbi->dmadesc_fbhigh->fdadr = (u_long)fbi->dmadesc_palette;
        /* flips back and forth between pal and fbhigh */
        fbi->fdadr0 = (u_long)fbi->dmadesc_palette;
    }
    else
    {
        /* palette shouldn't be loaded in true-color mode */
        fbi->dmadesc_fbhigh->fdadr = (u_long)fbi->dmadesc_fbhigh;
        fbi->fdadr0 = (u_long)fbi->dmadesc_fbhigh; /* no pal just fbhigh */
    }

    debug("fbi->dmadesc_fblow = 0x%lx\n", (u_long)fbi->dmadesc_fblow);
    debug("fbi->dmadesc_fbhigh = 0x%lx\n", (u_long)fbi->dmadesc_fbhigh);
    debug("fbi->dmadesc_palette = 0x%lx\n", (u_long)fbi->dmadesc_palette);

    debug("fbi->dmadesc_fblow->fdadr = 0x%lx\n", fbi->dmadesc_fblow->fdadr);
    debug("fbi->dmadesc_fbhigh->fdadr = 0x%lx\n", fbi->dmadesc_fbhigh->fdadr);
    debug("fbi->dmadesc_palette->fdadr = 0x%lx\n", fbi->dmadesc_palette->fdadr);

    debug("fbi->dmadesc_fblow->fsadr = 0x%lx\n", fbi->dmadesc_fblow->fsadr);
    debug("fbi->dmadesc_fbhigh->fsadr = 0x%lx\n", fbi->dmadesc_fbhigh->fsadr);
    debug("fbi->dmadesc_palette->fsadr = 0x%lx\n", fbi->dmadesc_palette->fsadr);

    debug("fbi->dmadesc_fblow->ldcmd = 0x%lx\n", fbi->dmadesc_fblow->ldcmd);
    debug("fbi->dmadesc_fbhigh->ldcmd = 0x%lx\n", fbi->dmadesc_fbhigh->ldcmd);
    debug("fbi->dmadesc_palette->ldcmd = 0x%lx\n", fbi->dmadesc_palette->ldcmd);

    return 0;
}