/** * @brief Configure the TIMx output channel 1. * @param TIMx Timer Instance * @param TIM_OCInitStruct pointer to the the TIMx output channel 1 configuration data structure * @retval An ErrorStatus enumeration value: * - SUCCESS: TIMx registers are de-initialized * - ERROR: not applicable */ static ErrorStatus OC1Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct) { uint32_t tmpccmr1 = 0U; uint32_t tmpccer = 0U; uint32_t tmpcr2 = 0U; /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(TIMx)); assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode)); assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState)); assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity)); /* Disable the Channel 1: Reset the CC1E Bit */ CLEAR_BIT(TIMx->CCER, TIM_CCER_CC1E); /* Get the TIMx CCER register value */ tmpccer = LL_TIM_ReadReg(TIMx, CCER); /* Get the TIMx CR2 register value */ tmpcr2 = LL_TIM_ReadReg(TIMx, CR2); /* Get the TIMx CCMR1 register value */ tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1); /* Reset Capture/Compare selection Bits */ CLEAR_BIT(tmpccmr1, TIM_CCMR1_CC1S); /* Set the Output Compare Mode */ MODIFY_REG(tmpccmr1, TIM_CCMR1_OC1M, TIM_OCInitStruct->OCMode); /* Set the Output Compare Polarity */ MODIFY_REG(tmpccer, TIM_CCER_CC1P, TIM_OCInitStruct->OCPolarity); /* Set the Output State */ MODIFY_REG(tmpccer, TIM_CCER_CC1E, TIM_OCInitStruct->OCState); /* Write to TIMx CR2 */ LL_TIM_WriteReg(TIMx, CR2, tmpcr2); /* Write to TIMx CCMR1 */ LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); /* Set the Capture Compare Register value */ LL_TIM_OC_SetCompareCH1(TIMx, TIM_OCInitStruct->CompareValue); /* Write to TIMx CCER */ LL_TIM_WriteReg(TIMx, CCER, tmpccer); return SUCCESS; }
void TI_TriggerInit(void) { uint32_t TIM2_clk; /******************************/ /* Peripheral clocks enabling */ /******************************/ /* Enable the peripheral clock of GPIOs */ LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA); /* Enable the peripheral clock of TIM2 */ LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2); /*************************/ /* GPIO AF configuration */ /*************************/ /* GPIO TIM2_CH1 configuration */ LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_5, LL_GPIO_MODE_ALTERNATE); LL_GPIO_SetPinPull(GPIOA, LL_GPIO_PIN_5, LL_GPIO_PULL_DOWN); LL_GPIO_SetPinSpeed(GPIOA, LL_GPIO_PIN_5, LL_GPIO_SPEED_FREQ_HIGH); LL_GPIO_SetAFPin_0_7(GPIOA, LL_GPIO_PIN_5, LL_GPIO_AF_1); /* GPIO TIM2_CH2 configuration */ LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_1, LL_GPIO_MODE_ALTERNATE); LL_GPIO_SetPinPull(GPIOA, LL_GPIO_PIN_1, LL_GPIO_PULL_DOWN); LL_GPIO_SetPinSpeed(GPIOA, LL_GPIO_PIN_1, LL_GPIO_SPEED_FREQ_HIGH); LL_GPIO_SetAFPin_0_7(GPIOA, LL_GPIO_PIN_1, LL_GPIO_AF_1); /*******************************/ /* Input trigger configuration */ /*******************************/ /* Map TI2FP2 on TI2 */ LL_TIM_IC_SetActiveInput(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_ACTIVEINPUT_DIRECTTI); /* TI2FP2 must detect a rising edge */ LL_TIM_IC_SetPolarity(TIM2, LL_TIM_CHANNEL_CH2, LL_TIM_IC_POLARITY_RISING); /* Configure TI2FP2 as trigger */ LL_TIM_SetTriggerInput(TIM2, LL_TIM_TS_TI2FP2); /* Enable the slave mode controller: TI2FP2 is used to start the counter */ LL_TIM_SetSlaveMode(TIM2, LL_TIM_SLAVEMODE_TRIGGER); /*********************************/ /* Output waveform configuration */ /*********************************/ /* Select counter mode: counting up */ LL_TIM_SetCounterMode(TIM2, LL_TIM_COUNTERMODE_UP); /* Set the one pulse mode: generate only 1 pulse */ LL_TIM_SetOnePulseMode(TIM2, LL_TIM_ONEPULSEMODE_SINGLE); /* In this example TIM2 input clock (TIM2CLK) is set to APB1 clock (PCLK1), */ /* since APB1 pre-scaler is equal to /2*2 = 1. */ /* TIM2CLK = PCLK1 */ /* PCLK1 = HCLK */ /* => TIM2CLK = SystemCoreClock (32 MHz) */ TIM2_clk = SystemCoreClock/1; /* Set the TIM2 prescaler to get counter clock frequency at 2 kHz */ LL_TIM_SetPrescaler(TIM2, __LL_TIM_CALC_PSC(TIM2_clk, 2000)); /* Set the capture/compare register to get a pulse delay of 2s (2000000 us)*/ LL_TIM_OC_SetCompareCH1(TIM2, __LL_TIM_CALC_DELAY(TIM2_clk, LL_TIM_GetPrescaler(TIM2), 2000000)); /* Set the autoreload register to get a pulse length of 3s (3000000 us)*/ LL_TIM_SetAutoReload(TIM2, __LL_TIM_CALC_PULSE(TIM2_clk, LL_TIM_GetPrescaler(TIM2), 2000000, 3000000)); /* Set output channel 1 in PWM2 mode */ LL_TIM_OC_SetMode(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_OCMODE_PWM2); /* Configure output channel 1 configuration */ LL_TIM_OC_ConfigOutput(TIM2, LL_TIM_CHANNEL_CH1, LL_TIM_OCPOLARITY_HIGH); /**************************/ /* Start pulse generation */ /**************************/ /* Enable channel 1 */ LL_TIM_CC_EnableChannel(TIM2, LL_TIM_CHANNEL_CH1); /* Enable auto-reload register preload */ LL_TIM_EnableARRPreload(TIM2); /* Force update generation */ LL_TIM_GenerateEvent_UPDATE(TIM2); }