//***************************************************************************** // //! Initializes the lwIP TCP/IP stack. //! //! \param ui32SysClkHz is the current system clock rate in Hz. //! \param pui8MAC is a pointer to a six byte array containing the MAC //! address to be used for the interface. //! \param ui32IPAddr is the IP address to be used (static). //! \param ui32NetMask is the network mask to be used (static). //! \param ui32GWAddr is the Gateway address to be used (static). //! \param ui32IPMode is the IP Address Mode. \b IPADDR_USE_STATIC will force //! static IP addressing to be used, \b IPADDR_USE_DHCP will force DHCP with //! fallback to Link Local (Auto IP), while \b IPADDR_USE_AUTOIP will force //! Link Local only. //! //! This function performs initialization of the lwIP TCP/IP stack for the //! Ethernet MAC, including DHCP and/or AutoIP, as configured. //! //! \return None. // //***************************************************************************** void lwIPInit(uint32_t ui32SysClkHz, const uint8_t *pui8MAC, uint32_t ui32IPAddr, uint32_t ui32NetMask, uint32_t ui32GWAddr, uint32_t ui32IPMode) { // // Check the parameters. // #if LWIP_DHCP && LWIP_AUTOIP ASSERT((ui32IPMode == IPADDR_USE_STATIC) || (ui32IPMode == IPADDR_USE_DHCP) || (ui32IPMode == IPADDR_USE_AUTOIP)); #elif LWIP_DHCP ASSERT((ui32IPMode == IPADDR_USE_STATIC) || (ui32IPMode == IPADDR_USE_DHCP)); #elif LWIP_AUTOIP ASSERT((ui32IPMode == IPADDR_USE_STATIC) || (ui32IPMode == IPADDR_USE_AUTOIP)); #else ASSERT(ui32IPMode == IPADDR_USE_STATIC); #endif // // Enable the ethernet peripheral. // MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_EMAC0); MAP_SysCtlPeripheralReset(SYSCTL_PERIPH_EMAC0); // // Enable the internal PHY if it's present and we're being // asked to use it. // if((EMAC_PHY_CONFIG & EMAC_PHY_TYPE_MASK) == EMAC_PHY_TYPE_INTERNAL) { // // We've been asked to configure for use with the internal // PHY. Is it present? // if(MAP_SysCtlPeripheralPresent(SYSCTL_PERIPH_EPHY0)) { // // Yes - enable and reset it. // MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_EPHY0); MAP_SysCtlPeripheralReset(SYSCTL_PERIPH_EPHY0); } else { // // Internal PHY is not present on this part so hang here. // while(1) { } } } // // Wait for the MAC to come out of reset. // while(!MAP_SysCtlPeripheralReady(SYSCTL_PERIPH_EMAC0)) { } // // Configure for use with whichever PHY the user requires. // MAP_EMACPHYConfigSet(EMAC0_BASE, EMAC_PHY_CONFIG); // // Initialize the MAC and set the DMA mode. // MAP_EMACInit(EMAC0_BASE, ui32SysClkHz, EMAC_BCONFIG_MIXED_BURST | EMAC_BCONFIG_PRIORITY_FIXED, 4, 4, 0); // // Set MAC configuration options. // MAP_EMACConfigSet(EMAC0_BASE, (EMAC_CONFIG_FULL_DUPLEX | EMAC_CONFIG_CHECKSUM_OFFLOAD | EMAC_CONFIG_7BYTE_PREAMBLE | EMAC_CONFIG_IF_GAP_96BITS | EMAC_CONFIG_USE_MACADDR0 | EMAC_CONFIG_SA_FROM_DESCRIPTOR | EMAC_CONFIG_BO_LIMIT_1024), (EMAC_MODE_RX_STORE_FORWARD | EMAC_MODE_TX_STORE_FORWARD | EMAC_MODE_TX_THRESHOLD_64_BYTES | EMAC_MODE_RX_THRESHOLD_64_BYTES), 0); // // Program the hardware with its MAC address (for filtering). // MAP_EMACAddrSet(EMAC0_BASE, 0, (uint8_t *)pui8MAC); // // Save the network configuration for later use by the private // initialization. // g_ui32IPMode = ui32IPMode; g_ui32IPAddr = ui32IPAddr; g_ui32NetMask = ui32NetMask; g_ui32GWAddr = ui32GWAddr; // // Initialize lwIP. The remainder of initialization is done immediately if // not using a RTOS and it is deferred to the TCP/IP thread's context if // using a RTOS. // #if NO_SYS lwIPPrivateInit(0); #else tcpip_init(lwIPPrivateInit, 0); #endif }
bool initializeUartChannel(uint8_t channel, uint8_t uartPort, uint32_t baudRate, uint32_t cpuSpeedHz, uint32_t flags) { if (channel >= UART_NUMBER_OF_CHANNELS || uartPort >= UART_COUNT) { return false; } if (uart2UartChannelData[uartPort] != 0) { return false; } if (!(flags & UART_FLAGS_RECEIVE) && !(flags & UART_FLAGS_SEND)) { return false; } uint32_t uartBase; uint32_t uartInterruptId; uint32_t uartPeripheralSysCtl; switch (uartPort) { #ifdef DEBUG case UART_0: { uartBase = UART0_BASE; uartInterruptId = INT_UART0; uartPeripheralSysCtl = SYSCTL_PERIPH_UART0; ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0); ROM_GPIOPinConfigure(GPIO_PA0_U0RX); ROM_GPIOPinConfigure(GPIO_PA1_U0TX); ROM_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); break; } #endif case UART_1: { uartBase = UART1_BASE; uartInterruptId = INT_UART1; uartPeripheralSysCtl = SYSCTL_PERIPH_UART1; ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB); ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART1); ROM_GPIOPinConfigure(GPIO_PB0_U1RX); ROM_GPIOPinConfigure(GPIO_PB1_U1TX); ROM_GPIOPinTypeUART(GPIO_PORTB_BASE, GPIO_PIN_0 | GPIO_PIN_1); break; } case UART_2: { uartBase = UART2_BASE; uartInterruptId = INT_UART2; uartPeripheralSysCtl = SYSCTL_PERIPH_UART2; ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD); ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART2); ROM_GPIOPinConfigure(GPIO_PD6_U2RX); ROM_GPIOPinConfigure(GPIO_PD7_U2TX); ROM_GPIOPinTypeUART(GPIO_PORTD_BASE, GPIO_PIN_6 | GPIO_PIN_7); break; } case UART_3: { uartBase = UART3_BASE; uartInterruptId = INT_UART3; uartPeripheralSysCtl = SYSCTL_PERIPH_UART3; ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC); ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART3); ROM_GPIOPinConfigure(GPIO_PC6_U3RX); ROM_GPIOPinConfigure(GPIO_PC7_U3TX); ROM_GPIOPinTypeUART(GPIO_PORTC_BASE, GPIO_PIN_6 | GPIO_PIN_7); break; } case UART_4: { uartBase = UART4_BASE; uartInterruptId = INT_UART4; uartPeripheralSysCtl = SYSCTL_PERIPH_UART4; ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC); ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART4); ROM_GPIOPinConfigure(GPIO_PC4_U4RX); ROM_GPIOPinConfigure(GPIO_PC5_U4TX); ROM_GPIOPinTypeUART(GPIO_PORTC_BASE, GPIO_PIN_4 | GPIO_PIN_5); break; } default: { return false; } } UARTClockSourceSet(uartBase, UART_CLOCK_PIOSC); if(!MAP_SysCtlPeripheralPresent(uartPeripheralSysCtl)) { return false; } MAP_SysCtlPeripheralEnable(uartPeripheralSysCtl); MAP_UARTConfigSetExpClk(uartBase, cpuSpeedHz, baudRate, (UART_CONFIG_PAR_NONE | UART_CONFIG_STOP_ONE | UART_CONFIG_WLEN_8)); MAP_UARTFIFOLevelSet(uartBase, UART_FIFO_TX1_8, UART_FIFO_RX1_8); MAP_UARTIntDisable(uartBase, 0xFFFFFFFF); if (flags & UART_FLAGS_RECEIVE) { MAP_UARTIntEnable(uartBase, UART_INT_RX | UART_INT_RT); } if (flags & UART_FLAGS_SEND) { MAP_UARTIntEnable(uartBase, UART_INT_TX); } MAP_IntEnable(uartInterruptId); MAP_UARTEnable(uartBase); uartChannelData[channel].base = uartBase; uartChannelData[channel].interruptId = uartInterruptId; uartChannelData[channel].writeBuffer.isEmpty = true; uart2UartChannelData[uartPort] = &uartChannelData[channel]; return true; }