{ return msm_gpiomux_get(chip->base + offset); } static void msm_gpio_free(struct gpio_chip *chip, unsigned offset) { msm_gpiomux_put(chip->base + offset); } #else #define msm_gpio_request NULL #define msm_gpio_free NULL #endif struct msm_gpio_chip msm_gpio_chips[] = { #if defined(CONFIG_ARCH_MSM7X00A) MSM_GPIO_BANK(0, 0, 15), MSM_GPIO_BANK(1, 16, 42), MSM_GPIO_BANK(2, 43, 67), MSM_GPIO_BANK(3, 68, 94), MSM_GPIO_BANK(4, 95, 106), MSM_GPIO_BANK(5, 107, 121), #elif defined(CONFIG_ARCH_MSM7X25) || defined(CONFIG_ARCH_MSM7X27) MSM_GPIO_BANK(0, 0, 15), MSM_GPIO_BANK(1, 16, 42), MSM_GPIO_BANK(2, 43, 67), MSM_GPIO_BANK(3, 68, 94), MSM_GPIO_BANK(4, 95, 106), MSM_GPIO_BANK(5, 107, 132), #elif defined(CONFIG_ARCH_MSM7X30) MSM_GPIO_BANK(0, 0, 15), MSM_GPIO_BANK(1, 16, 43),
static int msm_gpio_request(struct gpio_chip *chip, unsigned offset) { return msm_gpiomux_get(chip->base + offset); } static void msm_gpio_free(struct gpio_chip *chip, unsigned offset) { msm_gpiomux_put(chip->base + offset); } #else #define msm_gpio_request NULL #define msm_gpio_free NULL #endif struct msm_gpio_chip msm_gpio_chips[] = { MSM_GPIO_BANK(0, 0, 31), MSM_GPIO_BANK(1, 32, 63), MSM_GPIO_BANK(2, 64, 95), MSM_GPIO_BANK(3, 96, 127), MSM_GPIO_BANK(4, 128, 159), MSM_GPIO_BANK(5, 160, 167), }; void msm_gpio_enter_sleep(int from_idle) { return; } void msm_gpio_exit_sleep(void) { return;