BOOLEAN STATIC MemPDoPsUNi3 ( IN OUT MEM_NB_BLOCK *NBPtr ) { if (!MemPGetDramTerm (NBPtr, GET_SIZE_OF (DrUDdr3DramTerm), DrUDdr3DramTerm)) { return FALSE; } return TRUE; }
BOOLEAN STATIC MemPDoPsSDA2 ( IN OUT MEM_NB_BLOCK *NBPtr ) { if (!MemPGetDramTerm (NBPtr, GET_SIZE_OF (DaSDdr2DramTerm), DaSDdr2DramTerm)) { return FALSE; } return TRUE; }
BOOLEAN STATIC MemPDoPsRC32_3 ( IN OUT MEM_NB_BLOCK *NBPtr ) { CONST DRAM_TERM_ENTRY *DramTermPtr; UINT8 MaxDimmsPerChannel; UINT8 *DimmsPerChPtr; UINT8 DramTermSize; DramTermSize = 0; DramTermPtr = NULL; DimmsPerChPtr = FindPSOverrideEntry (NBPtr->RefPtr->PlatformMemoryConfiguration, PSO_MAX_DIMMS, NBPtr->MCTPtr->SocketId, NBPtr->ChannelPtr->ChannelID); if (DimmsPerChPtr != NULL) { MaxDimmsPerChannel = *DimmsPerChPtr; } else { MaxDimmsPerChannel = 2; } if ((MaxDimmsPerChannel == 1) || (MaxDimmsPerChannel == 2)) { DramTermSize = GET_SIZE_OF (C32RDdr3DramTerm2D); DramTermPtr = C32RDdr3DramTerm2D; } else if (MaxDimmsPerChannel == 3) { DramTermSize = GET_SIZE_OF (C32RDdr3DramTerm3D); DramTermPtr = C32RDdr3DramTerm3D; } else { IDS_ERROR_TRAP; } if (!MemPGetDramTerm (NBPtr, DramTermSize, DramTermPtr)) { return FALSE; } // // Special Cases for certain configs not covered by the table // // SR-SR-SR 1.5v @1066 (Currently only 3DPCH config at 1066) if ((MaxDimmsPerChannel == 3) && (NBPtr->ChannelPtr->Dimms == 3) && (NBPtr->DCTPtr->Timings.Speed == DDR1066_FREQUENCY)) { NBPtr->PsPtr->DramTerm = 5; //30 Ohms } return TRUE; }
BOOLEAN STATIC MemPDoPsRHy3 ( IN OUT MEM_NB_BLOCK *NBPtr ) { CONST DRAM_TERM_ENTRY *DramTermPtr; UINT8 MaxDimmsPerChannel; UINT8 *DimmsPerChPtr; UINT8 DramTermSize; DramTermSize = 0; DramTermPtr = NULL; DimmsPerChPtr = FindPSOverrideEntry (NBPtr->RefPtr->PlatformMemoryConfiguration, PSO_MAX_DIMMS, NBPtr->MCTPtr->SocketId, NBPtr->ChannelPtr->ChannelID); if (DimmsPerChPtr != NULL) { MaxDimmsPerChannel = *DimmsPerChPtr; } else { MaxDimmsPerChannel = 2; } if ((MaxDimmsPerChannel == 1) || (MaxDimmsPerChannel == 2)) { DramTermSize = GET_SIZE_OF (HyRDdr3DramTerm2D); DramTermPtr = HyRDdr3DramTerm2D; } else if (MaxDimmsPerChannel == 3) { DramTermSize = GET_SIZE_OF (HyRDdr3DramTerm3D); DramTermPtr = HyRDdr3DramTerm3D; } else { IDS_ERROR_TRAP; } if (!MemPGetDramTerm (NBPtr, DramTermSize, DramTermPtr)) { return FALSE; } // // Special Cases for certain configs not covered by the table // // 3DPCH Fully populated. if ((MaxDimmsPerChannel == 3) && (NBPtr->ChannelPtr->Dimms == 3)) { NBPtr->PsPtr->DramTerm = 5; //30 Ohms NBPtr->PsPtr->QR_DramTerm = 1; // 60 Ohms } return TRUE; }
BOOLEAN STATIC MemPDoPsSHy3 ( IN OUT MEM_NB_BLOCK *NBPtr ) { CONST DRAM_TERM_ENTRY *DramTermPtr; UINT8 MaxDimmsPerChannel; UINT8 *DimmsPerChPtr; UINT8 DramTermSize; DramTermSize = 0; DramTermPtr = NULL; DimmsPerChPtr = FindPSOverrideEntry (NBPtr->RefPtr->PlatformMemoryConfiguration, PSO_MAX_DIMMS, NBPtr->MCTPtr->SocketId, NBPtr->ChannelPtr->ChannelID); if (DimmsPerChPtr != NULL) { MaxDimmsPerChannel = *DimmsPerChPtr; } else { MaxDimmsPerChannel = 2; } if (MaxDimmsPerChannel == 1) { DramTermSize = GET_SIZE_OF (HySDdr3DramTerm1D); DramTermPtr = HySDdr3DramTerm1D; } else if (MaxDimmsPerChannel == 2) { DramTermSize = GET_SIZE_OF (HySDdr3DramTerm2D); DramTermPtr = HySDdr3DramTerm2D; } else { IDS_ERROR_TRAP; } if (!MemPGetDramTerm (NBPtr, DramTermSize, DramTermPtr)) { return FALSE; } return TRUE; }