C++ (Cpp) MemWrite32 Exemples

Exemple #1

Fichier : op3.c Projet : BirchJD/xmame-0.103-RPi

UINT32 opPUSHM(void)
{
	int i;

	modAdd=PC+1;
	modDim=2;

	/* Read the bit register list */
	amLength1=ReadAM();

	if (amOut & (1<<31))
	{
		SP -= 4;
		MemWrite32(SP,v60ReadPSW());
	}

	for (i=0;i<31;i++)
		if (amOut & (1<<(30-i)))
		{
			SP -= 4;
			MemWrite32(SP,v60.reg[(30-i)]);
		}


	return amLength1 + 1;
}

Exemple #2

Fichier : v810_cpu.cpp Projet : gammy/wiimednafen

INLINE void V810::CacheOpMemStore(v810_timestamp_t &timestamp, uint32 A, uint32 V)
{
 if(MemWriteBus32[A >> 24])
 {
  timestamp += 2;
  MemWrite32(timestamp, A, V);
 }
 else
 {

Exemple #3

Fichier : op4.c Projet : Paulodx/sdl-mame-wii

static UINT32 opBSR(v60_state *cpustate) /* TRUSTED */
{
	// Save Next cpustate->PC onto the stack
	cpustate->SP -= 4;
	MemWrite32(cpustate->program, cpustate->SP, cpustate->PC + 3);

	// Jump to subroutine
	cpustate->PC += (INT16)OpRead16(cpustate->program, cpustate->PC + 1);
	return 0;
}

Exemple #4

Fichier : op4.c Projet : Ezio-PS/mame2003-libretro

UINT32 opBSR(void) /* TRUSTED */
{
	// Save Next PC onto the stack
	SP -= 4;
	MemWrite32(SP, PC+3);

	// Jump to subroutine
	PC += (INT16)OpRead16(PC + 1);
	return 0;
}

Exemple #5

Fichier : op3.c Projet : BirchJD/xmame-0.103-RPi

UINT32 opPUSH(void)
{
	modAdd=PC+1;
	modDim=2;

	amLength1=ReadAM();

	SP-=4;
	MemWrite32(SP,amOut);

	return amLength1 + 1;
}

Exemple #6

Fichier : am3.c Projet : shangma/mame0112

static UINT32 am3DisplacementIndirect32(void)
{
	switch (modDim)
	{
	case 0:
		MemWrite8(MemRead32(v60.reg[modVal&0x1F] + OpRead32(modAdd+1)), modWriteValB);
		break;
	case 1:
		MemWrite16(MemRead32(v60.reg[modVal&0x1F] + OpRead32(modAdd+1)), modWriteValH);
		break;
	case 2:
		MemWrite32(MemRead32(v60.reg[modVal&0x1F] + OpRead32(modAdd+1)), modWriteValW);
		break;
	}

	return 5;
}

Exemple #7

Fichier : am3.c Projet : shangma/mame0112

static UINT32 am3PCDoubleDisplacement32(void)
{
	switch (modDim)
	{
	case 0:
		MemWrite8(MemRead32(PC + OpRead32(modAdd+1)) + OpRead32(modAdd+5), modWriteValB);
		break;
	case 1:
		MemWrite16(MemRead32(PC + OpRead32(modAdd+1)) + OpRead32(modAdd+5), modWriteValH);
		break;
	case 2:
		MemWrite32(MemRead32(PC + OpRead32(modAdd+1)) + OpRead32(modAdd+5), modWriteValW);
		break;
	}

	return 9;
}

Exemple #8

Fichier : am3.c Projet : shangma/mame0112

static UINT32 am3DirectAddressDeferredIndexed(void)
{
	switch (modDim)
	{
	case 0:
		MemWrite8(MemRead32(OpRead32(modAdd+2)) + v60.reg[modVal&0x1F], modWriteValB);
		break;
	case 1:
		MemWrite16(MemRead32(OpRead32(modAdd+2)) + v60.reg[modVal&0x1F], modWriteValH);
		break;
	case 2:
		MemWrite32(MemRead32(OpRead32(modAdd+2)) + v60.reg[modVal&0x1F], modWriteValW);
		break;
	}

	return 6;
}

Exemple #9

Fichier : am3.c Projet : shangma/mame0112

static UINT32 am3PCDoubleDisplacement16(void)
{
	switch (modDim)
	{
	case 0:
		MemWrite8(MemRead32(PC + (INT16)OpRead16(modAdd+1)) + (INT16)OpRead16(modAdd+3), modWriteValB);
		break;
	case 1:
		MemWrite16(MemRead32(PC + (INT16)OpRead16(modAdd+1)) + (INT16)OpRead16(modAdd+3), modWriteValH);
		break;
	case 2:
		MemWrite32(MemRead32(PC + (INT16)OpRead16(modAdd+1)) + (INT16)OpRead16(modAdd+3), modWriteValW);
		break;
	}

	return 5;
}

Exemple #10

Fichier : am3.c Projet : shangma/mame0112

static UINT32 am3DoubleDisplacement8(void)
{
	switch (modDim)
	{
	case 0:
		MemWrite8(MemRead32(v60.reg[modVal&0x1F] + (INT8)OpRead8(modAdd+1)) + (INT8)OpRead8(modAdd+2), modWriteValB);
		break;
	case 1:
		MemWrite16(MemRead32(v60.reg[modVal&0x1F] + (INT8)OpRead8(modAdd+1)) + (INT8)OpRead8(modAdd+2), modWriteValH);
		break;
	case 2:
		MemWrite32(MemRead32(v60.reg[modVal&0x1F] + (INT8)OpRead8(modAdd+1)) + (INT8)OpRead8(modAdd+2), modWriteValW);
		break;
	}

	return 3;
}

Exemple #11

Fichier : am3.c Projet : shangma/mame0112

static UINT32 am3RegisterIndirectIndexed(void)
{
	switch (modDim)
	{
	case 0:
		MemWrite8(v60.reg[modVal2&0x1F] + v60.reg[modVal&0x1F], modWriteValB);
		break;
	case 1:
		MemWrite16(v60.reg[modVal2&0x1F] + v60.reg[modVal&0x1F] * 2, modWriteValH);
		break;
	case 2:
		MemWrite32(v60.reg[modVal2&0x1F] + v60.reg[modVal&0x1F] * 4, modWriteValW);
		break;
	}

	return 2;
}

Exemple #12

Fichier : am3.c Projet : shangma/mame0112

static UINT32 am3PCDisplacementIndirect8(void)
{
	switch (modDim)
	{
	case 0:
		MemWrite8(MemRead32(PC + (INT8)OpRead8(modAdd+1)), modWriteValB);
		break;
	case 1:
		MemWrite16(MemRead32(PC + (INT8)OpRead8(modAdd+1)), modWriteValH);
		break;
	case 2:
		MemWrite32(MemRead32(PC + (INT8)OpRead8(modAdd+1)), modWriteValW);
		break;
	}

	return 2;
}

Exemple #13

Fichier : am3.c Projet : shangma/mame0112

static UINT32 am3PCDisplacementIndexed16(void)
{
	switch (modDim)
	{
	case 0:
		MemWrite8(PC + (INT16)OpRead16(modAdd+2) + v60.reg[modVal&0x1F], modWriteValB);
		break;
	case 1:
		MemWrite16(PC + (INT16)OpRead16(modAdd+2) + v60.reg[modVal&0x1F] * 2, modWriteValH);
		break;
	case 2:
		MemWrite32(PC + (INT16)OpRead16(modAdd+2) + v60.reg[modVal&0x1F] * 4, modWriteValW);
		break;
	}

	return 4;
}

Exemple #14

Fichier : am3.c Projet : shangma/mame0112

static UINT32 am3DisplacementIndexed8(void)
{
	switch (modDim)
	{
	case 0:
		MemWrite8(v60.reg[modVal2&0x1F] + (INT8)OpRead8(modAdd+2) + v60.reg[modVal&0x1F], modWriteValB);
		break;
	case 1:
		MemWrite16(v60.reg[modVal2&0x1F] + (INT8)OpRead8(modAdd+2) + v60.reg[modVal&0x1F] * 2, modWriteValH);
		break;
	case 2:
		MemWrite32(v60.reg[modVal2&0x1F] + (INT8)OpRead8(modAdd+2) + v60.reg[modVal&0x1F] * 4, modWriteValW);
		break;
	}

	return 3;
}

Exemple #15

Fichier : am3.c Projet : shangma/mame0112

static UINT32 am3Displacement16(void)
{
	switch (modDim)
	{
	case 0:
		MemWrite8(v60.reg[modVal&0x1F] + (INT16)OpRead16(modAdd+1), modWriteValB);
		break;
	case 1:
		MemWrite16(v60.reg[modVal&0x1F] + (INT16)OpRead16(modAdd+1), modWriteValH);
		break;
	case 2:
		MemWrite32(v60.reg[modVal&0x1F] + (INT16)OpRead16(modAdd+1), modWriteValW);
		break;
	}

	return 3;
}

Exemple #16

Fichier : am3.c Projet : shangma/mame0112

static UINT32 am3DirectAddressDeferred(void)
{
	switch (modDim)
	{
	case 0:
		MemWrite8(MemRead32(OpRead32(modAdd+1)), modWriteValB);
		break;
	case 1:
		MemWrite16(MemRead32(OpRead32(modAdd+1)), modWriteValH);
		break;
	case 2:
		MemWrite32(MemRead32(OpRead32(modAdd+1)), modWriteValW);
		break;
	}

	return 5;
}

Exemple #17

Fichier : am3.c Projet : shangma/mame0112

static UINT32 am3PCDisplacementIndirectIndexed32(void)
{
	switch (modDim)
	{
	case 0:
		MemWrite8(MemRead32(PC + OpRead32(modAdd+2)) + v60.reg[modVal&0x1F], modWriteValB);
		break;
	case 1:
		MemWrite16(MemRead32(PC + OpRead32(modAdd+2)) + v60.reg[modVal&0x1F] * 2, modWriteValH);
		break;
	case 2:
		MemWrite32(MemRead32(PC + OpRead32(modAdd+2)) + v60.reg[modVal&0x1F] * 4, modWriteValW);
		break;
	}

	return 6;
}

Exemple #18

Fichier : am3.c Projet : shangma/mame0112

static UINT32 am3Autoincrement(void)
{
	switch (modDim)
	{
	case 0:
		MemWrite8(v60.reg[modVal&0x1F], modWriteValB);
		v60.reg[modVal&0x1F] += 1;
		break;
	case 1:
		MemWrite16(v60.reg[modVal&0x1F], modWriteValH);
		v60.reg[modVal&0x1F] += 2;
		break;
	case 2:
		MemWrite32(v60.reg[modVal&0x1F], modWriteValW);
		v60.reg[modVal&0x1F] += 4;
		break;
	}

	return 1;
}

Exemple #19

Fichier : op3.c Projet : BirchJD/xmame-0.103-RPi

UINT32 opPREPARE(void)	/* somewhat TRUSTED */
{
	modAdd=PC+1;
	modDim=2;

	/* Read the operand */
	amLength1=ReadAM();

	/* step 1: save frame pointer on the stack */
	SP -= 4;
	MemWrite32(SP, FP);

	/* step 2: FP = new SP */
	FP = SP;

	/* step 3: SP -= operand */
	SP -= amOut;

	return amLength1 + 1;
}

Exemple #20

Fichier : am3.c Projet : shangma/mame0112

static UINT32 am3Autodecrement(void)
{
	switch (modDim)
	{
	case 0:
		v60.reg[modVal&0x1F] -= 1;
		MemWrite8(v60.reg[modVal&0x1F], modWriteValB);
		break;
	case 1:
		v60.reg[modVal&0x1F] -= 2;
		MemWrite16(v60.reg[modVal&0x1F], modWriteValH);
		break;
	case 2:
		v60.reg[modVal&0x1F] -= 4;
		MemWrite32(v60.reg[modVal&0x1F], modWriteValW);
		break;
	}

	return 1;
}

Exemple #21

Fichier : op3.c Projet : BirchJD/xmame-0.103-RPi

UINT32 opJSR(void) /* TRUSTED */
{
	modAdd=PC + 1;
	modDim=0;

	/* Read the address of the operand */
	amLength1=ReadAMAddress();

	/* It cannot be a register!! */
	assert(amFlag==0);

	/* Save NextPC into the stack */
	SP -= 4;
	MemWrite32(SP, PC + amLength1 + 1);

	/* Jump there */
	PC=amOut;
	ChangePC(PC);

	return 0;
}

Exemple #22

Fichier : op3.c Projet : BirchJD/xmame-0.103-RPi

UINT32 opINCW(void) /* TRUSTED */
{
	UINT32 appw;
	modAdd=PC+1;
	modDim=2;

	amLength1=ReadAMAddress();

	if (amFlag)
		appw=v60.reg[amOut];
	else
		appw=MemRead32(amOut);

	ADDL(appw, 1);

	if (amFlag)
		v60.reg[amOut]=appw;
	else
		MemWrite32(amOut,appw);

	return amLength1+1;
}

Exemple #23

Fichier : op3.c Projet : BirchJD/xmame-0.103-RPi

UINT32 opSTTASK(void)
{
	int i;
	UINT32 adr;

	modAdd=PC + 1;
	modDim=2;

	amLength1 = ReadAM();

	adr = TR;

	v60WritePSW(v60ReadPSW() | 0x10000000);
	v60SaveStack();

	MemWrite32(adr, TKCW);
	adr += 4;
	if(SYCW & 0x100) {
		MemWrite32(adr, L0SP);
		adr += 4;
	}
	if(SYCW & 0x200) {
		MemWrite32(adr, L1SP);
		adr += 4;
	}
	if(SYCW & 0x400) {
		MemWrite32(adr, L2SP);
		adr += 4;
	}
	if(SYCW & 0x800) {
		MemWrite32(adr, L3SP);
		adr += 4;
	}

	/* 31 registers supported, _not_ 32 */
	for(i=0; i<31; i++)
		if(amOut & (1<<i)) {
			MemWrite32(adr, v60.reg[i]);
			adr += 4;
		}

	/* #### Ignore the virtual addressing crap. */

	return amLength1 + 1;
}

Exemple #24

Fichier : op3.c Projet : BirchJD/xmame-0.103-RPi

UINT32 opTRAP(void)
{
	UINT32 oldPSW;

	modAdd=PC + 1;
	modDim=0;

	/* Read the operand */
	amLength1=ReadAM();

	/* Normalize the flags */
	NORMALIZEFLAGS();

	switch ((amOut >> 4) & 0xF)
	{
	case 0:
		if (!_OV) return amLength1+1;
		else break;
	case 1:
		if (_OV) return amLength1+1;
		else break;
	case 2:
		if (!_CY) return amLength1+1;
		else break;
	case 3:
		if (_CY) return amLength1+1;
		else break;
	case 4:
		if (!_Z) return amLength1+1;
		else break;
	case 5:
		if (_Z) return amLength1+1;
		else break;
	case 6:
		if (!(_CY | _Z)) return amLength1+1;
		else break;
	case 7:
		if ((_CY | _Z)) return amLength1+1;
		else break;
	case 8:
		if (!_S) return amLength1+1;
		else break;
	case 9:
		if (_S) return amLength1+1;
		else break;
	case 10:
		break;
	case 11:
		return amLength1+1;
	case 12:
		if (!(_S^_OV)) return amLength1+1;
		else break;
	case 13:
		if ((_S^_OV)) return amLength1+1;
		else break;
	case 14:
		if (!((_S^_OV)|_Z)) return amLength1+1;
		else break;
	case 15:
		if (((_S^_OV)|_Z)) return amLength1+1;
		else break;
	}

	oldPSW = v60_update_psw_for_exception(0, 0);

	/* Issue the software trap with interrupts */
	SP -= 4;
	MemWrite32(SP, EXCEPTION_CODE_AND_SIZE(0x3000 + 0x100 * (amOut&0xF), 4));

	SP -= 4;
	MemWrite32(SP, oldPSW);

	SP -= 4;
	MemWrite32(SP, PC + amLength1 + 1);

	PC = GETINTVECT(48 + (amOut&0xF));
	ChangePC(PC);

	return 0;
}