/* Initialize host settings by interrupt */ void lpc_lreset_pltrst_handler(void) { int pltrst_asserted; /* Clear pending bit of WUI */ SET_BIT(NPCX_WKPCL(MIWU_TABLE_0 , MIWU_GROUP_5), 7); /* Ignore PLTRST# from SOC if it is not valid */ if (chipset_pltrst_is_valid && !chipset_pltrst_is_valid()) return; pltrst_asserted = lpc_get_pltrst_asserted(); ccprintf("LPC RESET# %sasserted", pltrst_asserted ? "" : "de"); /* * Once LRESET is de-asserted (low -> high), we need to initialize lpc * settings once. If RSTCTL_LRESET_PLTRST_MODE is active, LPC registers * won't be reset by Host domain reset but Core domain does. */ if (!pltrst_asserted) host_register_init(); else { #ifdef CONFIG_CHIPSET_RESET_HOOK /* Notify HOOK_CHIPSET_RESET */ hook_call_deferred(&lpc_chipset_reset_data, MSEC); #endif } }
/* Initialize host settings by interrupt */ void lpc_lreset_pltrst_handler(void) { /* Clear pending bit of WUI */ SET_BIT(NPCX_WKPCL(MIWU_TABLE_0 , MIWU_GROUP_5), 7); /* * Once LRESET is de-asserted (low -> high), * we need to intialize lpc settings again. * But if RSTCTL_LRESET_PLTRST_MODE is active, we needn't to do it again */ if(!IS_BIT_SET(NPCX_RSTCTL, NPCX_RSTCTL_LRESET_PLTRST_MODE)) lpc_host_register_init(); }
/* Initialize host settings by interrupt */ void lpc_lreset_pltrst_handler(void) { /* Clear pending bit of WUI */ SET_BIT(NPCX_WKPCL(MIWU_TABLE_0 , MIWU_GROUP_5), 7); /* * Once LRESET is de-asserted (low -> high), we need to intialize lpc * settings once. If RSTCTL_LRESET_PLTRST_MODE is active, LPC registers * won't be reset by Host domain reset but Core domain does. */ lpc_host_register_init(); #ifdef CONFIG_CHIPSET_RESET_HOOK if (lpc_get_pltrst_asserted()) { /* Notify HOOK_CHIPSET_RESET */ hook_call_deferred(lpc_chipset_reset, MSEC); } #endif }