static int
nv50_2d_texture_do_copy(struct nouveau_pushbuf *push,
struct nv50_miptree *dst, unsigned dst_level,
unsigned dx, unsigned dy, unsigned dz,
struct nv50_miptree *src, unsigned src_level,
unsigned sx, unsigned sy, unsigned sz,
unsigned w, unsigned h)
{
static const uint32_t duvdxy[5] =
{
0x40000000, 0x80000000, 0x00000001, 0x00000002, 0x00000004
};
int ret;
uint32_t ctrl;
#if 0
ret = MARK_RING(chan, 2 * 16 + 32, 4);
if (ret)
return ret;
#endif
ret = nv50_2d_texture_set(push, 1, dst, dst_level, dz);
if (ret)
return ret;
ret = nv50_2d_texture_set(push, 0, src, src_level, sz);
if (ret)
return ret;
/* NOTE: 2D engine doesn't work for MS8 */
if (src->ms_x)
ctrl = 0x11;
/* 0/1 = CENTER/CORNER, 00/10 = POINT/BILINEAR */
BEGIN_NV04(push, NV50_2D(BLIT_CONTROL), 1);
PUSH_DATA (push, ctrl);
BEGIN_NV04(push, NV50_2D(BLIT_DST_X), 4);
PUSH_DATA (push, dx << dst->ms_x);
PUSH_DATA (push, dy << dst->ms_y);
PUSH_DATA (push, w << dst->ms_x);
PUSH_DATA (push, h << dst->ms_y);
BEGIN_NV04(push, NV50_2D(BLIT_DU_DX_FRACT), 4);
PUSH_DATA (push, duvdxy[2 + ((int)src->ms_x - (int)dst->ms_x)] & 0xf0000000);
PUSH_DATA (push, duvdxy[2 + ((int)src->ms_x - (int)dst->ms_x)] & 0x0000000f);
PUSH_DATA (push, duvdxy[2 + ((int)src->ms_y - (int)dst->ms_y)] & 0xf0000000);
PUSH_DATA (push, duvdxy[2 + ((int)src->ms_y - (int)dst->ms_y)] & 0x0000000f);
BEGIN_NV04(push, NV50_2D(BLIT_SRC_X_FRACT), 4);
PUSH_DATA (push, 0);
PUSH_DATA (push, sx << src->ms_x);
PUSH_DATA (push, 0);
PUSH_DATA (push, sy << src->ms_y);
return 0;
}
static void
nv50_render_condition(struct pipe_context *pipe,
struct pipe_query *pq,
boolean condition, uint mode)
{
struct nv50_context *nv50 = nv50_context(pipe);
struct nouveau_pushbuf *push = nv50->base.pushbuf;
struct nv50_query *q;
uint32_t cond;
boolean wait =
mode != PIPE_RENDER_COND_NO_WAIT &&
mode != PIPE_RENDER_COND_BY_REGION_NO_WAIT;
if (!pq) {
cond = NV50_3D_COND_MODE_ALWAYS;
}
else {
q = nv50_query(pq);
/* NOTE: comparison of 2 queries only works if both have completed */
switch (q->type) {
case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
cond = condition ? NV50_3D_COND_MODE_EQUAL :
NV50_3D_COND_MODE_NOT_EQUAL;
wait = TRUE;
break;
case PIPE_QUERY_OCCLUSION_COUNTER:
case PIPE_QUERY_OCCLUSION_PREDICATE:
if (likely(!condition)) {
/* XXX: Placeholder, handle nesting here if available */
if (unlikely(false))
cond = wait ? NV50_3D_COND_MODE_NOT_EQUAL :
NV50_3D_COND_MODE_ALWAYS;
else
cond = NV50_3D_COND_MODE_RES_NON_ZERO;
} else {
cond = wait ? NV50_3D_COND_MODE_EQUAL : NV50_3D_COND_MODE_ALWAYS;
}
break;
default:
assert(!"render condition query not a predicate");
cond = NV50_3D_COND_MODE_ALWAYS;
break;
}
}
nv50->cond_query = pq;
nv50->cond_cond = condition;
nv50->cond_condmode = cond;
nv50->cond_mode = mode;
if (!pq) {
PUSH_SPACE(push, 2);
BEGIN_NV04(push, NV50_3D(COND_MODE), 1);
PUSH_DATA (push, cond);
return;
}
PUSH_SPACE(push, 9);
if (wait) {
BEGIN_NV04(push, SUBC_3D(NV50_GRAPH_SERIALIZE), 1);
PUSH_DATA (push, 0);
}
PUSH_REFN (push, q->bo, NOUVEAU_BO_GART | NOUVEAU_BO_RD);
BEGIN_NV04(push, NV50_3D(COND_ADDRESS_HIGH), 3);
PUSH_DATAh(push, q->bo->offset + q->offset);
PUSH_DATA (push, q->bo->offset + q->offset);
PUSH_DATA (push, cond);
BEGIN_NV04(push, NV50_2D(COND_ADDRESS_HIGH), 2);
PUSH_DATAh(push, q->bo->offset + q->offset);
PUSH_DATA (push, q->bo->offset + q->offset);
}
static void
nv50_render_condition(struct pipe_context *pipe,
struct pipe_query *pq,
boolean condition, enum pipe_render_cond_flag mode)
{
struct nv50_context *nv50 = nv50_context(pipe);
struct nouveau_pushbuf *push = nv50->base.pushbuf;
struct nv50_query *q = nv50_query(pq);
struct nv50_hw_query *hq = nv50_hw_query(q);
uint32_t cond;
bool wait =
mode != PIPE_RENDER_COND_NO_WAIT &&
mode != PIPE_RENDER_COND_BY_REGION_NO_WAIT;
if (!pq) {
cond = NV50_3D_COND_MODE_ALWAYS;
}
else {
/* NOTE: comparison of 2 queries only works if both have completed */
switch (q->type) {
case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
cond = condition ? NV50_3D_COND_MODE_EQUAL :
NV50_3D_COND_MODE_NOT_EQUAL;
wait = true;
break;
case PIPE_QUERY_OCCLUSION_COUNTER:
case PIPE_QUERY_OCCLUSION_PREDICATE:
case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE:
if (hq->state == NV50_HW_QUERY_STATE_READY)
wait = true;
if (likely(!condition)) {
cond = wait ? NV50_3D_COND_MODE_NOT_EQUAL : NV50_3D_COND_MODE_ALWAYS;
} else {
cond = wait ? NV50_3D_COND_MODE_EQUAL : NV50_3D_COND_MODE_ALWAYS;
}
break;
default:
assert(!"render condition query not a predicate");
cond = NV50_3D_COND_MODE_ALWAYS;
break;
}
}
nv50->cond_query = pq;
nv50->cond_cond = condition;
nv50->cond_condmode = cond;
nv50->cond_mode = mode;
if (!pq) {
PUSH_SPACE(push, 2);
BEGIN_NV04(push, NV50_3D(COND_MODE), 1);
PUSH_DATA (push, cond);
return;
}
PUSH_SPACE(push, 9);
if (wait && hq->state != NV50_HW_QUERY_STATE_READY) {
BEGIN_NV04(push, SUBC_3D(NV50_GRAPH_SERIALIZE), 1);
PUSH_DATA (push, 0);
}
PUSH_REFN (push, hq->bo, NOUVEAU_BO_GART | NOUVEAU_BO_RD);
BEGIN_NV04(push, NV50_3D(COND_ADDRESS_HIGH), 3);
PUSH_DATAh(push, hq->bo->offset + hq->offset);
PUSH_DATA (push, hq->bo->offset + hq->offset);
PUSH_DATA (push, cond);
BEGIN_NV04(push, NV50_2D(COND_ADDRESS_HIGH), 2);
PUSH_DATAh(push, hq->bo->offset + hq->offset);
PUSH_DATA (push, hq->bo->offset + hq->offset);
}
static void
nv50_screen_init_hwctx(struct nv50_screen *screen)
{
struct nouveau_pushbuf *push = screen->base.pushbuf;
struct nv04_fifo *fifo;
unsigned i;
fifo = (struct nv04_fifo *)screen->base.channel->data;
BEGIN_NV04(push, SUBC_M2MF(NV01_SUBCHAN_OBJECT), 1);
PUSH_DATA (push, screen->m2mf->handle);
BEGIN_NV04(push, SUBC_M2MF(NV03_M2MF_DMA_NOTIFY), 3);
PUSH_DATA (push, screen->sync->handle);
PUSH_DATA (push, fifo->vram);
PUSH_DATA (push, fifo->vram);
BEGIN_NV04(push, SUBC_2D(NV01_SUBCHAN_OBJECT), 1);
PUSH_DATA (push, screen->eng2d->handle);
BEGIN_NV04(push, NV50_2D(DMA_NOTIFY), 4);
PUSH_DATA (push, screen->sync->handle);
PUSH_DATA (push, fifo->vram);
PUSH_DATA (push, fifo->vram);
PUSH_DATA (push, fifo->vram);
BEGIN_NV04(push, NV50_2D(OPERATION), 1);
PUSH_DATA (push, NV50_2D_OPERATION_SRCCOPY);
BEGIN_NV04(push, NV50_2D(CLIP_ENABLE), 1);
PUSH_DATA (push, 0);
BEGIN_NV04(push, NV50_2D(COLOR_KEY_ENABLE), 1);
PUSH_DATA (push, 0);
BEGIN_NV04(push, SUBC_2D(0x0888), 1);
PUSH_DATA (push, 1);
BEGIN_NV04(push, SUBC_3D(NV01_SUBCHAN_OBJECT), 1);
PUSH_DATA (push, screen->tesla->handle);
BEGIN_NV04(push, NV50_3D(COND_MODE), 1);
PUSH_DATA (push, NV50_3D_COND_MODE_ALWAYS);
BEGIN_NV04(push, NV50_3D(DMA_NOTIFY), 1);
PUSH_DATA (push, screen->sync->handle);
BEGIN_NV04(push, NV50_3D(DMA_ZETA), 11);
for (i = 0; i < 11; ++i)
PUSH_DATA(push, fifo->vram);
BEGIN_NV04(push, NV50_3D(DMA_COLOR(0)), NV50_3D_DMA_COLOR__LEN);
for (i = 0; i < NV50_3D_DMA_COLOR__LEN; ++i)
PUSH_DATA(push, fifo->vram);
BEGIN_NV04(push, NV50_3D(REG_MODE), 1);
PUSH_DATA (push, NV50_3D_REG_MODE_STRIPED);
BEGIN_NV04(push, NV50_3D(UNK1400_LANES), 1);
PUSH_DATA (push, 0xf);
if (debug_get_bool_option("NOUVEAU_SHADER_WATCHDOG", TRUE)) {
BEGIN_NV04(push, NV50_3D(WATCHDOG_TIMER), 1);
PUSH_DATA (push, 0x18);
}
BEGIN_NV04(push, NV50_3D(RT_CONTROL), 1);
PUSH_DATA (push, 1);
BEGIN_NV04(push, NV50_3D(CSAA_ENABLE), 1);
PUSH_DATA (push, 0);
BEGIN_NV04(push, NV50_3D(MULTISAMPLE_ENABLE), 1);
PUSH_DATA (push, 0);
BEGIN_NV04(push, NV50_3D(MULTISAMPLE_MODE), 1);
PUSH_DATA (push, NV50_3D_MULTISAMPLE_MODE_MS1);
BEGIN_NV04(push, NV50_3D(MULTISAMPLE_CTRL), 1);
PUSH_DATA (push, 0);
BEGIN_NV04(push, NV50_3D(LINE_LAST_PIXEL), 1);
PUSH_DATA (push, 0);
BEGIN_NV04(push, NV50_3D(BLEND_SEPARATE_ALPHA), 1);
PUSH_DATA (push, 1);
if (screen->tesla->oclass >= NVA0_3D_CLASS) {
BEGIN_NV04(push, SUBC_3D(NVA0_3D_TEX_MISC), 1);
PUSH_DATA (push, NVA0_3D_TEX_MISC_SEAMLESS_CUBE_MAP);
}
BEGIN_NV04(push, NV50_3D(SCREEN_Y_CONTROL), 1);
PUSH_DATA (push, 0);
BEGIN_NV04(push, NV50_3D(WINDOW_OFFSET_X), 2);
PUSH_DATA (push, 0);
PUSH_DATA (push, 0);
BEGIN_NV04(push, NV50_3D(ZCULL_REGION), 1);
PUSH_DATA (push, 0x3f);
BEGIN_NV04(push, NV50_3D(VP_ADDRESS_HIGH), 2);
PUSH_DATAh(push, screen->code->offset + (0 << NV50_CODE_BO_SIZE_LOG2));
PUSH_DATA (push, screen->code->offset + (0 << NV50_CODE_BO_SIZE_LOG2));
BEGIN_NV04(push, NV50_3D(FP_ADDRESS_HIGH), 2);
PUSH_DATAh(push, screen->code->offset + (1 << NV50_CODE_BO_SIZE_LOG2));
PUSH_DATA (push, screen->code->offset + (1 << NV50_CODE_BO_SIZE_LOG2));
BEGIN_NV04(push, NV50_3D(GP_ADDRESS_HIGH), 2);
PUSH_DATAh(push, screen->code->offset + (2 << NV50_CODE_BO_SIZE_LOG2));
PUSH_DATA (push, screen->code->offset + (2 << NV50_CODE_BO_SIZE_LOG2));
BEGIN_NV04(push, NV50_3D(LOCAL_ADDRESS_HIGH), 3);
PUSH_DATAh(push, screen->tls_bo->offset);
PUSH_DATA (push, screen->tls_bo->offset);
PUSH_DATA (push, util_logbase2(screen->cur_tls_space / 8));
BEGIN_NV04(push, NV50_3D(STACK_ADDRESS_HIGH), 3);
PUSH_DATAh(push, screen->stack_bo->offset);
PUSH_DATA (push, screen->stack_bo->offset);
PUSH_DATA (push, 4);
BEGIN_NV04(push, NV50_3D(CB_DEF_ADDRESS_HIGH), 3);
PUSH_DATAh(push, screen->uniforms->offset + (0 << 16));
PUSH_DATA (push, screen->uniforms->offset + (0 << 16));
PUSH_DATA (push, (NV50_CB_PVP << 16) | 0x0000);
BEGIN_NV04(push, NV50_3D(CB_DEF_ADDRESS_HIGH), 3);
PUSH_DATAh(push, screen->uniforms->offset + (1 << 16));
PUSH_DATA (push, screen->uniforms->offset + (1 << 16));
PUSH_DATA (push, (NV50_CB_PGP << 16) | 0x0000);
BEGIN_NV04(push, NV50_3D(CB_DEF_ADDRESS_HIGH), 3);
PUSH_DATAh(push, screen->uniforms->offset + (2 << 16));
PUSH_DATA (push, screen->uniforms->offset + (2 << 16));
PUSH_DATA (push, (NV50_CB_PFP << 16) | 0x0000);
BEGIN_NV04(push, NV50_3D(CB_DEF_ADDRESS_HIGH), 3);
PUSH_DATAh(push, screen->uniforms->offset + (3 << 16));
PUSH_DATA (push, screen->uniforms->offset + (3 << 16));
PUSH_DATA (push, (NV50_CB_AUX << 16) | 0x0200);
BEGIN_NI04(push, NV50_3D(SET_PROGRAM_CB), 3);
PUSH_DATA (push, (NV50_CB_AUX << 12) | 0xf01);
PUSH_DATA (push, (NV50_CB_AUX << 12) | 0xf21);
PUSH_DATA (push, (NV50_CB_AUX << 12) | 0xf31);
/* return { 0.0, 0.0, 0.0, 0.0 } on out-of-bounds vtxbuf access */
BEGIN_NV04(push, NV50_3D(CB_ADDR), 1);
PUSH_DATA (push, ((1 << 9) << 6) | NV50_CB_AUX);
BEGIN_NI04(push, NV50_3D(CB_DATA(0)), 4);
PUSH_DATAf(push, 0.0f);
PUSH_DATAf(push, 0.0f);
PUSH_DATAf(push, 0.0f);
PUSH_DATAf(push, 0.0f);
BEGIN_NV04(push, NV50_3D(VERTEX_RUNOUT_ADDRESS_HIGH), 2);
PUSH_DATAh(push, screen->uniforms->offset + (3 << 16) + (1 << 9));
PUSH_DATA (push, screen->uniforms->offset + (3 << 16) + (1 << 9));
/* max TIC (bits 4:8) & TSC bindings, per program type */
for (i = 0; i < 3; ++i) {
BEGIN_NV04(push, NV50_3D(TEX_LIMITS(i)), 1);
PUSH_DATA (push, 0x54);
}
BEGIN_NV04(push, NV50_3D(TIC_ADDRESS_HIGH), 3);
PUSH_DATAh(push, screen->txc->offset);
PUSH_DATA (push, screen->txc->offset);
PUSH_DATA (push, NV50_TIC_MAX_ENTRIES - 1);
BEGIN_NV04(push, NV50_3D(TSC_ADDRESS_HIGH), 3);
PUSH_DATAh(push, screen->txc->offset + 65536);
PUSH_DATA (push, screen->txc->offset + 65536);
PUSH_DATA (push, NV50_TSC_MAX_ENTRIES - 1);
BEGIN_NV04(push, NV50_3D(LINKED_TSC), 1);
PUSH_DATA (push, 0);
BEGIN_NV04(push, NV50_3D(CLIP_RECTS_EN), 1);
PUSH_DATA (push, 0);
BEGIN_NV04(push, NV50_3D(CLIP_RECTS_MODE), 1);
PUSH_DATA (push, NV50_3D_CLIP_RECTS_MODE_INSIDE_ANY);
BEGIN_NV04(push, NV50_3D(CLIP_RECT_HORIZ(0)), 8 * 2);
for (i = 0; i < 8 * 2; ++i)
PUSH_DATA(push, 0);
BEGIN_NV04(push, NV50_3D(CLIPID_ENABLE), 1);
PUSH_DATA (push, 0);
BEGIN_NV04(push, NV50_3D(VIEWPORT_TRANSFORM_EN), 1);
PUSH_DATA (push, 1);
BEGIN_NV04(push, NV50_3D(DEPTH_RANGE_NEAR(0)), 2);
PUSH_DATAf(push, 0.0f);
PUSH_DATAf(push, 1.0f);
BEGIN_NV04(push, NV50_3D(VIEW_VOLUME_CLIP_CTRL), 1);
#ifdef NV50_SCISSORS_CLIPPING
PUSH_DATA (push, 0x0000);
#else
PUSH_DATA (push, 0x1080);
#endif
BEGIN_NV04(push, NV50_3D(CLEAR_FLAGS), 1);
PUSH_DATA (push, NV50_3D_CLEAR_FLAGS_CLEAR_RECT_VIEWPORT);
/* We use scissors instead of exact view volume clipping,
* so they're always enabled.
*/
BEGIN_NV04(push, NV50_3D(SCISSOR_ENABLE(0)), 3);
PUSH_DATA (push, 1);
PUSH_DATA (push, 8192 << 16);
PUSH_DATA (push, 8192 << 16);
BEGIN_NV04(push, NV50_3D(RASTERIZE_ENABLE), 1);
PUSH_DATA (push, 1);
BEGIN_NV04(push, NV50_3D(POINT_RASTER_RULES), 1);
PUSH_DATA (push, NV50_3D_POINT_RASTER_RULES_OGL);
BEGIN_NV04(push, NV50_3D(FRAG_COLOR_CLAMP_EN), 1);
PUSH_DATA (push, 0x11111111);
BEGIN_NV04(push, NV50_3D(EDGEFLAG), 1);
PUSH_DATA (push, 1);
PUSH_KICK (push);
}
static boolean
nv50_validate_tic(struct nv50_context *nv50, int s)
{
struct nouveau_pushbuf *push = nv50->base.pushbuf;
struct nouveau_bo *txc = nv50->screen->txc;
unsigned i;
boolean need_flush = FALSE;
assert(nv50->num_textures[s] <= PIPE_MAX_SAMPLERS);
for (i = 0; i < nv50->num_textures[s]; ++i) {
struct nv50_tic_entry *tic = nv50_tic_entry(nv50->textures[s][i]);
struct nv04_resource *res;
if (!tic) {
BEGIN_NV04(push, NV50_3D(BIND_TIC(s)), 1);
PUSH_DATA (push, (i << 1) | 0);
continue;
}
res = &nv50_miptree(tic->pipe.texture)->base;
if (tic->id < 0) {
tic->id = nv50_screen_tic_alloc(nv50->screen, tic);
BEGIN_NV04(push, NV50_2D(DST_FORMAT), 2);
PUSH_DATA (push, NV50_SURFACE_FORMAT_R8_UNORM);
PUSH_DATA (push, 1);
BEGIN_NV04(push, NV50_2D(DST_PITCH), 5);
PUSH_DATA (push, 262144);
PUSH_DATA (push, 65536);
PUSH_DATA (push, 1);
PUSH_DATAh(push, txc->offset);
PUSH_DATA (push, txc->offset);
BEGIN_NV04(push, NV50_2D(SIFC_BITMAP_ENABLE), 2);
PUSH_DATA (push, 0);
PUSH_DATA (push, NV50_SURFACE_FORMAT_R8_UNORM);
BEGIN_NV04(push, NV50_2D(SIFC_WIDTH), 10);
PUSH_DATA (push, 32);
PUSH_DATA (push, 1);
PUSH_DATA (push, 0);
PUSH_DATA (push, 1);
PUSH_DATA (push, 0);
PUSH_DATA (push, 1);
PUSH_DATA (push, 0);
PUSH_DATA (push, tic->id * 32);
PUSH_DATA (push, 0);
PUSH_DATA (push, 0);
BEGIN_NI04(push, NV50_2D(SIFC_DATA), 8);
PUSH_DATAp(push, &tic->tic[0], 8);
need_flush = TRUE;
} else
if (res->status & NOUVEAU_BUFFER_STATUS_GPU_WRITING) {
BEGIN_NV04(push, NV50_3D(TEX_CACHE_CTL), 1);
PUSH_DATA (push, 0x20);
}
nv50->screen->tic.lock[tic->id / 32] |= 1 << (tic->id % 32);
res->status &= ~NOUVEAU_BUFFER_STATUS_GPU_WRITING;
res->status |= NOUVEAU_BUFFER_STATUS_GPU_READING;
BCTX_REFN(nv50->bufctx_3d, TEXTURES, res, RD);
BEGIN_NV04(push, NV50_3D(BIND_TIC(s)), 1);
PUSH_DATA (push, (tic->id << 9) | (i << 1) | 1);
}
for (; i < nv50->state.num_textures[s]; ++i) {
BEGIN_NV04(push, NV50_3D(BIND_TIC(s)), 1);
PUSH_DATA (push, (i << 1) | 0);
}
if (nv50->num_textures[s]) {
BEGIN_NV04(push, NV50_3D(CB_ADDR), 1);
PUSH_DATA (push, (NV50_CB_AUX_TEX_MS_OFFSET << (8 - 2)) | NV50_CB_AUX);
BEGIN_NI04(push, NV50_3D(CB_DATA(0)), nv50->num_textures[s] * 2);
for (i = 0; i < nv50->num_textures[s]; i++) {
struct nv50_tic_entry *tic = nv50_tic_entry(nv50->textures[s][i]);
struct nv50_miptree *res;
if (!tic) {
PUSH_DATA (push, 0);
PUSH_DATA (push, 0);
continue;
}
res = nv50_miptree(tic->pipe.texture);
PUSH_DATA (push, res->ms_x);
PUSH_DATA (push, res->ms_y);
}
}
nv50->state.num_textures[s] = nv50->num_textures[s];
return need_flush;
}
