/* ===================================================================*/ LDD_TDeviceData* I2C2_Init(LDD_TUserData *UserDataPtr) { /* Allocate HAL device structure */ I2C2_TDeviceData *DeviceDataPrv; /* {Default RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */ DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC; DeviceDataPrv->UserData = UserDataPtr; /* Store the RTOS device structure */ /* Allocate interrupt vector */ /* {Default RTOS Adapter} Set interrupt vector: IVT is static, ISR parameter is passed by the global variable */ INT_I2C0__DEFAULT_RTOS_ISRPARAM = DeviceDataPrv; DeviceDataPrv->SerFlag = 0x00U; /* Reset all flags */ DeviceDataPrv->SendStop = LDD_I2C_SEND_STOP; /* Set variable for sending stop condition (for master mode) */ DeviceDataPrv->InpLenM = 0x00U; /* Set zero counter of data of reception */ DeviceDataPrv->OutLenM = 0x00U; /* Set zero counter of data of transmission */ /* SIM_SCGC4: I2C0=1 */ SIM_SCGC4 |= SIM_SCGC4_I2C0_MASK; /* I2C0_C1: IICEN=0,IICIE=0,MST=0,TX=0,TXAK=0,RSTA=0,WUEN=0,DMAEN=0 */ I2C0_C1 = 0x00U; /* Clear control register */ /* I2C0_FLT: SHEN=0,STOPF=1,STOPIE=0,FLT=0 */ I2C0_FLT = (I2C_FLT_STOPF_MASK | I2C_FLT_FLT(0x00)); /* Clear bus status interrupt flags */ /* I2C0_S: TCF=0,IAAS=0,BUSY=0,ARBL=0,RAM=0,SRW=0,IICIF=1,RXAK=0 */ I2C0_S = I2C_S_IICIF_MASK; /* Clear interrupt flag */ /* PORTE_PCR25: ISF=0,MUX=5 */ PORTE_PCR25 = (uint32_t)((PORTE_PCR25 & (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK | PORT_PCR_MUX(0x02) )) | (uint32_t)( PORT_PCR_MUX(0x05) )); /* PORTE_PCR24: ISF=0,MUX=5 */ PORTE_PCR24 = (uint32_t)((PORTE_PCR24 & (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK | PORT_PCR_MUX(0x02) )) | (uint32_t)( PORT_PCR_MUX(0x05) )); /* NVIC_IPR2: PRI_8=0x80 */ NVIC_IPR2 = (uint32_t)((NVIC_IPR2 & (uint32_t)~(uint32_t)( NVIC_IP_PRI_8(0x7F) )) | (uint32_t)( NVIC_IP_PRI_8(0x80) )); /* NVIC_ISER: SETENA|=0x0100 */ NVIC_ISER |= NVIC_ISER_SETENA(0x0100); /* I2C0_C2: GCAEN=0,ADEXT=0,HDRS=0,SBRC=0,RMEN=0,AD=0 */ I2C0_C2 = I2C_C2_AD(0x00); /* I2C0_FLT: SHEN=0,STOPF=0,STOPIE=0,FLT=0 */ I2C0_FLT = I2C_FLT_FLT(0x00); /* Set glitch filter register */ /* I2C0_SMB: FACK=0,ALERTEN=0,SIICAEN=0,TCKSEL=0,SLTF=1,SHTF1=0,SHTF2=0,SHTF2IE=0 */ I2C0_SMB = I2C_SMB_SLTF_MASK; /* I2C0_F: MULT=0,ICR=0 */ I2C0_F = (I2C_F_MULT(0x00) | I2C_F_ICR(0x00)); /* Set prescaler bits */ I2C_PDD_EnableDevice(I2C0_BASE_PTR, PDD_ENABLE); /* Enable device */ I2C_PDD_EnableInterrupt(I2C0_BASE_PTR); /* Enable interrupt */ /* Registration of the device structure */ PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_I2C2_ID,DeviceDataPrv); return ((LDD_TDeviceData *)DeviceDataPrv); /* Return pointer to the data data structure */ }
void i2c_init (void) { /* * this function initializes the I2C bus to use interrupts */ if (i2c_initialize == TRUE) { return; // already initialized } memset(&i2c_buf, 0x00, sizeof(i2c_buf)); /* SIM_SCGC4: I2C0=1 */ SIM_SCGC4 |= SIM_SCGC4_I2C0_MASK; /* I2C0_C1: IICEN=0,IICIE=0,MST=0,TX=0,TXAK=0,RSTA=0,WUEN=0,DMAEN=0 */ I2C0_C1 = 0x00U; /* Clear control register */ /* I2C0_FLT: SHEN=0,STOPF=1,STOPIE=0,FLT=0 */ I2C0_FLT = I2C_FLT_STOPF_MASK; /* Clear bus status interrupt flags */ /* I2C0_S: TCF=0,IAAS=0,BUSY=0,ARBL=0,RAM=0,SRW=0,IICIF=1,RXAK=0 */ I2C0_S = I2C_S_IICIF_MASK; /* Clear interrupt flag */ /* PORTB_PCR1: ISF=0,MUX=2 */ PORTB_PCR1 = (uint32_t)((PORTB_PCR1 & (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK | PORT_PCR_MUX(0x05) )) | (uint32_t)( PORT_PCR_MUX(0x02) )); /* PORTB_PCR0: ISF=0,MUX=2 */ PORTB_PCR0 = (uint32_t)((PORTB_PCR0 & (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK | PORT_PCR_MUX(0x05) )) | (uint32_t)( PORT_PCR_MUX(0x02) )); /* NVIC_IPR2: PRI_8=0x80 */ NVIC_IPR2 = (uint32_t)((NVIC_IPR2 & (uint32_t)~(uint32_t)( NVIC_IP_PRI_8(0x7F) )) | (uint32_t)( NVIC_IP_PRI_8(0x80) )); /* NVIC_ISER: SETENA|=0x0100 */ NVIC_ISER |= NVIC_ISER_SETENA(0x0100); /* I2C0_C2: GCAEN=0,ADEXT=0,HDRS=0,SBRC=0,RMEN=0,AD=0 */ I2C0_C2 = 0x00U; /* I2C0_FLT: SHEN=0,STOPF=0,STOPIE=0,FLT=0 */ I2C0_FLT = 0x00U; /* Set glitch filter register */ /* I2C0_SMB: FACK=0,ALERTEN=0,SIICAEN=0,TCKSEL=0,SLTF=1,SHTF1=0,SHTF2=0,SHTF2IE=0 */ I2C0_SMB = I2C_SMB_SLTF_MASK; /* I2C0_F: MULT=0,ICR=2 */ //I2C0_F = I2C_F_ICR(0x02); /* Set prescaler bits */ /* I2C0_F: MULT=0,ICR=F = /68 p.706 of http://cache.freescale.com/files/32bit/doc/ref_manual/KL25P80M48SF0RM.pdf */ I2C0_F = I2C_F_ICR(0x02); //I2C_F_ICR(0x0F); /* Set prescaler bits */ //I2C_PDD_EnableDevice(I2C0_BASE_PTR, PDD_ENABLE); /* Enable device */ #define PDD_ENABLE 1u /* Enable I2C device */ I2C_C1_REG(I2C0_BASE_PTR) = (uint_8) ((I2C_C1_REG(I2C0_BASE_PTR) & ~I2C_C1_IICEN_MASK | 1u << I2C_C1_IICEN_SHIFT)); // TODO: fix this, I am pretty sure |= will work //I2C_PDD_EnableInterrupt(I2C0_BASE_PTR); /* Enable interrupt */ I2C_C1_REG(I2C0_BASE_PTR) |= I2C_C1_IICIE_MASK; i2c_initialize = TRUE; }