const NvOdmGpioPinInfo *NvOdmQueryGpioPinMap(NvOdmGpioPinGroup Group, NvU32 Instance, NvU32 *pCount) { NvU32 CustomerOption = 0; NvU32 Personality = 0; NvOdmServicesKeyListHandle hKeyList; hKeyList = NvOdmServicesKeyListOpen(); if (hKeyList) { CustomerOption = NvOdmServicesGetKeyValue(hKeyList, NvOdmKeyListId_ReservedBctCustomerOption); NvOdmServicesKeyListClose(hKeyList); Personality = NV_DRF_VAL(TEGRA_DEVKIT, BCT_CUSTOPT, PERSONALITY, CustomerOption); } if (!Personality) Personality = TEGRA_DEVKIT_DEFAULT_PERSONALITY; switch (Group) { case NvOdmGpioPinGroup_Display: *pCount = NVODM_ARRAY_SIZE(s_display); return s_display; case NvOdmGpioPinGroup_Sdio: if (Instance == 2) { *pCount = NVODM_ARRAY_SIZE(s_Sdio2); return s_Sdio2; } else { *pCount = 0; return NULL; } case NvOdmGpioPinGroup_ScrollWheel: if ((Personality == TEGRA_DEVKIT_BCT_CUSTOPT_0_PERSONALITY_11) || (Personality == TEGRA_DEVKIT_BCT_CUSTOPT_0_PERSONALITY_15) || (Personality == TEGRA_DEVKIT_BCT_CUSTOPT_0_PERSONALITY_C1)) { *pCount = NVODM_ARRAY_SIZE(s_ScrollWheel_TraceMode); return s_ScrollWheel_TraceMode; } else { *pCount = NVODM_ARRAY_SIZE(s_ScrollWheel); return s_ScrollWheel; } case NvOdmGpioPinGroup_NandFlash: *pCount = NVODM_ARRAY_SIZE(s_NandFlash); return s_NandFlash; case NvOdmGpioPinGroup_Bluetooth: *pCount = NVODM_ARRAY_SIZE(s_Bluetooth); return s_Bluetooth; case NvOdmGpioPinGroup_Wlan: *pCount = NVODM_ARRAY_SIZE(s_Wlan); return s_Wlan; case NvOdmGpioPinGroup_SpiEthernet: *pCount = NVODM_ARRAY_SIZE(s_spi_ethernet); return s_spi_ethernet; case NvOdmGpioPinGroup_Vi: *pCount = NVODM_ARRAY_SIZE(s_vi); return s_vi; case NvOdmGpioPinGroup_Hdmi: *pCount = NVODM_ARRAY_SIZE(s_hdmi); return s_hdmi; default: *pCount = 0; return NULL; } }
const NvOdmUsbProperty* NvOdmQueryGetUsbProperty(NvOdmIoModule OdmIoModule, NvU32 Instance) { #ifdef CONFIG_TEGRA_USB_VBUS_DETECT_BY_PMU #define NVODM_USE_INTERNAL_PHY_VBUS_DETECTION NV_FALSE #else #define NVODM_USE_INTERNAL_PHY_VBUS_DETECTION NV_TRUE #endif static const NvOdmUsbProperty Usb1Property = { NvOdmUsbInterfaceType_Utmi, (NvOdmUsbChargerType_SE0 | NvOdmUsbChargerType_SE1 | NvOdmUsbChargerType_SK), 20, NV_FALSE, #ifdef CONFIG_USB_TEGRA_OTG NvOdmUsbModeType_OTG, #else NvOdmUsbModeType_Device, #endif NvOdmUsbIdPinType_None, NvOdmUsbConnectorsMuxType_None, NV_FALSE }; static const NvOdmUsbProperty Usb2Property = { NvOdmUsbInterfaceType_UlpiExternalPhy, NvOdmUsbChargerType_UsbHost, 20, NVODM_USE_INTERNAL_PHY_VBUS_DETECTION, NvOdmUsbModeType_Host, NvOdmUsbIdPinType_None, NvOdmUsbConnectorsMuxType_None, NV_FALSE, {0, 0, 0, 0}, "sw5" }; static const NvOdmUsbProperty Usb2NullPhyProperty = { NvOdmUsbInterfaceType_UlpiNullPhy, NvOdmUsbChargerType_UsbHost, 20, NVODM_USE_INTERNAL_PHY_VBUS_DETECTION, NvOdmUsbModeType_Host, NvOdmUsbIdPinType_None, NvOdmUsbConnectorsMuxType_None, NV_FALSE, {10, 1, 1, 1} }; static const NvOdmUsbProperty Usb3Property = { NvOdmUsbInterfaceType_Utmi, NvOdmUsbChargerType_UsbHost, 20, NVODM_USE_INTERNAL_PHY_VBUS_DETECTION, NvOdmUsbModeType_Host, NvOdmUsbIdPinType_None, NvOdmUsbConnectorsMuxType_None, NV_FALSE }; /* E1108 has no ID pin for USB3, so disable USB3 Host */ static const NvOdmUsbProperty Usb3Property_E1108 = { NvOdmUsbInterfaceType_Utmi, NvOdmUsbChargerType_UsbHost, 20, NVODM_USE_INTERNAL_PHY_VBUS_DETECTION, NvOdmUsbModeType_None, NvOdmUsbIdPinType_None, NvOdmUsbConnectorsMuxType_None, NV_FALSE }; if (OdmIoModule == NvOdmIoModule_Usb && Instance == 0) return &(Usb1Property); if (OdmIoModule == NvOdmIoModule_Usb && Instance == 1) { NvU32 CustOpt = GetBctKeyValue(); if (NV_DRF_VAL(TEGRA_DEVKIT, BCT_CUSTOPT, RIL, CustOpt) == TEGRA_DEVKIT_BCT_CUSTOPT_0_RIL_EMP_RAINBOW_ULPI) return &(Usb2NullPhyProperty); else return &(Usb2Property); } if (OdmIoModule == NvOdmIoModule_Usb && Instance == 2) { NvOdmBoardInfo BoardInfo; if (NvOdmPeripheralGetBoardInfo(BOARD_ID_WHISTLER_E1108, &BoardInfo)) { return &(Usb3Property_E1108); } else { return &(Usb3Property); } } return (const NvOdmUsbProperty *)NULL; }
NvRmPmRequest NvRmPrivAp20GetPmRequest( NvRmDeviceHandle hRmDevice, const NvRmDfsSampler* pCpuSampler, NvRmFreqKHz* pCpuKHz) { // Assume initial slave CPU1 On request static NvRmPmRequest s_LastPmRequest = (NvRmPmRequest_CpuOnFlag | 0x1); NvRmFreqKHz s_Cpu1OnMinKHz = 0; NvRmFreqKHz s_Cpu1OffMaxKHz= 0; static NvU32 s_Cpu1OnPendingCnt = 0, s_Cpu1OffPendingCnt = 0; NvU32 t; NvRmPmRequest PmRequest = NvRmPmRequest_None; NvBool Cpu1Off = (0 != NV_DRF_VAL(CLK_RST_CONTROLLER, RST_CPU_CMPLX_SET, SET_CPURESET1, NV_REGR(hRmDevice, NvRmPrivModuleID_ClockAndReset, 0, CLK_RST_CONTROLLER_RST_CPU_CMPLX_SET_0))); NvRmFreqKHz CpuLoadGaugeKHz = *pCpuKHz; // Slave CPU1 power management policy thresholds: // - use fixed values if they are defined explicitly, otherwise // - set CPU1 OffMax threshold at 2/3 of cpu frequency range, // and half of that frequency as CPU1 OnMin threshold if ((s_Cpu1OffMaxKHz == 0) && (s_Cpu1OnMinKHz == 0)) { NvRmFreqKHz MaxKHz = NvRmPrivGetSocClockLimits(NvRmModuleID_Cpu)->MaxKHz; s_Cpu1OnMinKHz = NVRM_CPU1_ON_MIN_KHZ; s_Cpu1OffMaxKHz = NVRM_CPU1_OFF_MAX_KHZ; NV_ASSERT(s_Cpu1OnMinKHz < s_Cpu1OffMaxKHz); } // Timestamp if (s_pTimerUs == NULL) s_pTimerUs = NvRmPrivAp15GetTimerUsVirtAddr(hRmDevice); t = NV_READ32(s_pTimerUs); /* * Request OS kernel to turn CPU1 Off if all of the following is true: * (a) CPU frequency is below OnMin threshold, * (b) CPU1 is actually On * * Request OS kernel to turn CPU1 On if all of the following is true: * (a) CPU frequency is above OffMax threshold * (b) CPU1 is actually Off */ if (CpuLoadGaugeKHz < s_Cpu1OnMinKHz) { s_Cpu1OnPendingCnt = 0; if ((s_Cpu1OffPendingCnt & 0x1) == 0) { s_Cpu1OffPendingCnt = t | 0x1; // Use LSb as a delay start flag return PmRequest; } if ((t - s_Cpu1OffPendingCnt) < (NVRM_CPU1_OFF_PENDING_MS * 1000)) return PmRequest; if (!Cpu1Off) { s_LastPmRequest = PmRequest = (NvRmPmRequest_CpuOffFlag | 0x1); s_Cpu1OffPendingCnt = 0; // re-start delay after request } #if NVRM_TEST_PMREQUEST_UP_MODE NV_REGW(hRmDevice, NvRmPrivModuleID_ClockAndReset, 0, CLK_RST_CONTROLLER_RST_CPU_CMPLX_SET_0, CLK_RST_CONTROLLER_RST_CPU_CMPLX_SET_0_SET_CPURESET1_FIELD); #endif } else if (CpuLoadGaugeKHz > s_Cpu1OffMaxKHz) { s_Cpu1OffPendingCnt = 0; if ((s_Cpu1OnPendingCnt & 0x1) == 0) { s_Cpu1OnPendingCnt = t | 0x1; // Use LSb as a delay start flag return PmRequest; } if ((t - s_Cpu1OnPendingCnt) < (NVRM_CPU1_ON_PENDING_MS * 1000)) return PmRequest; if (Cpu1Off) { s_LastPmRequest = PmRequest = (NvRmPmRequest_CpuOnFlag | 0x1); *pCpuKHz = NvRmPrivGetSocClockLimits(NvRmModuleID_Cpu)->MaxKHz; s_Cpu1OnPendingCnt = 0; // re-start delay after request } #if NVRM_TEST_PMREQUEST_UP_MODE NV_REGW(hRmDevice, NvRmPrivModuleID_ClockAndReset, 0, CLK_RST_CONTROLLER_RST_CPU_CMPLX_CLR_0, CLK_RST_CONTROLLER_RST_CPU_CMPLX_CLR_0_CLR_CPURESET1_FIELD); #endif } else { // Re-start both delays inside hysteresis loop s_Cpu1OnPendingCnt = 0; s_Cpu1OffPendingCnt = 0; } return PmRequest; }