void nxp_cpu_shutdown(void)
{
int cpu, cur = smp_processor_id();
if (nxp_board_shutdown)
nxp_board_shutdown();
for_each_present_cpu(cpu) {
if (cpu == cur)
continue;
nxp_cpu_core_shutdown(cpu);
}
printk("cpu.%d shutdown ...\n", cur);
NX_ALIVE_SetWriteEnable(CTRUE); /* close alive gate */
NX_ALIVE_SetVDDPWRON(CFALSE, CFALSE); /* Core power down */
NX_ALIVE_SetWriteEnable(CFALSE); /* close alive gate */
nxp_cpu_core_shutdown(cur);
halt();
}
static void cpu_base_init(void)
{
int i = 0;
NX_RSTCON_Initialize();
NX_RSTCON_SetBaseAddress((void*)IO_ADDRESS(NX_RSTCON_GetPhysicalAddress()));
NX_TIEOFF_Initialize();
NX_TIEOFF_SetBaseAddress((void*)IO_ADDRESS(NX_TIEOFF_GetPhysicalAddress()));
NX_CLKGEN_Initialize();
for (i = 0; NX_CLKGEN_GetNumberOfModule() > i; i++)
NX_CLKGEN_SetBaseAddress(i, (void*)IO_ADDRESS(NX_CLKGEN_GetPhysicalAddress(i)));
NX_GPIO_Initialize();
for (i = 0; NX_GPIO_GetNumberOfModule() > i; i++) {
NX_GPIO_SetBaseAddress(i, (void*)IO_ADDRESS(NX_GPIO_GetPhysicalAddress(i)));
NX_GPIO_OpenModule(i);
}
NX_ALIVE_Initialize();
NX_ALIVE_SetBaseAddress((void*)IO_ADDRESS(NX_ALIVE_GetPhysicalAddress()));
NX_ALIVE_OpenModule();
NX_CLKPWR_Initialize();
NX_CLKPWR_SetBaseAddress((void*)IO_ADDRESS(NX_CLKPWR_GetPhysicalAddress()));
NX_CLKPWR_OpenModule();
/*
* NOTE> ALIVE Power Gate must enable for RTC register access.
* must be clear wfi jump address
*/
NX_ALIVE_SetWriteEnable(CTRUE);
__raw_writel(0xFFFFFFFF, SCR_ARM_SECOND_BOOT);
// write 0xf0 on alive scratchpad reg for boot success check
NX_ALIVE_SetScratchReg(NX_ALIVE_GetScratchReg() | 0xF0);
NX_WDT_Initialize();
NX_WDT_SetBaseAddress(0, (void*)IO_ADDRESS(NX_WDT_GetPhysicalAddress(0)));
NX_WDT_OpenModule(0);
// watchdog disable
if (NX_WDT_GetEnable(0)) {
NX_WDT_SetEnable(0, CFALSE);
NX_WDT_SetResetEnable(0, CFALSE);
NX_WDT_ClearInterruptPending(0, NX_WDT_GetInterruptNumber(0));
}
}
static void cpu_base_init(void)
{
U32 tie_reg, val;
int i = 0;
NX_RSTCON_Initialize();
NX_RSTCON_SetBaseAddress((void*)IO_ADDRESS(NX_RSTCON_GetPhysicalAddress()));
NX_TIEOFF_Initialize();
NX_TIEOFF_SetBaseAddress((void*)IO_ADDRESS(NX_TIEOFF_GetPhysicalAddress()));
NX_GPIO_Initialize();
for (i = 0; NX_GPIO_GetNumberOfModule() > i; i++) {
NX_GPIO_SetBaseAddress(i, (void*)IO_ADDRESS(NX_GPIO_GetPhysicalAddress(i)));
NX_GPIO_OpenModule(i);
}
NX_ALIVE_Initialize();
NX_ALIVE_SetBaseAddress((void*)IO_ADDRESS(NX_ALIVE_GetPhysicalAddress()));
NX_ALIVE_OpenModule();
NX_CLKPWR_Initialize();
NX_CLKPWR_SetBaseAddress((void*)IO_ADDRESS(NX_CLKPWR_GetPhysicalAddress()));
NX_CLKPWR_OpenModule();
NX_ECID_Initialize();
NX_ECID_SetBaseAddress((void*)IO_ADDRESS(NX_ECID_GetPhysicalAddress()));
/*
* NOTE> ALIVE Power Gate must enable for RTC register access.
* must be clear wfi jump address
*/
NX_ALIVE_SetWriteEnable(CTRUE);
__raw_writel(0xFFFFFFFF, SCR_ARM_SECOND_BOOT);
/*
* NOTE> Control for ACP register access.
*/
tie_reg = (U32)IO_ADDRESS(NX_TIEOFF_GetPhysicalAddress());
val = __raw_readl(tie_reg + 0x70) & ~((3 << 30) | (3 << 10));
writel(val, (tie_reg + 0x70));
val = __raw_readl(tie_reg + 0x80) & ~(3 << 3);
writel(val, (tie_reg + 0x80));
}
void nxp_cpu_reset(char str, const char *cmd)
{
printk("system reset: %s ...\n", cmd);
if (nxp_board_reset)
nxp_board_reset(str, cmd);
__raw_writel((-1UL), SCR_RESET_SIG_RESET);
if (cmd && !strcmp(cmd, "recovery")) {
__raw_writel(RECOVERY_SIGNATURE, SCR_RESET_SIG_SET);
__raw_readl (SCR_RESET_SIG_READ); /* verify */
}
if (cmd && !strcmp(cmd, "usbboot")) {
__raw_writel(USBBOOT_SIGNATURE, SCR_RESET_SIG_SET);
__raw_readl (SCR_RESET_SIG_READ); /* verify */
}
printk("recovery sign [0x%x:0x%x] \n", SCR_RESET_SIG_READ, readl(SCR_RESET_SIG_READ));
NX_ALIVE_SetWriteEnable(CFALSE); /* close alive gate */
NX_CLKPWR_SetSoftwareResetEnable(CTRUE);
NX_CLKPWR_DoSoftwareReset();
}
static void cpu_base_init(void)
{
int i = 0;
NX_RSTCON_Initialize();
NX_RSTCON_SetBaseAddress((void*)IO_ADDRESS(NX_RSTCON_GetPhysicalAddress()));
NX_TIEOFF_Initialize();
NX_TIEOFF_SetBaseAddress((void*)IO_ADDRESS(NX_TIEOFF_GetPhysicalAddress()));
NX_GPIO_Initialize();
for (i = 0; NX_GPIO_GetNumberOfModule() > i; i++) {
NX_GPIO_SetBaseAddress(i, (void*)IO_ADDRESS(NX_GPIO_GetPhysicalAddress(i)));
NX_GPIO_OpenModule(i);
}
NX_ALIVE_Initialize();
NX_ALIVE_SetBaseAddress((void*)IO_ADDRESS(NX_ALIVE_GetPhysicalAddress()));
NX_ALIVE_OpenModule();
NX_CLKPWR_Initialize();
NX_CLKPWR_SetBaseAddress((void*)IO_ADDRESS(NX_CLKPWR_GetPhysicalAddress()));
NX_CLKPWR_OpenModule();
NX_ECID_Initialize();
NX_ECID_SetBaseAddress((void*)IO_ADDRESS(NX_ECID_GetPhysicalAddress()));
/*
* NOTE> ALIVE Power Gate must enable for RTC register access.
* must be clear wfi jump address
*/
NX_ALIVE_SetWriteEnable(CTRUE);
__raw_writel(0xFFFFFFFF, SCR_ARM_SECOND_BOOT);
/* clear cpu id register for second cores */
__raw_writel((-1UL), SCR_SMP_WAKE_CPU_ID);
}
static void cpu_base_init(void)
{
U32 tie_reg, val;
int i = 0;
NX_RSTCON_Initialize();
NX_RSTCON_SetBaseAddress((void*)IO_ADDRESS(NX_RSTCON_GetPhysicalAddress()));
NX_TIEOFF_Initialize();
NX_TIEOFF_SetBaseAddress((void*)IO_ADDRESS(NX_TIEOFF_GetPhysicalAddress()));
NX_CLKGEN_Initialize();
for (i = 0; NX_CLKGEN_GetNumberOfModule() > i; i++)
NX_CLKGEN_SetBaseAddress(i, (void*)IO_ADDRESS(NX_CLKGEN_GetPhysicalAddress(i)));
NX_GPIO_Initialize();
for (i = 0; NX_GPIO_GetNumberOfModule() > i; i++) {
NX_GPIO_SetBaseAddress(i, (void*)IO_ADDRESS(NX_GPIO_GetPhysicalAddress(i)));
NX_GPIO_OpenModule(i);
}
NX_ALIVE_Initialize();
NX_ALIVE_SetBaseAddress((void*)IO_ADDRESS(NX_ALIVE_GetPhysicalAddress()));
NX_ALIVE_OpenModule();
NX_CLKPWR_Initialize();
NX_CLKPWR_SetBaseAddress((void*)IO_ADDRESS(NX_CLKPWR_GetPhysicalAddress()));
NX_CLKPWR_OpenModule();
/*
* NOTE> ALIVE Power Gate must enable for RTC register access.
* must be clear wfi jump address
*/
NX_ALIVE_SetWriteEnable(CTRUE);
__raw_writel(0xFFFFFFFF, SCR_ARM_SECOND_BOOT);
/*
* NOTE> Control for ACP register access.
*/
tie_reg = (U32)IO_ADDRESS(NX_TIEOFF_GetPhysicalAddress());
val = __raw_readl(tie_reg + 0x70) & ~((3 << 30) | (3 << 10));
writel(val, (tie_reg + 0X70));
val = __raw_readl(tie_reg + 0x80) & ~(3 << 3);
writel(val, (tie_reg + 0x80));
/* add by cym 20150811 */
#ifdef CONFIG_MACH_S5P6818
/* end add */
// write 0xf0 on alive scratchpad reg for boot success check
NX_ALIVE_SetScratchReg(NX_ALIVE_GetScratchReg() | 0xF0);
NX_WDT_Initialize();
NX_WDT_SetBaseAddress(0, (void*)IO_ADDRESS(NX_WDT_GetPhysicalAddress(0)));
NX_WDT_OpenModule(0);
// watchdog disable
if (NX_WDT_GetEnable(0)) {
NX_WDT_SetEnable(0, CFALSE);
NX_WDT_SetResetEnable(0, CFALSE);
NX_WDT_ClearInterruptPending(0, NX_WDT_GetInterruptNumber(0));
}
/* add by cym 20150811 */
#endif
/* end add */
}
