void main(void){ PLL_Init(); // running at 24MHz DDRT |= 0x1F; // debugging outputs PTT &= ~0x1F; Debug_Profile(0); // 0 means initialization phase Fifo_Init(); // Initialize fifo OC0_Init(); // variable rate interrupt ForeExpected = 0; // expected data for(;;){ Debug_Profile(1); // 1 means start of foreground waiting PTT_PTT1 = 0; // falling edge of PT1 means start of foreground waiting while(Fifo_Get(&ForeData)==FIFOFAIL){ } Debug_Profile(2); // 2 means foreground has new data PTT_PTT1 = 1; // rising edge of PT1 means start of foreground processing if(ForeExpected != ForeData){ Errors++; PTT ^= 0x10; // critical section found ForeExpected = ForeData+1; // resych to lost/bad data } else{ ForeExpected++; // sequence is 0,1,2,3,...,254,255,0,1,... } if((ForeData%10)==0){ Debug_Profile(3); // 3 means foreground has 10th data } } }
void mainTRANSMITTER(void) { asm sei // Disable interrupts PLL_Init(); ADC_Init(); sci1_Init(); DDRP |= 0x80; // PP7 output OC0_Init(); // Intializes timer as well asm cli // Enable interrupts for(;;) { /* Do Nothing */} }