/*!
* @cond DOXYGEN_PRIVATE
*
* @brief Initialization of pit timer module
*
* Called by hwtimer_deinit. Disables the peripheral. Unregisters ISR.
*
* @param hwtimer[in] Pointer to hwtimer structure.
*
* @return kHwtimerSuccess Success.
* @return kHwtimerLockError When Locking failed.
* @return kHwtimerRegisterHandlerError When un-registration of the interrupt service routine failed.
*
* @see HWTIMER_SYS_PitInit
* @see HWTIMER_SYS_PitSetDiv
* @see HWTIMER_SYS_PitStart
* @see HWTIMER_SYS_PitStop
* @see HWTIMER_SYS_PitGetTime
* @see HWTIMER_SYS_PitIsr
* @see HWTIMER_SYS_PitIsrShared
*/
static _hwtimer_error_code_t HWTIMER_SYS_PitDeinit(hwtimer_t * hwtimer)
{
/* We belive that if isr is shared ,than is shared for every chanells */
uint32_t baseAddr = g_pitBaseAddr[0];
uint32_t pitChannel;
int i;
assert(NULL != hwtimer);
pitChannel = hwtimer->llContext[0U];
assert(pitChannel < FSL_FEATURE_PIT_TIMER_COUNT);
/* Remove Hwtimer from global array and disable interrupt on this channel */
PIT_HAL_StopTimer(baseAddr, pitChannel);
PIT_HAL_SetIntCmd(baseAddr, pitChannel, false);
PIT_HAL_ClearIntFlag(baseAddr, pitChannel);
/* Critical section. Access to global variable */
if (kStatus_OSA_Success != OSA_MutexLock(g_lock, OSA_WAIT_FOREVER))
{
return kHwtimerLockError;
}
/* Pit can have shared interrupt vectors. We need un-register interrupt only when all hwtimers are de-inited(set to NULL) */
g_hwtimersPit[pitChannel] = NULL;
if (kStatus_OSA_Success != OSA_MutexUnlock(g_lock))
{
return kHwtimerLockError;
}
/* Check if this is last hwtimer in pit_hwtimers_array */
for (i = 0U; i < FSL_FEATURE_PIT_TIMER_COUNT; i++)
{
if (NULL != g_hwtimersPit[i])
{
break;
}
}
if (i == FSL_FEATURE_PIT_TIMER_COUNT)
{
if(kStatus_OSA_Success != OSA_InstallIntHandler(kpitIrqIds[pitChannel], NULL))
{
return kHwtimerRegisterHandlerError;
}
}
/* Release lock if does not exists*/
/* Enter critical section to avoid interrupt release locking */
OSA_EnterCritical(kCriticalDisableInt);
if (kStatus_OSA_Success != OSA_MutexUnlock(g_lock))
{
return kHwtimerLockError;
}
g_lock = NULL;
OSA_ExitCritical(kCriticalDisableInt);
return kHwtimerSuccess;
}
void Components_Init(void)
{
/*! dd_scheduler Auto initialization start */
(void)dd_scheduler_Init();
/*! dd_scheduler Auto initialization end */
/*! myUART Auto initialization start */
OSA_InstallIntHandler(UART3_RX_TX_IRQn, myUART_IRQHandler);
UART_DRV_Init(myUART_IDX,&myUART_State,&myUART_InitConfig0);
UART_DRV_InstallRxCallback(myUART_IDX, myUART_RxCallback, myRxBuff, NULL, true);
/*! myUART Auto initialization end */
}
void Components_Init(void)
{
/*! LED Auto initialization start */
GPIO_DRV_Init(LED_Config,LED_OutConfig0);
/*! LED Auto initialization end */
/*! i2c_compS Auto initialization start */
OSA_InstallIntHandler(I2C0_IRQn, i2c_compS_IRQHandler);
I2C_DRV_MasterInit(FSL_I2C_COMPS, &i2c_compS_MasterState);
I2C_DRV_MasterSetBaudRate(FSL_I2C_COMPS, &i2c_gmeter);
/*! i2c_compS Auto initialization end */
}
/*!
* @cond DOXYGEN_PRIVATE
*
* @brief This function initializes caller allocated structure according to given
* numerical identifier of the timer.
*
* Called by hwtimer_init().
* Initializes the HWTIMER structure.
* Sets interrupt priority and registers ISR.
*
* @param hwtimer[in] Returns initialized hwtimer structure handle.
* @param pitId[in] Determines PIT module and pit channel.
* @param isrPrior[in] Interrupt priority for PIT
* @param data[in] Specific data. Not used in this timer.
*
* @return kHwtimerSuccess Success.
* @return kHwtimerInvalidInput When channel number does not exist in pit module.
* @return kHwtimerRegisterHandlerError When registration of the interrupt service routine failed.
*
* @see HWTIMER_SYS_PitDeinit
* @see HWTIMER_SYS_PitSetDiv
* @see HWTIMER_SYS_PitStart
* @see HWTIMER_SYS_PitStop
* @see HWTIMER_SYS_PitGetTime
* @see HWTIMER_SYS_PitIsr
* @see HWTIMER_SYS_PitIsrShared
*/
static _hwtimer_error_code_t HWTIMER_SYS_PitInit(hwtimer_t * hwtimer, uint32_t pitId, uint32_t isrPrior, void *data)
{
uint32_t pitChannel;
uint32_t baseAddr = g_pitBaseAddr[0];
if (FSL_FEATURE_PIT_TIMER_COUNT < pitId)
{
return kHwtimerInvalidInput;
}
assert(NULL != hwtimer);
/* We need to store pitId of timer in context struct */
hwtimer->llContext[0U] = pitId;
pitChannel = hwtimer->llContext[0U];
/* Un-gate pit clock */
CLOCK_SYS_EnablePitClock(0U);
/* Enable PIT module clock */
PIT_HAL_Enable(baseAddr);
/* Allows the timers to be stopped when the device enters the Debug mode. */
PIT_HAL_SetTimerRunInDebugCmd(baseAddr, false);
/* Disable timer and interrupt */
PIT_HAL_StopTimer(baseAddr, pitChannel);
PIT_HAL_SetIntCmd(baseAddr, pitChannel, false);
/* Clear any pending interrupt */
PIT_HAL_ClearIntFlag(baseAddr, pitChannel);
/* Store hwtimer in global array */
g_hwtimersPit[pitChannel] = hwtimer;
/* Enable PIT interrupt.*/
if (kStatus_OSA_Success != OSA_InstallIntHandler(g_pitIrqId[pitChannel], HWTIMER_SYS_PitIsr))
{
return kHwtimerRegisterHandlerError;
}
PIT_HAL_SetIntCmd(baseAddr, pitChannel, true);
INT_SYS_EnableIRQ(g_pitIrqId[pitChannel]);
return kHwtimerSuccess;
}
/*!
* @cond DOXYGEN_PRIVATE
*
* @brief Initialization of pit timer module
*
* Called by hwtimer_deinit. Disables the peripheral. Unregisters ISR.
*
* @param hwtimer[in] Pointer to hwtimer structure.
*
* @return kHwtimerSuccess Success.
* @return kHwtimerRegisterHandlerError When un-registration of the interrupt service routine failed.
*
* @see HWTIMER_SYS_PitInit
* @see HWTIMER_SYS_PitSetDiv
* @see HWTIMER_SYS_PitStart
* @see HWTIMER_SYS_PitStop
* @see HWTIMER_SYS_PitGetTime
* @see HWTIMER_SYS_PitIsr
* @see HWTIMER_SYS_PitIsrShared
*/
static _hwtimer_error_code_t HWTIMER_SYS_PitDeinit(hwtimer_t * hwtimer)
{
/* We belive that if isr is shared ,than is shared for every chanells */
uint32_t baseAddr = g_pitBaseAddr[0];
uint32_t pitChannel;
int i;
assert(NULL != hwtimer);
pitChannel = hwtimer->llContext[0U];
assert(pitChannel < FSL_FEATURE_PIT_TIMER_COUNT);
/* Remove Hwtimer from global array and disable interrupt on this channel */
PIT_HAL_StopTimer(baseAddr, pitChannel);
PIT_HAL_SetIntCmd(baseAddr, pitChannel, false);
PIT_HAL_ClearIntFlag(baseAddr, pitChannel);
/* Pit can have shared interrupt vectors. We need un-register interrupt only when all hwtimers are de-inited(set to NULL) */
g_hwtimersPit[pitChannel] = NULL;
/* Check if this is last hwtimer in pit_hwtimers_array */
for (i = 0U; i < FSL_FEATURE_PIT_TIMER_COUNT; i++)
{
if (NULL != g_hwtimersPit[i])
{
break;
}
}
if (i == FSL_FEATURE_PIT_TIMER_COUNT)
{
if(kStatus_OSA_Success != OSA_InstallIntHandler(g_pitIrqId[pitChannel], NULL))
{
return kHwtimerRegisterHandlerError;
}
}
return kHwtimerSuccess;
}
/************************************************************************************
*************************************************************************************
* Public functions
*************************************************************************************
************************************************************************************/
void StackTimer_Init(void (*cb)(void))
{
IRQn_Type irqId;
#if FSL_FEATURE_SOC_FTM_COUNT
FTM_Type *ftmBaseAddr = (FTM_Type*)mFtmBase[gStackTimerInstance_c];
FTM_Init(ftmBaseAddr, &mFtmConfig);
FTM_StopTimer(ftmBaseAddr);
ftmBaseAddr->MOD = 0xFFFF;
/* Configure channel to Software compare; output pin not used */
FTM_SetupOutputCompare(ftmBaseAddr, (ftm_chnl_t)gStackTimerChannel_c, kFTM_NoOutputSignal, 0x01);
/* Install ISR */
irqId = mFtmIrqId[gStackTimerInstance_c];
FTM_EnableInterrupts(ftmBaseAddr, kFTM_TimeOverflowInterruptEnable | (1 << gStackTimerChannel_c));
#else
TPM_Type *tpmBaseAddr = (TPM_Type*)mTpmBase[gStackTimerInstance_c];
TPM_Init(tpmBaseAddr, &mTpmConfig);
TPM_StopTimer(tpmBaseAddr);
/* Set the timer to be in free-running mode */
tpmBaseAddr->MOD = 0xFFFF;
/* Configure channel to Software compare; output pin not used */
TPM_SetupOutputCompare(tpmBaseAddr, (tpm_chnl_t)gStackTimerChannel_c, kTPM_NoOutputSignal, 0x01);
/* Install ISR */
irqId = mTpmIrqId[gStackTimerInstance_c];
TPM_EnableInterrupts(tpmBaseAddr, kTPM_TimeOverflowInterruptEnable | (1 << gStackTimerChannel_c));
#endif
/* Overwrite old ISR */
OSA_InstallIntHandler(irqId, cb);
/* set interrupt priority */
NVIC_SetPriority(irqId, gStackTimer_IsrPrio_c >> (8 - __NVIC_PRIO_BITS));
NVIC_ClearPendingIRQ(irqId);
NVIC_EnableIRQ(irqId);
}
/*
** ===================================================================
** Method : OSA_TimeInit (component fsl_os_abstraction)
**
** Description :
** This function initializes the timer used in BM OSA, the
** functions such as OSA_TimeDelay, OSA_TimeGetMsec, and the
** timeout are all based on this timer.
** This method is internal. It is used by Processor Expert only.
** ===================================================================
*/
void OSA_TimeInit(void)
{
uint64_t divider;
/* Disable timer and interrupt */
SysTick->CTRL = 0U;
/* A write of any value to current value register clears the field to 0, and also clears the SYST_CSR COUNTFLAG bit to 0. */
SysTick->VAL = 0U;
#if FSL_FEATURE_SYSTICK_HAS_EXT_REF
/* Set the clock source back to core freq */
CLOCK_SYS_SetSystickSrc(kClockSystickSrcCore);
#endif
/* Get SysTick counter input frequency and compute divider value */
divider = ((((uint64_t)CLOCK_SYS_GetSystickFreq() * OSA1_TIMER_PERIOD_US)) / 1000000U);
assert(divider != 0U);
/* Set divide input clock of systick timer */
SysTick->LOAD = (uint32_t)(divider - 1U);
/* Set interrupt priority and enable interrupt */
NVIC_SetPriority(SysTick_IRQn, 1U);
/* Set ISR for timer */
OSA_InstallIntHandler(SysTick_IRQn, SysTick_Handler);
/* Run timer and enable interrupt */
SysTick->CTRL = (SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk | SysTick_CTRL_TICKINT_Msk);
}
/*!
* \cond DOXYGEN_PRIVATE
* \brief Pre initialization - initializing requested modules for basic run of MQX.
*/
int _bsp_pre_init(void)
{
uint32_t result;
/******************************************************************************
Init gpio platform pins for LEDs, setup board clock source
******************************************************************************/
/* Macro PEX_MQX_KSDK used by PEX team */
#ifndef PEX_MQX_KSDK
hardware_init();
/* Configure PINS for default UART instance */
#if defined(BOARD_USE_LPSCI)
configure_lpsci_pins(BOARD_DEBUG_UART_INSTANCE);
#elif defined(BOARD_USE_LPUART)
configure_lpuart_pins(BOARD_DEBUG_UART_INSTANCE);
#elif defined(BOARD_USE_UART)
configure_uart_pins(BOARD_DEBUG_UART_INSTANCE);
#else
#error Default serial module is unsupported or undefined.
#endif
#endif
#if MQX_EXIT_ENABLED
extern void _bsp_exit_handler(void);
/* Set the bsp exit handler, called by _mqx_exit */
_mqx_set_exit_handler(_bsp_exit_handler);
#endif
result = _psp_int_init(BSP_FIRST_INTERRUPT_VECTOR_USED, BSP_LAST_INTERRUPT_VECTOR_USED);
if (result != MQX_OK) {
return result;
}
/******************************************************************************
Init MQX tick timer
******************************************************************************/
/* Initialize , set and run system hwtimer */
result = HWTIMER_SYS_Init(&systimer, &BSP_SYSTIMER_DEV, BSP_SYSTIMER_ID, NULL);
if (kStatus_OSA_Success != result) {
return MQX_INVALID_POINTER;
}
/* Set isr for timer*/
if (NULL == OSA_InstallIntHandler(BSP_SYSTIMER_INTERRUPT_VECTOR, HWTIMER_SYS_SystickIsrAction))
{
return kHwtimerRegisterHandlerError;
}
/* Set interrupt priority */
NVIC_SetPriority(BSP_SYSTIMER_INTERRUPT_VECTOR, MQX_TO_NVIC_PRIOR(BSP_SYSTIMER_ISR_PRIOR));
/* Disable interrupts to ensure ticks are not active until call of _sched_start_internal */
_int_disable();
result = HWTIMER_SYS_SetPeriod(&systimer, BSP_ALARM_PERIOD);
if (kStatus_OSA_Success != result) {
HWTIMER_SYS_Deinit(&systimer);
return MQX_INVALID_POINTER;
}
result = HWTIMER_SYS_RegisterCallback(&systimer,(hwtimer_callback_t)_time_notify_kernel, NULL);
if (kStatus_OSA_Success != result) {
HWTIMER_SYS_Deinit(&systimer);
return MQX_INVALID_POINTER;
}
result = HWTIMER_SYS_Start(&systimer);
if (kStatus_OSA_Success != result) {
HWTIMER_SYS_Deinit(&systimer);
return MQX_INVALID_POINTER;
}
/* Initialize the system ticks */
_time_set_ticks_per_sec(BSP_ALARM_FREQUENCY);
_time_set_hwticks_per_tick(HWTIMER_SYS_GetModulo(&systimer));
_time_set_hwtick_function(_bsp_get_hwticks, (void *)NULL);
return MQX_OK;
}
/************************* Configure for MQX************************************/
#if (defined FSL_RTOS_MQX)&&(MQX_COMMON_CONFIG == MQX_LITE_CONFIG)
#if MQX_STDIO
#error "MQX Lite configuration is designed to work with tool provided STD Library.\
Remove reference to MQX STD library from your build tool project options:\
IAR:\
Linker->Library->aditional_libraries - remove lib_mqx_stdlib.a path \
C/C++ Compiler->Preprocessor->Additional include directories: - remove mqx_stdlib \
\
KEIL: \
Linker->Misc controls - remove lib_mqx_stdlib.lib path \
C/C++->Include Paths - remove mqx_stdlib \
\
KDS: \
C/C++ Build\Settings->Cross ARM C Linker\Miscellaneous - remove lib_mqx_stdlib.a path\
C/C++ Build\Settings->Cross ARM C Compiler\Includes - remove mqx_stdlib (on 4th line)\
\
Atollic: \
C/C++ Build\Settings->C Linker/Libraries->Librarie search path - remove lib_mqx_stdlib \
C/C++ Build\Settings->C Compiler/Directories->Include Paths - remove mqx_stdlib \
CMAKE : \
Remove following lines from CMakeList.txt: \
INCLUDE_DIRECTORIES(${ProjDirPath}/../../../../../rtos/mqx/lib/twrk22f120m.armgcc/debug/mqx_stdlib) \
INCLUDE_DIRECTORIES(${ProjDirPath}/../../../../../rtos/mqx/lib/twrk22f120m.armgcc/release/mqx_stdlib) \
\
TARGET_LINK_LIBRARIES(lpm_rtos_mqx ${ProjDirPath}/../../../../../rtos/mqx/lib/twrk22f120m.armgcc/debug/mqx_stdlib/lib_mqx_stdlib.a) \
TARGET_LINK_LIBRARIES(lpm_rtos_mqx ${ProjDirPath}/../../../../../rtos/mqx/lib/twrk22f120m.armgcc/release/mqx_stdlib/lib_mqx_stdlib.a) \
."
#endif /* MQX_STDIO */
#elif (defined FSL_RTOS_MQX)&&(MQX_COMMON_CONFIG != MQX_LITE_CONFIG)
#define MAIN_TASK 8
void main_task(uint32_t param);
const TASK_TEMPLATE_STRUCT MQX_template_list[] =
{
{ MAIN_TASK, main_task, 0xC00, 20, "main_task", MQX_AUTO_START_TASK},
{ 0L, 0L, 0L, 0L, 0L, 0L }
};
#endif /* (FSL_RTOS_MQX)&&(MQX_COMMON_CONFIG != MQX_LITE_CONFIG) */
///////////////////////////////////////////////////////////////////////////////
// Code
///////////////////////////////////////////////////////////////////////////////
#if (defined FSL_RTOS_MQX) && (MQX_COMMON_CONFIG != MQX_LITE_CONFIG)
void main_task(uint32_t param)
#else /* (FSL_RTOS_MQX) && (MQX_COMMON_CONFIG != MQX_LITE_CONFIG) */
int main(void)
#endif /* (FSL_RTOS_MQX) && (MQX_COMMON_CONFIG != MQX_LITE_CONFIG) */
{
#if (defined FSL_RTOS_MQX)
// In deffault, MQX enables echo flag for stdin.
// For power manager demo, disable MQX flag to doesn't echo character.
ioctl( 0, IOCTL_NIO_TTY_SET_FLAGS, NIO_TTY_FLAGS_EOL_RN); // 0 - stdin
#endif
memset(&s_dbgState, 0, sizeof(s_dbgState));
hardware_init();
OSA_Init();
#if (!defined FSL_RTOS_MQX)
//init the uart module with base address and config structure
g_uartStatePtr[BOARD_DEBUG_UART_INSTANCE] = &s_dbgState;
/* Init the interrupt sync object. */
OSA_SemaCreate(&s_dbgState.txIrqSync, 0);
OSA_SemaCreate(&s_dbgState.rxIrqSync, 0);
NVIC_EnableIRQ(g_uartRxTxIrqId[BOARD_DEBUG_UART_INSTANCE]);
#endif
// Initializes GPIO driver for LEDs and buttons
#if (defined FSL_RTOS_BM)
GPIO_DRV_Init(switchPins, 0);
#else
GPIO_DRV_Init(switchPins, ledPins);
#endif
NVIC_SetPriority(PM_DBG_UART_IRQn, 6U);
NVIC_SetPriority(RTC_IRQn, 6U);
NVIC_SetPriority(LPTMR0_IRQn, 6U);
NVIC_SetPriority(ADC_IRQ_N, 6U);
NVIC_SetPriority(LLWU_IRQn, 6U);
#if (defined FSL_RTOS_MQX)
OSA_InstallIntHandler(PM_DBG_UART_IRQn, PM_MQX_DBG_UART_IRQ_HANDLER);
#endif
adc16Init(&adcUserConfig, &adcChnConfig, &adcCalibraitionParam);
// Low power manager task.
s_result = OSA_TaskCreate(task_lpm,
(uint8_t *)"lpm",
TASK_LPM_STACK_SIZE,
task_lpm_stack,
TASK_LPM_PRIO,
(task_param_t)0,
false,
&task_lpm_task_handler);
if (s_result != kStatus_OSA_Success)
{
PRINTF("Failed to create lpm task\r\n");
}
// These tasks will not start in BM.
#if (!defined FSL_RTOS_BM)
s_result = OSA_TaskCreate(task_led_rtos,
(uint8_t *)"led_rtos",
TASK_LED_RTOS_STACK_SIZE,
task_led_rtos_stack,
TASK_LED_RTOS_PRIO,
(task_param_t)0,
false,
&task_led_rtos_task_handler);
if (s_result != kStatus_OSA_Success)
{
PRINTF("Failed to create led_rtos task\r\n");
}
s_result = OSA_TaskCreate(task_led_clock,
(uint8_t *)"led_clock",
TASK_LED_CLOCK_STACK_SIZE,
task_led_clock_stack,
TASK_LED_CLOCK_PRIO,
(task_param_t)0,
false,
&task_led_clock_task_handler);
if (s_result != kStatus_OSA_Success)
{
PRINTF("Failed to create led_clock task\r\n");
}
#endif
OSA_Start();
for(;;) {} // Should not achieve here
}
/*!
* @cond DOXYGEN_PRIVATE
*
* @brief This function initializes caller allocated structure according to given
* numerical identifier of the timer.
*
* Called by hwtimer_init().
* Initializes the HWTIMER structure.
* Sets interrupt priority and registers ISR.
*
* @param hwtimer[in] Returns initialized hwtimer structure handle.
* @param pitId[in] Determines PIT module and pit channel.
* @param isrPrior[in] Interrupt priority for PIT
* @param data[in] Specific data. Not used in this timer.
*
* @return kHwtimerSuccess Success.
* @return kHwtimerInvalidInput When channel number does not exist in pit module.
* @return kHwtimerLockError When Locking failed.
* @return kHwtimerRegisterHandlerError When registration of the interrupt service routine failed.
*
* @see HWTIMER_SYS_PitDeinit
* @see HWTIMER_SYS_PitSetDiv
* @see HWTIMER_SYS_PitStart
* @see HWTIMER_SYS_PitStop
* @see HWTIMER_SYS_PitGetTime
* @see HWTIMER_SYS_PitIsr
* @see HWTIMER_SYS_PitIsrShared
*/
static _hwtimer_error_code_t HWTIMER_SYS_PitInit(hwtimer_t * hwtimer, uint32_t pitId, uint32_t isrPrior, void *data)
{
uint32_t pitChannel;
uint32_t baseAddr = g_pitBaseAddr[0];
if (FSL_FEATURE_PIT_TIMER_COUNT < pitId)
{
return kHwtimerInvalidInput;
}
assert(NULL != hwtimer);
/* We need to store pitId of timer in context struct */
hwtimer->llContext[0U] = pitId;
pitChannel = hwtimer->llContext[0U];
/* Un-gate pit clock */
CLOCK_SYS_EnablePitClock(0U);
/* Enable PIT module clock */
PIT_HAL_Enable(baseAddr);
/* Allows the timers to be stopped when the device enters the Debug mode. */
PIT_HAL_SetTimerRunInDebugCmd(baseAddr, false);
/* Disable timer and interrupt */
PIT_HAL_StopTimer(baseAddr, pitChannel);
PIT_HAL_SetIntCmd(baseAddr, pitChannel, false);
/* Clear any pending interrupt */
PIT_HAL_ClearIntFlag(baseAddr, pitChannel);
/* Create lock if does not exists*/
/* Enter critical section to avoid interrupt create locking */
OSA_EnterCritical(kCriticalDisableInt);
if (g_lock == NULL)
{
/* Initialize synchronization object */
if (kStatus_OSA_Success != OSA_MutexCreate(&g_lock_data))
{
return kHwtimerLockError;
}
g_lock = &g_lock_data;
}
OSA_ExitCritical(kCriticalDisableInt);
assert(g_lock == &g_lock_data);
/* Critical section. Access to global variable */
if (kStatus_OSA_Success != OSA_MutexLock(g_lock, OSA_WAIT_FOREVER))
{
return kHwtimerLockError;
}
/* Store hwtimer in global array */
g_hwtimersPit[pitChannel] = hwtimer;
if (kStatus_OSA_Success != OSA_MutexUnlock(g_lock))
{
return kHwtimerLockError;
}
/* Enable PIT interrupt.*/
if (kStatus_OSA_Success != OSA_InstallIntHandler(kpitIrqIds[pitChannel], HWTIMER_SYS_PitIsr))
{
return kHwtimerRegisterHandlerError;
}
PIT_HAL_SetIntCmd(baseAddr, pitChannel, true);
INT_SYS_EnableIRQ(kpitIrqIds[pitChannel]);
return kHwtimerSuccess;
}
static int nio_serial_init(void *init_data, void **dev_context)
{
osa_status_t status;
NIO_SERIAL_DEV_CONTEXT_STRUCT *serial_dev_context = (NIO_SERIAL_DEV_CONTEXT_STRUCT *)dev_context;
NIO_SERIAL_INIT_DATA_STRUCT *init = (NIO_SERIAL_INIT_DATA_STRUCT*)init_data;
#if PLATFORM_LPUART_ENABLED
assert(init->UART_INSTANCE < HW_LPUART_INSTANCE_COUNT);
lpuart_user_config_t uartConfig =
#else
assert(init->UART_INSTANCE < HW_UART_INSTANCE_COUNT);
uart_user_config_t uartConfig =
#endif
{
.baudRate = init->BAUDRATE,
.parityMode = init->PARITY_MODE,
.stopBitCount = init->STOPBIT_COUNT,
.bitCountPerChar = init->BITCOUNT_PERCHAR,
};
serial_dev_context = (NIO_SERIAL_DEV_CONTEXT_STRUCT*) OSA_MemAlloc(sizeof(NIO_SERIAL_DEV_CONTEXT_STRUCT));
/* SDK HAL init */
#if PLATFORM_LPUART_ENABLED
if ( kStatus_UART_Success != LPUART_DRV_Init(init->UART_INSTANCE, &serial_dev_context->uart_state, &uartConfig))
{
errno = ENXIO;
}
/* LPUART handler interrupt installation */
status = OSA_InstallIntHandler(g_lpuartRxTxIrqId[init->UART_INSTANCE], init->handler);
if (kStatus_OSA_Success != status)
{
errno = ENXIO;
}
NVIC_SetPriority(g_lpuartRxTxIrqId[init->UART_INSTANCE], init->RXTX_PRIOR);
NVIC_EnableIRQ(g_lpuartRxTxIrqId[init->UART_INSTANCE]);
#else
if ( kStatus_UART_Success != UART_DRV_Init(init->UART_INSTANCE, &serial_dev_context->uart_state, &uartConfig))
{
errno = ENXIO;
}
/* UART handler interrupt installation */
status = OSA_InstallIntHandler(g_uartRxTxIrqId[init->UART_INSTANCE], init->handler);
if (kStatus_OSA_Success != status)
{
errno = ENXIO;
}
NVIC_SetPriority(g_uartRxTxIrqId[init->UART_INSTANCE], init->RXTX_PRIOR);
NVIC_EnableIRQ(g_uartRxTxIrqId[init->UART_INSTANCE]);
#endif
serial_dev_context->instance = init->UART_INSTANCE;
*dev_context = (void*)serial_dev_context;
return 0;
}
static int nio_serial_deinit(void *dev_context)
{
NIO_SERIAL_DEV_CONTEXT_STRUCT *serial_dev_context = (NIO_SERIAL_DEV_CONTEXT_STRUCT *)dev_context;
#if PLATFORM_LPUART_ENABLED
LPUART_DRV_Deinit(serial_dev_context->instance);
#else
UART_DRV_Deinit(serial_dev_context->instance);
#endif
OSA_MemFree(dev_context);
return 0;
}
/*! *********************************************************************************
* \brief Initialize the RNG HW module
*
* \return Status of the RNG initialization sequence
*
********************************************************************************** */
uint8_t RNG_Init(void)
{
#if FSL_FEATURE_SOC_RNG_COUNT
const rnga_user_config_t config = {
.isIntMasked = 1,
.highAssuranceEnable = 0
};
RNGA_DRV_Init(0, &config);
if( kStatus_RNGA_Success != RNGA_DRV_GetRandomData(0, &mRandomNumber, sizeof(uint32_t)) )
{
return gRngInternalError_d;
}
#elif FSL_FEATURE_SOC_TRNG_COUNT
trng_user_config_t config;
TRNG_DRV_InitUserConfigDefault(&config);
config.frequencyCountLimit.minimum = 0x00000100;
config.frequencyCountLimit.maximum = 0x000F0000;
config.ringOscDiv = kTRNGRingOscDiv0;
config.entropyDelay = 1200;
OSA_InstallIntHandler(g_trngIrqId[0], TRNG_ISR);
if( kStatus_TRNG_Success != TRNG_DRV_Init(0, &config) )
{
return gRngInternalError_d;
}
if( kStatus_TRNG_Success != TRNG_DRV_GetRandomData(0, &mRandomNumber, sizeof(uint32_t)) )
{
return gRngInternalError_d;
}
#else
#if gRNG_UsePhyRngForInitialSeed_d
/* Use 802.15.4 PHY to generate the initial seed */
PhyGetRandomNo(&mRandomNumber);
#else
/* Use MCU unique Id for initial seed */
mRandomNumber = SIM_UIDL;
#endif
#endif
/* Init Successfull */
return gRngSuccess_d;
}
/*! *********************************************************************************
* \brief Read a random number from the HW RNG module.
* If the HW fails, the SW PRNG is used as backup.
*
* \param[out] pRandomNo - pointer to location where the value will be stored
*
* \return status of the RNG module
*
********************************************************************************** */
static uint8_t RNG_HwGetRandomNo(uint32_t* pRandomNo)
{
#if FSL_FEATURE_SOC_RNG_COUNT
if( kStatus_RNGA_Success == RNGA_DRV_GetRandomData(0, pRandomNo, sizeof(uint32_t)) )
{
return gRngSuccess_d;
}
#elif FSL_FEATURE_SOC_TRNG_COUNT
if( TRNG_HAL_GetEntropyValidCmd(g_trngBase[0]) &&
(kStatus_TRNG_Success == TRNG_DRV_GetRandomData(0, pRandomNo, sizeof(uint32_t))) )
{
return gRngSuccess_d;
}
#endif
mRandomNumber = (mRandomNumber * 6075) + 1283;
FLib_MemCpy(pRandomNo, &mRandomNumber, sizeof(uint32_t));
return gRngSuccess_d;
}
/*! *********************************************************************************
* \brief Generate a random number
*
* \param[out] pRandomNo - pointer to location where the value will be stored
*
********************************************************************************** */
void RNG_GetRandomNo(uint32_t* pRandomNo)
{
/* Check for NULL pointers */
if (NULL != pRandomNo)
{
(void)RNG_HwGetRandomNo(pRandomNo);
}
}
/*! *********************************************************************************
* \brief Initialize seed for the PRNG algorithm.
*
* \param[in] pSeed - pointer to a buffer containing 20 bytes (160 bits).
* Can be set using the RNG_GetRandomNo() function.
*
********************************************************************************** */
void RNG_SetPseudoRandomNoSeed(uint8_t* pSeed)
{
mPRNG_Requests = 1;
FLib_MemCpy( XKEY, pSeed, mPRNG_NoOfBytes_c );
}