Exemple #1
0
// --------------------- Opcodes 0x4a00+ ---------------------
// Emit a Tst opcode, 01001010 xxeeeeee
int OpTst(int op)
{
  int sea=0;
  int size=0,use=0;

  sea=op&0x003f;
  size=(op>>6)&3; if (size>=3) return 1;

  // See if we can do this opcode:
  if (EaCanWrite(sea)==0||EaAn(sea)) return 1;

  use=OpBase(op,size);
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler

  OpStart(op,sea); Cycles=4;

  EaCalc (0,0x003f,sea,size,earwt_shifted_up);
  EaRead (0,     0,sea,size,0x003f,earwt_shifted_up,1);

  OpGetFlagsNZ(0);
  ot("\n");

  OpEnd(sea);
  return 0;
}
Exemple #2
0
// --------------------- Opcodes 0x4880+ ---------------------
// Emit an Ext opcode, 01001000 1x000nnn
int OpExt(int op)
{
  int ea=0;
  int size=0,use=0;
  int shift=0;

  ea=op&0x0007;
  size=(op>>6)&1;
  shift=32-(8<<size);

  use=OpBase(op,size);
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler

  OpStart(op); Cycles=4;

  EaCalc (11,0x0007,ea,size+1,earwt_msb_dont_care);
  EaRead (11,     0,ea,size+1,0x0007,earwt_msb_dont_care);

  ot("  movs r0,r0,asl #%d\n",shift);
  OpGetFlagsNZ(0);
  ot("  mov r1,r0,asr #%d\n",shift);
  ot("\n");

  EaWrite(11,     1,ea,size+1,0x0007,earwt_msb_dont_care);

  OpEnd();
  return 0;
}
Exemple #3
0
// Asr/Lsr/Roxr/Ror etc EA - 11100ttd 11eeeeee 
int OpAsrEa(int op)
{
  int use=0,type=0,dir=0,ea=0,size=1;

  type=(op>>9)&3;
  dir =(op>>8)&1;
  ea  = op&0x3f;

  if (ea<0x10) return 1;
  // See if we can do this opcode:
  if (EaCanRead(ea,0)==0) return 1;
  if (EaCanWrite(ea)==0) return 1;

  use=OpBase(op,size);
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler

  OpStart(op,ea); Cycles=6; // EmitAsr() will add 2

  EaCalc (11,0x003f,ea,size,earwt_shifted_up);
  EaRead (11,     0,ea,size,0x003f,earwt_shifted_up);

  EmitAsr(op,type,dir,1,size,0);

  EaWrite(11,     0,ea,size,0x003f,earwt_shifted_up);

  OpEnd(ea);
  return 0;
}
Exemple #4
0
// --------------------- Opcodes 0x4880+ ---------------------
// Emit an Ext opcode, 01001000 1x000nnn
int OpExt(int op)
{
  int ea=0;
  int size=0,use=0;
  int shift=0;

  ea=op&0x0007;
  size=(op>>6)&1;
  shift=32-(8<<size);

  use=OpBase(op,size);
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler

  OpStart(op); Cycles=4;

  EaCalc (11,0x0007,ea,size+1,0,0);
  EaRead (11,     0,ea,size+1,0x0007,0,0);

  ot("  mov r0,r0,asl #%d\n",shift);
  ot("  adds r0,r0,#0 ;@ Defines NZ, clears CV\n");
  ot("  mrs r10,cpsr ;@ r10=flags\n");
  ot("  mov r1,r0,asr #%d\n",shift);
  ot("\n");

  EaWrite(11,     1,ea,size+1,0x0007,0,0);

  OpEnd();
  return 0;
}
Exemple #5
0
// --------------------- Opcodes 0x4a00+ ---------------------
// Emit a Tst opcode, 01001010 xxeeeeee
int OpTst(int op)
{
  int sea=0;
  int size=0,use=0;

  sea=op&0x003f;
  size=(op>>6)&3; if (size>=3) return 1;

  // See if we can do this opcode:
  if (EaCanWrite(sea)==0||EaAn(sea)) return 1;

  use=OpBase(op,size);
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler

  OpStart(op,sea); Cycles=4;

  EaCalc ( 0,0x003f,sea,size,1);
  EaRead ( 0,     0,sea,size,0x003f,1);

  ot("  adds r0,r0,#0 ;@ Defines NZ, clears CV\n");
  ot("  mrs r10,cpsr ;@ r10=flags\n");
  ot("\n");

  OpEnd(sea);
  return 0;
}
Exemple #6
0
static void 
OpStart(const char * const Operation)
{
    OpEnd();

    started_an_op = 1;

    fprintf(stderr, "%s() ... ", Operation);
    fflush(stderr);
}
Exemple #7
0
// 01001000 00eeeeee - nbcd <ea>
int OpNbcd(int op)
{
  int use=0;
  int ea=0;
  
  ea=op&0x3f;

  if(EaCanWrite(ea)==0||EaAn(ea)) return 1;

  use=OpBase(op,0);
  if(op!=use) { OpUse(op,use); return 0; } // Use existing handler

  OpStart(op,ea); Cycles=6;
  if(ea >= 8)  Cycles+=2;

  EaCalcReadNoSE(10,0,ea,0,0x003f);

  // this is rewrite of Musashi's code
  ot("  ldr r2,[r7,#0x4c]\n");
  ot("  bic r9,r9,#0xb0000000 ;@ clear all flags, except Z\n");
  ot("  mov r0,r0,asl #24\n");
  ot("  and r2,r2,#0x20000000\n");
  ot("  add r2,r0,r2,lsr #5 ;@ add X\n");
  ot("  rsb r11,r2,#0x9a000000 ;@ do arithmetic\n");

  ot("  cmp r11,#0x9a000000\n");
  ot("  beq finish%.4x\n",op);
  ot("\n");

  ot("  mvn r3,r11,lsr #31 ;@ Undefined V behavior\n",op);
  ot("  and r2,r11,#0x0f000000\n");
  ot("  cmp r2,#0x0a000000\n");
  ot("  andeq r11,r11,#0xf0000000\n");
  ot("  addeq r11,r11,#0x10000000\n");
  ot("  and r3,r3,r11,lsr #31 ;@ Undefined V behavior part II\n",op);
  ot("  movs r1,r11,asr #24\n");
  ot("  bicne r9,r9,#0x40000000 ;@ Z\n");
  ot("  orr r9,r9,r3,lsl #28 ;@ save V\n",op);
  ot("  orr r9,r9,#0x20000000 ;@ C\n");
  ot("\n");

  EaWrite(10,     1, ea,0,0x3f,0,0);

  ot("finish%.4x%s\n",op,ms?"":":");
  ot("  tst r11,r11\n");
  ot("  orrmi r9,r9,#0x80000000 ;@ N\n");
  ot("  str r9,[r7,#0x4c] ;@ Save X\n");
  ot("\n");

  OpEnd(ea);

  return 0;
}
Exemple #8
0
// --------------------- Opcodes 0x50c0+ ---------------------
// Emit a Set cc opcode, 0101cccc 11eeeeee
int OpSet(int op)
{
  int cc=0,ea=0;
  int size=0,use=0,changed_cycles=0;
  const char *cond;

  cc=(op>>8)&15;
  ea=op&0x003f;

  if ((ea&0x38)==0x08) return 1; // dbra, not scc
  
  // See if we can do this opcode:
  if (EaCanWrite(ea)==0) return 1;

  use=OpBase(op,size);
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler

  changed_cycles=ea<8 && cc>=2;
  OpStart(op,ea,0,changed_cycles); Cycles=8;
  if (ea<8) Cycles=4;

  switch (cc)
  {
    case 0x00: // T
      ot("  mvn r1,#0\n");
      if (ea<8) Cycles+=2;
      break;
    case 0x01: // F
      ot("  mov r1,#0\n");
      break;
    default:
      ot("  mov r1,#0\n");
      cond=TestCond(cc);
      ot("  mvn%s r1,#0\n",cond);
      if (ea<8) ot("  sub%s r5,r5,#2 ;@ Extra cycles\n",cond);
      break;
  }

  ot("\n");

  eawrite_check_addrerr=1;
  EaCalc (0,0x003f, ea,size,earwt_msb_dont_care);
  EaWrite(0,     1, ea,size,0x003f,earwt_msb_dont_care);

  opend_op_changes_cycles=changed_cycles;
  OpEnd(ea,0);
  return 0;
}
Exemple #9
0
int OpTas(int op, int gen_special)
{
  int ea=0;
  int use=0;

  ea=op&0x003f;

  // See if we can do this opcode:
  if (EaCanWrite(ea)==0 || EaAn(ea)) return 1;

  use=OpBase(op,0);
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler

  if (!gen_special) OpStart(op,ea);
  else
    ot("Op%.4x_%s\n", op, ms?"":":");

  Cycles=4;
  if(ea>=8) Cycles+=10;

  EaCalc (11,0x003f,ea,0,1);
  EaRead (11,     1,ea,0,0x003f,1);

  ot("  adds r1,r1,#0 ;@ Defines NZ, clears CV\n");
  OpGetFlags(0,0);
  ot("\n");

#if CYCLONE_FOR_GENESIS
  // the original Sega hardware ignores write-back phase (to memory only)
  if (ea < 0x10 || gen_special) {
#endif
    ot("  orr r1,r1,#0x80000000 ;@ set bit7\n");

    EaWrite(11,     1,ea,0,0x003f,1);
#if CYCLONE_FOR_GENESIS
  }
#endif

  OpEnd(ea);

#if (CYCLONE_FOR_GENESIS == 2)
  if (!gen_special && ea >= 0x10) {
    OpTas(op, 1);
  }
#endif

  return 0;
}
Exemple #10
0
// Emit a Asr/Lsr/Roxr/Ror opcode - 1110cccd xxuttnnn
// (ccc=count, d=direction(r,l) xx=size extension, u=use reg for count, tt=type, nnn=register Dn)
int OpAsr(int op)
{
  int ea=0,use=0;
  int count=0,dir=0;
  int size=0,usereg=0,type=0;

  count =(op>>9)&7;
  dir   =(op>>8)&1;
  size  =(op>>6)&3;
  if (size>=3) return 1; // use OpAsrEa()
  usereg=(op>>5)&1;
  type  =(op>>3)&3;

  if (usereg==0) count=((count-1)&7)+1; // because ccc=000 means 8

  // Use the same opcode for target registers:
  use=op&~0x0007;

  // As long as count is not 8, use the same opcode for all shift counts:
  if (usereg==0 && count!=8 && !(count==1&&type==2)) { use|=0x0e00; count=-1; }
  if (usereg) { use&=~0x0e00; count=-1; } // Use same opcode for all Dn

  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler

  OpStart(op,ea,0,count<0); Cycles=size<2?6:8;

  EaCalc(11,0x0007, ea,size,earwt_shifted_up);
  EaRead(11,     0, ea,size,0x0007,earwt_shifted_up);

  EmitAsr(op,type,dir,count, size,usereg);

  EaWrite(11,    0, ea,size,0x0007,earwt_shifted_up);

  opend_op_changes_cycles = (count<0);
  OpEnd(ea,0);

  return 0;
}
Exemple #11
0
// --------------------- Opcodes 0x4840+ ---------------------
// Swap, 01001000 01000nnn swap Dn
int OpSwap(int op)
{
  int ea=0,use=0;

  ea=op&7;
  use=op&~0x0007; // Use same opcode for all An

  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler

  OpStart(op); Cycles=4;

  EaCalc (11,0x0007,ea,2,earwt_shifted_up);
  EaRead (11,     0,ea,2,0x0007,earwt_shifted_up);

  ot("  movs r1,r0,ror #16\n");
  OpGetFlagsNZ(1);

  EaWrite(11,     1,8,2,0x0007,earwt_shifted_up);

  OpEnd();

  return 0;
}
Exemple #12
0
// --------------------- Opcodes 0x4840+ ---------------------
// Swap, 01001000 01000nnn swap Dn
int OpSwap(int op)
{
  int ea=0,use=0;

  ea=op&7;
  use=op&~0x0007; // Use same opcode for all An

  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler

  OpStart(op); Cycles=4;

  EaCalc (11,0x0007,ea,2,1);
  EaRead (11,     0,ea,2,0x0007,1);

  ot("  mov r1,r0,ror #16\n");
  ot("  adds r1,r1,#0 ;@ Defines NZ, clears CV\n");
  OpGetFlags(0,0);

  EaWrite(11,     1,8,2,0x0007,1);

  OpEnd();

  return 0;
}
Exemple #13
0
// --------------------- Opcodes 0x0100+ ---------------------
// Emit a Btst (Register) opcode 0000nnn1 ttaaaaaa
int OpBtstReg(int op)
{
  int use=0;
  int type=0,sea=0,tea=0;
  int size=0;

  type=(op>>6)&3; // Btst/Bchg/Bclr/Bset
  // Get source and target EA
  sea=(op>>9)&7;
  tea=op&0x003f;
  if (tea<0x10) size=2; // For registers, 32-bits

  if ((tea&0x38)==0x08) return 1; // movep

  // See if we can do this opcode:
  if (EaCanRead(tea,0)==0) return 1;
  if (type>0)
  {
    if (EaCanWrite(tea)==0) return 1;
  }

  use=OpBase(op,size);
  use&=~0x0e00; // Use same handler for all registers
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler

  OpStart(op,tea);

  if(type==1||type==3) {
    Cycles=8;
  } else {
    Cycles=type?8:4;
    if(size>=2) Cycles+=2;
  }

  EaCalcRead(-1,11,sea,0,0x0e00,earwt_msb_dont_care);

  EaCalcRead((type>0)?8:-1,0,tea,size,0x003f,earwt_msb_dont_care);

  if (tea>=0x10)
       ot("  and r11,r11,#7  ;@ mem - do mod 8\n");  // size always 0
  else ot("  and r11,r11,#31 ;@ reg - do mod 32\n"); // size always 2
  ot("\n");

  ot("  mov r1,#1\n");
  ot("  tst r0,r1,lsl r11 ;@ Do arithmetic\n");
  ot("  bicne r10,r10,#0x40000000\n");
  ot("  orreq r10,r10,#0x40000000 ;@ Get Z flag\n");
  ot("\n");

  if (type>0)
  {
    if (type==1) ot("  eor r1,r0,r1,lsl r11 ;@ Toggle bit\n");
    if (type==2) ot("  bic r1,r0,r1,lsl r11 ;@ Clear bit\n");
    if (type==3) ot("  orr r1,r0,r1,lsl r11 ;@ Set bit\n");
    ot("\n");
    EaWrite(8,1,tea,size,0x003f,earwt_msb_dont_care);
  }
  OpEnd(tea);

  return 0;
}
Exemple #14
0
static void PrintOpcodes()
{
  int op=0;

  printf("Creating Opcodes: [");

  ot(";@ ---------------------------- Opcodes ---------------------------\n");

  // Emit null opcode:
  ot("Op____%s ;@ Called if an opcode is not recognised\n", ms?"":":");
#if EMULATE_ADDRESS_ERRORS_JUMP || EMULATE_ADDRESS_ERRORS_IO
  ot("  ldr r1,[r7,#0x58]\n");
  ot("  sub r4,r4,#2\n");
  ot("  orr r1,r1,#4 ;@ set activity bit: 'not processing instruction'\n");
  ot("  str r1,[r7,#0x58]\n");
#else
  ot("  sub r4,r4,#2\n");
#endif
#if USE_UNRECOGNIZED_CALLBACK
  ot("  str r4,[r7,#0x40] ;@ Save PC\n");
  ot("  mov r1,r9,lsr #28\n");
  ot("  strb r1,[r7,#0x46] ;@ Save Flags (NZCV)\n");
  ot("  str r5,[r7,#0x5c] ;@ Save Cycles\n");
  ot("  ldr r11,[r7,#0x94] ;@ UnrecognizedCallback\n");
  ot("  tst r11,r11\n");
  ot("  movne lr,pc\n");
  ot("  movne pc,r11 ;@ call UnrecognizedCallback if it is defined\n");
  ot("  ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");
  ot("  ldr r5,[r7,#0x5c] ;@ Load Cycles\n");
  ot("  ldr r4,[r7,#0x40] ;@ Load PC\n");
  ot("  mov r9,r9,lsl #28\n");
  ot("  tst r0,r0\n");
  ot("  moveq r0,#4\n");
  ot("  bleq Exception\n");
#else
  ot("  mov r0,#4\n");
  ot("  bl Exception\n");
#endif
  ot("\n");
  Cycles=34;
  OpEnd();

  // Unrecognised a-line and f-line opcodes throw an exception:
  ot("Op__al%s ;@ Unrecognised a-line opcode\n", ms?"":":");
  ot("  sub r4,r4,#2\n");
#if USE_AFLINE_CALLBACK
  ot("  str r4,[r7,#0x40] ;@ Save PC\n");
  ot("  mov r1,r9,lsr #28\n");
  ot("  strb r1,[r7,#0x46] ;@ Save Flags (NZCV)\n");
  ot("  str r5,[r7,#0x5c] ;@ Save Cycles\n");
  ot("  ldr r11,[r7,#0x94] ;@ UnrecognizedCallback\n");
  ot("  tst r11,r11\n");
  ot("  movne lr,pc\n");
  ot("  movne pc,r11 ;@ call UnrecognizedCallback if it is defined\n");
  ot("  ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");
  ot("  ldr r5,[r7,#0x5c] ;@ Load Cycles\n");
  ot("  ldr r4,[r7,#0x40] ;@ Load PC\n");
  ot("  mov r9,r9,lsl #28\n");
  ot("  tst r0,r0\n");
  ot("  moveq r0,#0x0a\n");
  ot("  bleq Exception\n");
#else
  ot("  mov r0,#0x0a\n");
  ot("  bl Exception\n");
#endif
  ot("\n");
  Cycles=4;
  OpEnd();

  ot("Op__fl%s ;@ Unrecognised f-line opcode\n", ms?"":":");
  ot("  sub r4,r4,#2\n");
#if USE_AFLINE_CALLBACK
  ot("  str r4,[r7,#0x40] ;@ Save PC\n");
  ot("  mov r1,r9,lsr #28\n");
  ot("  strb r1,[r7,#0x46] ;@ Save Flags (NZCV)\n");
  ot("  str r5,[r7,#0x5c] ;@ Save Cycles\n");
  ot("  ldr r11,[r7,#0x94] ;@ UnrecognizedCallback\n");
  ot("  tst r11,r11\n");
  ot("  movne lr,pc\n");
  ot("  movne pc,r11 ;@ call UnrecognizedCallback if it is defined\n");
  ot("  ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");
  ot("  ldr r5,[r7,#0x5c] ;@ Load Cycles\n");
  ot("  ldr r4,[r7,#0x40] ;@ Load PC\n");
  ot("  mov r9,r9,lsl #28\n");
  ot("  tst r0,r0\n");
  ot("  moveq r0,#0x0b\n");
  ot("  bleq Exception\n");
#else
  ot("  mov r0,#0x0b\n");
  ot("  bl Exception\n");
#endif
  ot("\n");
  Cycles=4;
  OpEnd();


  for (op=0;op<0x10000;op++)
  {
    if ((op&0xfff)==0) { printf("%x",op>>12); fflush(stdout); } // Update progress

    OpAny(op);
  }
Exemple #15
0
// --------------------- Opcodes 0x8000+ ---------------------
// 1t0tnnnd xxeeeeee (tt=type:or/sub/and/add xx=size, eeeeee=EA)
int OpArithReg(int op)
{
  int use=0;
  int type=0,size=0,dir=0,rea=0,ea=0;
  char *asl="";
  char *strop=0;

  type=(op>>12)&5;
  rea =(op>> 9)&7;
  dir =(op>> 8)&1; // er,re
  size=(op>> 6)&3; if (size>=3) return 1;
  ea  = op&0x3f;

  if (dir && ea<0x10) return 1; // addx/subx opcode

  // See if we can do this opcode:
  if (dir==0 && EaCanRead (ea,size)==0) return 1;
  if (dir    && EaCanWrite(ea)==0)      return 1;
  if ((size==0||!(type&1))&&EaAn(ea))   return 1;

  use=OpBase(op,size);
  use&=~0x0e00; // Use same opcode for Dn
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler

  OpStart(op,ea); Cycles=4;

  EaCalcReadNoSE(dir?10:-1,0,ea,size,0x003f);

  EaCalcReadNoSE(dir?-1:10,1,rea,size,0x0e00);

  ot(";@ Do arithmetic:\n");
  if (type==0) strop = "orr";
  if (type==1) strop = (char *) (dir ? "subs" : "rsbs");
  if (type==4) strop = "and";
  if (type==5) strop = "adds";

  if (size==0) asl=",asl #24";
  if (size==1) asl=",asl #16";

  if (size<2) ot("  mov r0,r0%s\n",asl);
  ot("  %s r1,r0,r1%s\n",strop,asl);

  if ((type&1)==0) ot("  adds r1,r1,#0 ;@ Defines NZ, clears CV\n");

  OpGetFlags(type==1,type&1); // 1==subtract
  ot("\n");

  ot(";@ Save result:\n");
  if (size<2) ot("  mov r1,r1,asr #%d\n",size?16:24);
  if (dir) EaWrite(10, 1, ea,size,0x003f,0,0);
  else     EaWrite(10, 1,rea,size,0x0e00,0,0);

  if(rea==ea) {
    if(ea<8) Cycles=(size>=2)?8:4; else Cycles+=(size>=2)?26:14;
  } else if(dir) {
    Cycles+=4;
    if(size>=2) Cycles+=4;
  } else {
    if(size>=2) {
      Cycles+=2;
      if(ea<0x10||ea==0x3c) Cycles+=2;
    }
  }

  OpEnd(ea);

  return 0;
}
Exemple #16
0
// --------------------- Opcodes 0x50c0+ ---------------------
// Emit a Set cc opcode, 0101cccc 11eeeeee
int OpSet(int op)
{
  int cc=0,ea=0;
  int size=0,use=0,changed_cycles=0;
  static const char * const cond[16]=
  {
    "al","", "hi","ls","cc","cs","ne","eq",
    "vc","vs","pl","mi","ge","lt","gt","le"
  };

  cc=(op>>8)&15;
  ea=op&0x003f;

  if ((ea&0x38)==0x08) return 1; // dbra, not scc
  
  // See if we can do this opcode:
  if (EaCanWrite(ea)==0) return 1;

  use=OpBase(op,size);
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler

  changed_cycles=ea<8 && cc>=2;
  OpStart(op,ea,0,changed_cycles); Cycles=8;
  if (ea<8) Cycles=4;

  if (cc)
    ot("  mov r1,#0\n");

  switch (cc)
  {
    case 0: // T
      ot("  mvn r1,#0\n");
      if (ea<8) Cycles+=2;
      break;
    case 1: // F
      break;
    case 2: // hi
      ot("  tst r10,#0x60000000 ;@ hi: !C && !Z\n");
      ot("  mvneq r1,r1\n");
      if (ea<8) ot("  subeq r5,r5,#2 ;@ Extra cycles\n");
      break;
    case 3: // ls
      ot("  tst r10,#0x60000000 ;@ ls: C || Z\n");
      ot("  mvnne r1,r1\n");
      if (ea<8) ot("  subne r5,r5,#2 ;@ Extra cycles\n");
      break;
    default:
      ot(";@ Is the condition true?\n");
      ot("  msr cpsr_flg,r10 ;@ ARM flags = 68000 flags\n");
      ot("  mvn%s r1,r1\n",cond[cc]);
      if (ea<8) ot("  sub%s r5,r5,#2 ;@ Extra cycles\n",cond[cc]);
      break;
  }

  ot("\n");

  eawrite_check_addrerr=1;
  EaCalc (0,0x003f, ea,size,0,0);
  EaWrite(0,     1, ea,size,0x003f,0,0);

  opend_op_changes_cycles=changed_cycles;
  OpEnd(ea,0);
  return 0;
}
Exemple #17
0
// --------------------- Opcodes 0x8100+ ---------------------
// 1t00ddd1 0000asss - sbcd/abcd Ds,Dd or -(As),-(Ad)
int OpAbcd(int op)
{
  int use=0;
  int type=0,sea=0,mem=0,dea=0;
  
  type=(op>>14)&1; // sbcd/abcd
  dea =(op>> 9)&7;
  mem =(op>> 3)&1;
  sea = op     &7;

  if (mem) { sea|=0x20; dea|=0x20; }

  use=op&~0x0e07; // Use same opcode for all registers..
  if (sea==0x27) use|=0x0007; // ___x.b -(a7)
  if (dea==0x27) use|=0x0e00; // ___x.b -(a7)
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler

  OpStart(op,sea,dea); Cycles=6;

  if (mem)
  {
    ot(";@ Get src/dest EA vals\n");
    EaCalc (0,0x000f, sea,0,1);
    EaRead (0,    10, sea,0,0x000f,1);
    EaCalcReadNoSE(11,0,dea,0,0x0e00);
  }
  else
  {
    ot(";@ Get src/dest reg vals\n");
    EaCalcReadNoSE(-1,10,sea,0,0x0007);
    EaCalcReadNoSE(11,0,dea,0,0x0e00);
    ot("  mov r10,r10,asl #24\n");
  }
  ot("  mov r1,r0,asl #24\n\n");

  ot("  bic r9,r9,#0xb1000000 ;@ clear all flags except old Z\n");

  if (type)
  {
    ot("  ldr r0,[r7,#0x4c] ;@ Get X bit\n");
    ot("  mov r3,#0x00f00000\n");
    ot("  and r2,r3,r1,lsr #4\n");
    ot("  tst r0,#0x20000000\n");
    ot("  and r0,r3,r10,lsr #4\n");
    ot("  add r0,r0,r2\n");
    ot("  addne r0,r0,#0x00100000\n");
//    ot("  tst r0,#0x00800000\n");
//    ot("  orreq r9,r9,#0x01000000 ;@ Undefined V behavior\n");
    ot("  cmp r0,#0x00900000\n");
    ot("  addhi r0,r0,#0x00600000 ;@ Decimal adjust units\n");

    ot("  mov r2,r1,lsr #28\n");
    ot("  add r0,r0,r2,lsl #24\n");
    ot("  mov r2,r10,lsr #28\n");
    ot("  add r0,r0,r2,lsl #24\n");
    ot("  cmp r0,#0x09900000\n");
    ot("  orrhi r9,r9,#0x20000000 ;@ C\n");
    ot("  subhi r0,r0,#0x0a000000\n");
//    ot("  and r3,r9,r0,lsr #3 ;@ Undefined V behavior part II\n");
//    ot("  orr r9,r9,r3,lsl #4 ;@ V\n");
    ot("  movs r0,r0,lsl #4\n");
    ot("  orrmi r9,r9,#0x90000000 ;@ Undefined N+V behavior\n"); // this is what Musashi really does
    ot("  bicne r9,r9,#0x40000000 ;@ Z flag\n");
  }
  else
  {
    ot("  ldr r0,[r7,#0x4c] ;@ Get X bit\n");
    ot("  mov r3,#0x00f00000\n");
    ot("  and r2,r3,r10,lsr #4\n");
    ot("  tst r0,#0x20000000\n");
    ot("  and r0,r3,r1,lsr #4\n");
    ot("  sub r0,r0,r2\n");
    ot("  subne r0,r0,#0x00100000\n");
//    ot("  tst r0,#0x00800000\n");
//    ot("  orreq r9,r9,#0x01000000 ;@ Undefined V behavior\n");
    ot("  cmp r0,#0x00900000\n");
    ot("  subhi r0,r0,#0x00600000 ;@ Decimal adjust units\n");

    ot("  mov r2,r1,lsr #28\n");
    ot("  add r0,r0,r2,lsl #24\n");
    ot("  mov r2,r10,lsr #28\n");
    ot("  sub r0,r0,r2,lsl #24\n");
    ot("  cmp r0,#0x09900000\n");
    ot("  orrhi r9,r9,#0xa0000000 ;@ N and C\n");
    ot("  addhi r0,r0,#0x0a000000\n");
//    ot("  and r3,r9,r0,lsr #3 ;@ Undefined V behavior part II\n");
//    ot("  orr r9,r9,r3,lsl #4 ;@ V\n");
    ot("  movs r0,r0,lsl #4\n");
//    ot("  orrmi r9,r9,#0x80000000 ;@ Undefined N behavior\n");
    ot("  bicne r9,r9,#0x40000000 ;@ Z flag\n");
  }

  ot("  str r9,[r7,#0x4c] ;@ Save X bit\n");
  ot("\n");

  EaWrite(11,     0, dea,0,0x0e00,1);
  OpEnd(sea,dea);

  return 0;
}
Exemple #18
0
// --------------------- Opcodes 0x80c0+ ---------------------
int OpMul(int op)
{
  // Div/Mul: 1m00nnns 11eeeeee (m=Mul, nnn=Register Dn, s=signed, eeeeee=EA)
  int type=0,rea=0,sign=0,ea=0;
  int use=0;

  type=(op>>14)&1; // div/mul
  rea =(op>> 9)&7;
  sign=(op>> 8)&1;
  ea  = op&0x3f;

  // See if we can do this opcode:
  if (EaCanRead(ea,1)==0||EaAn(ea)) return 1;

  use=OpBase(op,1);
  use&=~0x0e00; // Use same for all registers
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler

  OpStart(op,ea);
  if(type) Cycles=54;
  else     Cycles=sign?158:140;

  EaCalcReadNoSE(-1,0,ea,1,0x003f);

  EaCalc(10,0x0e00,rea, 2);
  EaRead(10,     2,rea, 2,0x0e00);

  ot("  movs r1,r0,asl #16\n");

  if (type==0) // div
  {
    // the manual says C is always cleared, but neither Musashi nor FAME do that
    //ot("  bic r9,r9,#0x20000000 ;@ always clear C\n");
    ot("  beq divzero%.4x ;@ division by zero\n",op);
    ot("\n");
    
    if (sign)
    {
      ot("  mov r11,#0 ;@ r11 = 1 or 2 if the result is negative\n");
      ot("  tst r2,r2\n");
      ot("  orrmi r11,r11,#2\n");
      ot("  rsbmi r2,r2,#0 ;@ Make r2 positive\n");
      ot("\n");
      ot("  movs r0,r1,asr #16\n");
      ot("  orrmi r11,r11,#1\n");
      ot("  rsbmi r0,r0,#0 ;@ Make r0 positive\n");
      ot("\n");
      ot(";@ detect the nasty 0x80000000 / -1 situation\n");
      ot("  mov r3,r2,asr #31\n");
      ot("  eors r3,r3,r1,asr #16\n");
      ot("  beq wrendofop%.4x\n",op);
    }
    else
    {
      ot("  mov r0,r1,lsr #16 ;@ use only 16 bits of divisor\n");
    }

    ot("\n");
    ot(";@ Divide r2 by r0\n");
    ot("  mov r3,#0\n");
    ot("  mov r1,r0\n");
    ot("\n");
    ot(";@ Shift up divisor till it's just less than numerator\n");
    ot("Shift%.4x%s\n",op,ms?"":":");
    ot("  cmp r1,r2,lsr #1\n");
    ot("  movls r1,r1,lsl #1\n");
    ot("  bcc Shift%.4x\n",op);
    ot("\n");

    ot("Divide%.4x%s\n",op,ms?"":":");
    ot("  cmp r2,r1\n");
    ot("  adc r3,r3,r3 ;@ Double r3 and add 1 if carry set\n");
    ot("  subcs r2,r2,r1\n");
    ot("  teq r1,r0\n");
    ot("  movne r1,r1,lsr #1\n");
    ot("  bne Divide%.4x\n",op);
    ot("\n");
    ot(";@r3==quotient,r2==remainder\n");

    if (sign)
    {
      // sign correction
      ot("  and r1,r11,#1\n");
      ot("  teq r1,r11,lsr #1\n");
      ot("  rsbne r3,r3,#0 ;@ negate if quotient is negative\n");
      ot("  tst r11,#2\n");
      ot("  rsbne r2,r2,#0 ;@ negate the remainder if divident was negative\n");
      ot("\n");

      // signed overflow check
      ot("  mov r1,r3,asl #16\n");
      ot("  cmp r3,r1,asr #16 ;@ signed overflow?\n");
      ot("  orrne r9,r9,#0x10000000 ;@ set overflow flag\n");
      ot("  bne endofop%.4x ;@ overflow!\n",op);
      ot("\n");
      ot("wrendofop%.4x%s\n",op,ms?"":":");
    }
    else
    {
      // overflow check
      ot("  movs r1,r3,lsr #16 ;@ check for overflow condition\n");
      ot("  orrne r9,r9,#0x10000000 ;@ set overflow flag\n");
      ot("  bne endofop%.4x ;@ overflow!\n",op);
      ot("\n");
    }

    ot("  mov r1,r3,lsl #16 ;@ Clip to 16-bits\n");
    ot("  adds r1,r1,#0 ;@ Defines NZ, clears CV\n");
    OpGetFlags(0,0);

    ot("  mov r1,r1,lsr #16\n");
    ot("  orr r1,r1,r2,lsl #16 ;@ Insert remainder\n");
  }

  if (type==1)
  {
    ot(";@ Get 16-bit signs right:\n");
    ot("  mov r0,r1,%s #16\n",sign?"asr":"lsr");
    ot("  mov r2,r2,lsl #16\n");
    ot("  mov r2,r2,%s #16\n",sign?"asr":"lsr");
    ot("\n");

    ot("  mul r1,r2,r0\n");
    ot("  adds r1,r1,#0 ;@ Defines NZ, clears CV\n");
    OpGetFlags(0,0);
  }
  ot("\n");

  EaWrite(10,    1,rea, 2,0x0e00,1);

  if (type==0) ot("endofop%.4x%s\n",op,ms?"":":");
  OpEnd(ea);

  if (type==0) // div
  {
    ot("divzero%.4x%s\n",op,ms?"":":");
    ot("  mov r0,#5 ;@ Divide by zero\n");
    ot("  bl Exception\n");
    Cycles+=38;
    OpEnd(ea);
    ot("\n");
  }

  return 0;
}
Exemple #19
0
// --------------------- Opcodes 0x0000+ ---------------------
// Emit an Ori/And/Sub/Add/Eor/Cmp Immediate opcode, 0000ttt0 ssaaaaaa
int OpArith(int op)
{
  int type=0,size=0;
  int sea=0,tea=0;
  int use=0;
  char *shiftstr="";

  // Get source and target EA
  type=(op>>9)&7; if (type==4 || type>=7) return 1;
  size=(op>>6)&3; if (size>=3) return 1;
  sea=   0x003c;
  tea=op&0x003f;

  // See if we can do this opcode:
  if (EaCanRead(tea,size)==0) return 1;
  if (EaCanWrite(tea)==0 || EaAn(tea)) return 1;

  use=OpBase(op,size);
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler

  OpStart(op, sea, tea); Cycles=4;

  // imm must be read first
  EaCalcReadNoSE(-1,10,sea,size,0);
  EaCalcReadNoSE((type!=6)?11:-1,0,tea,size,0x003f);

  if (size<2) shiftstr=(char *)(size?",asl #16":",asl #24");
  if (size<2) ot("  mov r10,r10,asl #%i\n",size?16:24);

  ot(";@ Do arithmetic:\n");

  if (type==0) ot("  orr r1,r10,r0%s\n",shiftstr);
  if (type==1) ot("  and r1,r10,r0%s\n",shiftstr);
  if (type==2||type==6)
               ot("  rsbs r1,r10,r0%s ;@ Defines NZCV\n",shiftstr);
  if (type==3) ot("  adds r1,r10,r0%s ;@ Defines NZCV\n",shiftstr);
  if (type==5) ot("  eor r1,r10,r0%s\n",shiftstr);

  if (type<2 || type==5) ot("  adds r1,r1,#0 ;@ Defines NZ, clears CV\n"); // 0,1,5

  if (type< 2) OpGetFlags(0,0); // Ori/And
  if (type==2) OpGetFlags(1,1); // Sub: Subtract/X-bit
  if (type==3) OpGetFlags(0,1); // Add: X-bit
  if (type==5) OpGetFlags(0,0); // Eor
  if (type==6) OpGetFlags(1,0); // Cmp: Subtract
  ot("\n");

  if (type!=6)
  {
    EaWrite(11, 1, tea,size,0x003f,1);
  }

  // Correct cycles:
  if (type==6)
  {
    if (size>=2 && tea<0x10) Cycles+=2;
  }
  else
  {
    if (size>=2) Cycles+=4;
    if (tea>=8)  Cycles+=4;
    if (type==1 && size>=2 && tea<8) Cycles-=2;
  }

  OpEnd(sea,tea);

  return 0;
}
Exemple #20
0
// --------------------- Opcodes 0x5000+ ---------------------
int OpAddq(int op)
{
  // 0101nnnt xxeeeeee (nnn=#8,1-7 t=addq/subq xx=size, eeeeee=EA)
  int num=0,type=0,size=0,ea=0;
  int use=0;
  char count[16]="";
  int shift=0;

  num =(op>>9)&7; if (num==0) num=8;
  type=(op>>8)&1;
  size=(op>>6)&3; if (size>=3) return 1;
  ea  = op&0x3f;

  // See if we can do this opcode:
  if (EaCanRead (ea,size)==0) return 1;
  if (EaCanWrite(ea)     ==0) return 1;
  if (size == 0 && EaAn(ea) ) return 1;

  use=OpBase(op,size,1);

  if (num!=8) use|=0x0e00; // If num is not 8, use same handler
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler

  OpStart(op,ea);
  Cycles=ea<8?4:8;
  if(type==0&&size==1) Cycles=ea<0x10?4:8;
  if(size>=2) Cycles=ea<0x10?8:12;

  if (size>0 && (ea&0x38)==0x08) size=2; // addq.w #n,An is also 32-bit

  EaCalcReadNoSE(10,0,ea,size,0x003f);

  shift=32-(8<<size);

  if (num!=8)
  {
    int lsr=9-shift;

    ot("  and r2,r8,#0x0e00 ;@ Get quick value\n");

    if (lsr>=0) sprintf(count,"r2,lsr #%d",  lsr);
    else        sprintf(count,"r2,lsl #%d", -lsr);

    ot("\n");
  }
  else
  {
    sprintf(count,"#0x%.4x",8<<shift);
  }

  if (size<2)  ot("  mov r0,r0,asl #%d\n\n",size?16:24);

  if (type==0) ot("  adds r1,r0,%s\n",count);
  if (type==1) ot("  subs r1,r0,%s\n",count);

  if ((ea&0x38)!=0x08) OpGetFlags(type,1);
  ot("\n");

  EaWrite(10,     1, ea,size,0x003f,1);

  OpEnd(ea);

  return 0;
}
Exemple #21
0
// --------------------- Opcodes 0x4000+ ---------------------
int OpNeg(int op)
{
  // 01000tt0 xxeeeeee (tt=negx/clr/neg/not, xx=size, eeeeee=EA)
  int type=0,size=0,ea=0,use=0;

  type=(op>>9)&3;
  ea  =op&0x003f;
  size=(op>>6)&3; if (size>=3) return 1;

  // See if we can do this opcode:
  if (EaCanRead (ea,size)==0||EaAn(ea)) return 1;
  if (EaCanWrite(ea     )==0) return 1;

  use=OpBase(op,size);
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler

  OpStart(op,ea); Cycles=size<2?4:6;
  if(ea >= 0x10)  Cycles*=2;

  EaCalc (11,0x003f,ea,size,earwt_msb_dont_care);

  if (type!=1) EaRead (11,0,ea,size,0x003f,earwt_msb_dont_care); // Don't need to read for 'clr' (or do we, for a dummy read?)
  if (type==1) ot("\n");

  if (type==0)
  {
    ot(";@ Negx:\n");
    GetXBit(1);
    if(size!=2) ot("  mov r0,r0,asl #%i\n",size?16:24);
    ot("  rscs r1,r0,#0 ;@ do arithmetic\n");
    ot("  orr r3,r10,#0xb0000000 ;@ for old Z\n");
    OpGetFlags(1,1,0);
    if(size!=2) {
      ot("  movs r1,r1,asr #%i\n",size?16:24);
      ot("  orreq r10,r10,#0x40000000 ;@ possily missed Z\n");
    }
    ot("  andeq r10,r10,r3 ;@ fix Z\n");
    ot("\n");
  }

  if (type==1)
  {
    ot(";@ Clear:\n");
    ot("  mov r1,#0\n");
    ot("  mov r10,#0x40000000 ;@ NZCV=0100\n");
    ot("\n");
  }

  if (type==2)
  {
    ot(";@ Neg:\n");
    if(size!=2) ot("  mov r0,r0,asl #%i\n",size?16:24);
    ot("  rsbs r1,r0,#0\n");
    OpGetFlags(1,1);
    if(size!=2) ot("  mov r1,r1,asr #%i\n",size?16:24);
    ot("\n");
  }

  if (type==3)
  {
    ot(";@ Not:\n");
    if(size!=2) {
      ot("  mov r0,r0,asl #%i\n",size?16:24);
      ot("  mvns r1,r0,asr #%i\n",size?16:24);
    }
    else
      ot("  mvns r1,r0\n");
    OpGetFlagsNZ(1);
    ot("\n");
  }

  if (type==1) eawrite_check_addrerr=1;
  EaWrite(11, 1,ea,size,0x003f,earwt_msb_dont_care);

  OpEnd(ea);

  return 0;
}
Exemple #22
0
// --------------------- Opcodes 0x0800+ ---------------------
// Emit a Btst/Bchg/Bclr/Bset (Immediate) opcode 00001000 ttaaaaaa nn
int OpBtstImm(int op)
{
  int type=0,sea=0,tea=0;
  int use=0;
  int size=0;

  type=(op>>6)&3;
  // Get source and target EA
  sea=   0x003c;
  tea=op&0x003f;
  if (tea<0x10) size=2; // For registers, 32-bits

  // See if we can do this opcode:
  if (EaCanRead(tea,0)==0||EaAn(tea)||tea==0x3c) return 1;
  if (type>0)
  {
    if (EaCanWrite(tea)==0) return 1;
  }

  use=OpBase(op,size);
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler

  OpStart(op,sea,tea);

  ot("\n");
  EaCalcRead(-1,0,sea,0,0,earwt_msb_dont_care);
  ot("  mov r11,#1\n");
  ot("  bic r10,r10,#0x40000000 ;@ Blank Z flag\n");
  if (tea>=0x10)
       ot("  and r0,r0,#7    ;@ mem - do mod 8\n");  // size always 0
  else ot("  and r0,r0,#0x1F ;@ reg - do mod 32\n"); // size always 2
  ot("  mov r11,r11,lsl r0 ;@ Make bit mask\n");
  ot("\n");

  if(type==1||type==3) {
    Cycles=12;
  } else {
    Cycles=type?12:8;
    if(size>=2) Cycles+=2;
  }

  EaCalcRead((type>0)?8:-1,0,tea,size,0x003f,earwt_msb_dont_care);
  ot("  tst r0,r11 ;@ Do arithmetic\n");
  ot("  orreq r10,r10,#0x40000000 ;@ Get Z flag\n");
  ot("\n");

  if (type>0)
  {
    if (type==1) ot("  eor r1,r0,r11 ;@ Toggle bit\n");
    if (type==2) ot("  bic r1,r0,r11 ;@ Clear bit\n");
    if (type==3) ot("  orr r1,r0,r11 ;@ Set bit\n");
    ot("\n");
    EaWrite(8, 1,tea,size,0x003f,earwt_msb_dont_care);
#if CYCLONE_FOR_GENESIS && !MEMHANDLERS_CHANGE_CYCLES
    // this is a bit hacky (device handlers might modify cycles)
    if (tea==0x38||tea==0x39)
      ot("  ldr r5,[r7,#0x5c] ;@ Load Cycles\n");
#endif
  }

  OpEnd(sea,tea);

  return 0;
}
Exemple #23
0
/*! \brief Simple test case for configuration

 This function implements a very simple test case for
 the configuration

 \return
   EXIT_SUCCESS on success,
   else EXIT_ERROR
*/
int ARCH_MAINDECL main(void)
{
    int errorcode = EXIT_FAILURE;

    EnableCrtDebug();

    do {
        char * buffer;

        opencbm_configuration_handle handle = NULL;

        OpStart("opencbm_configuration_create()");
        handle = opencbm_configuration_create("TestFile.inf");

        if (handle == NULL) {
            break;
        }


        OpStart("opencbm_configuration_set_data(\"SectTest\", \"EntryTest\", \"VALUE\")");
        if (opencbm_configuration_set_data(handle, "SectTest", "EntryTest", "VALUE")) {
            break;
        }

        OpStart("opencbm_configuration_set_data(\"SectTest\", \"NewTest\", \"AnotherVALUE\")");
        if (opencbm_configuration_set_data(handle, "SectTest", "NewTest", "AnotherVALUE")) {
            break;
        }


        OpStart("opencbm_configuration_get_data(handle, \"SectTest\", \"NewTest\")");
        if (opencbm_configuration_get_data(handle, "SectTest", "NewTest", &buffer) != 0) {
            break;
        }
        OpEnd();
        fprintf(stderr, "  returned: %s\n", buffer);


        OpStart("opencbm_configuration_set_data(\"NewSect\", \"AEntryTest\", \"aVALUE\")");
        if (opencbm_configuration_set_data(handle, "NewSect", "AEntryTest", "aVALUE")) {
            break;
        }

        OpStart("opencbm_configuration_set_data(\"NewSect\", \"BNewTest\", \"bAnotherVALUE\")");
        if (opencbm_configuration_set_data(handle, "NewSect", "BNewTest", "bAnotherVALUE")) {
            break;
        }


        OpStart("opencbm_configuration_set_data(\"SectTest\", \"NewTest\", \"RewrittenVALUE\")");
        if (opencbm_configuration_set_data(handle, "SectTest", "NewTest", "RewrittenVALUE")) {
            break;
        }


        OpStart("opencbm_configuration_get_data(handle, \"SectTest\", \"NewTest\")");
        if (opencbm_configuration_get_data(handle, "SectTest", "NewTest", &buffer) != 0) {
            break;
        }
        OpEnd();
        fprintf(stderr, "  returned: %s\n", buffer);

        OpStart("opencbm_configuration_enum_sections(handle, ..., NULL)");
        opencbm_configuration_enum_sections(handle, enum_sections_callback, NULL);
        OpEnd();

        OpStart("opencbm_configuration_enum_sections(handle, ..., 0x12345678)");
        opencbm_configuration_enum_sections(handle, enum_sections_callback, 0x12345678);
        OpEnd();
#if 0


int
opencbm_configuration_enum_sections(opencbm_configuration_handle Handle,
                                    opencbm_configuration_enum_sections_callback_t Callback,
                                    void * Data)
#endif

        OpStart("opencbm_configuration_close()");
        if (opencbm_configuration_close(handle) != 0) {
            break;
        }

        errorcode = EXIT_SUCCESS;

    } while(0);

    if (errorcode == EXIT_SUCCESS) {
        OpEnd();
    }
    else {
        OpFail();
    }

    return errorcode;
}