/*********************************************************************//** * @brief Initial for ADC * - Set bit PCADC * - Set clock for ADC * - Set Clock Frequency * * @param[in] ConvFreq Clock frequency * @return None ************************************************************************/ void ADC_Init(uint32_t ConvFreq) { uint32_t temp, tmp; tmp = 0; CHECK_PARAM(PARAM_ADC_FREQUENCY(ConvFreq)); // Turn on power SYSCON_PowerCon(SYSCON_ABLOCK_ADC, ENABLE); // Turn on clock SYSCON_AHBPeriphClockCmd(SYSCON_AHBPeriph_ADC, ENABLE); LPC_ADC->CR = 0; // The A/D converter is in power-down mode //SYSCON_DeepSleepPowerCon(SYSCON_ABLOCK_ADC, ENABLE); // Set clock frequency temp = SystemCoreClock / LPC_SYSCON->SYSAHBCLKDIV; temp = (temp /ConvFreq) - 1; tmp |= ADC_CR_CLKDIV(temp); LPC_ADC->CR = tmp; }
/** * @brief Initial for ADC * - Set bit PCADC * - Set clock for ADC * - Set Clock Frequency * * @param[in] ADCx pointer to ADC_TypeDef * @param[in] ConvFreq Clock frequency * @return None */ void ADC_Init(ADC_TypeDef *ADCx, uint32_t ConvFreq) { uint32_t temp, tmp; CHECK_PARAM(PARAM_ADCx(ADCx)); CHECK_PARAM(PARAM_ADC_FREQUENCY(ConvFreq)); // Turn on power and clock CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCAD, ENABLE); // Set clock divider for ADC to 4 from CCLK as default // CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_ADC,CLKPWR_PCLKSEL_CCLK_DIV_4); ADCx->ADCR = 0; //Enable PDN bit tmp = ADC_CR_PDN; // Set clock frequency temp = CLKPWR_GetPCLK(CLKPWR_PCLKSEL_ADC) ; temp = (temp /ConvFreq) - 1; tmp |= ADC_CR_CLKDIV(temp); ADCx->ADCR = tmp; }