static struct gpio_led easy5120_rt_gpio_leds[] __initdata = {
GPIO_LED_INV(ADM5120_GPIO_PIN6, "user", NULL),
GPIO_LED_INV(ADM5120_GPIO_P0L0, "lan0_led1", NULL),
GPIO_LED_INV(ADM5120_GPIO_P0L1, "lan0_led2", NULL),
GPIO_LED_INV(ADM5120_GPIO_P1L0, "lan1_led1", NULL),
GPIO_LED_INV(ADM5120_GPIO_P1L1, "lan1_led2", NULL),
GPIO_LED_INV(ADM5120_GPIO_P2L0, "lan2_led1", NULL),
GPIO_LED_INV(ADM5120_GPIO_P2L1, "lan2_led2", NULL),
GPIO_LED_INV(ADM5120_GPIO_P3L0, "lan3_led1", NULL),
GPIO_LED_INV(ADM5120_GPIO_P3L1, "lan3_led2", NULL),
GPIO_LED_INV(ADM5120_GPIO_P4L0, "wan", NULL),
};
static struct adm5120_pci_irq easy5120_rt_pci_irqs[] __initdata = {
PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI0),
};
static u8 easy5120_rt_vlans[6] __initdata = {
0x41, 0x42, 0x44, 0x48, 0x50, 0x00
};
static void __init easy5120_rt_setup(void)
{
easy_setup_bga();
adm5120_add_device_switch(5, easy5120_rt_vlans);
adm5120_add_device_usb();
adm5120_add_device_gpio_leds(ARRAY_SIZE(easy5120_rt_gpio_leds),
easy5120_rt_gpio_leds);
adm5120_pci_set_irq_map(ARRAY_SIZE(easy5120_rt_pci_irqs),
/*
* Compex NP28G board support
*
* Copyright (C) 2007-2008 Gabor Juhos <*****@*****.**>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
#include "compex.h"
static struct adm5120_pci_irq np28g_pci_irqs[] __initdata = {
PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI0),
PCIIRQ(3, 0, 1, ADM5120_IRQ_PCI0),
PCIIRQ(3, 1, 2, ADM5120_IRQ_PCI1),
PCIIRQ(3, 2, 3, ADM5120_IRQ_PCI2)
};
static struct gpio_led np28g_gpio_leds[] __initdata = {
GPIO_LED_INV(ADM5120_GPIO_PIN2, "diag", NULL),
GPIO_LED_INV(ADM5120_GPIO_PIN3, "power", NULL),
GPIO_LED_INV(ADM5120_GPIO_PIN6, "wan_cond", NULL),
GPIO_LED_INV(ADM5120_GPIO_PIN7, "wifi", NULL),
GPIO_LED_INV(ADM5120_GPIO_P0L2, "usb1", NULL),
GPIO_LED_INV(ADM5120_GPIO_P1L0, "lan1", NULL),
GPIO_LED_INV(ADM5120_GPIO_P1L2, "usb2", NULL),
GPIO_LED_INV(ADM5120_GPIO_P2L0, "lan2", NULL),
GPIO_LED_INV(ADM5120_GPIO_P2L2, "usb3", NULL),
GPIO_LED_INV(ADM5120_GPIO_P3L0, "lan3", NULL),
.size = 32*1024,
.mask_flags = MTD_WRITEABLE,
} , {
.name = "config",
.offset = MTDPART_OFS_APPEND,
.size = 32*1024,
} , {
.name = "firmware",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
}
};
#endif /* CONFIG_MTD_PARTITIONS */
static struct adm5120_pci_irq eb214a_pci_irqs[] __initdata = {
PCIIRQ(4, 0, 1, ADM5120_IRQ_PCI0),
PCIIRQ(4, 1, 2, ADM5120_IRQ_PCI0),
PCIIRQ(4, 2, 3, ADM5120_IRQ_PCI0),
};
static struct gpio_led eb214a_gpio_leds[] __initdata = {
GPIO_LED_INV(ADM5120_GPIO_PIN7, "power", NULL),
GPIO_LED_INV(ADM5120_GPIO_P0L0, "lan", NULL),
GPIO_LED_INV(ADM5120_GPIO_P4L0, "usb1", NULL),
GPIO_LED_INV(ADM5120_GPIO_P4L1, "usb2", NULL),
GPIO_LED_INV(ADM5120_GPIO_P4L2, "usb3", NULL),
GPIO_LED_INV(ADM5120_GPIO_P3L0, "usb4", NULL),
};
static struct gpio_button eb214a_gpio_buttons[] __initdata = {
{
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
#include "rb-1xx.h"
#define RB1XX_NAND_CHIP_DELAY 25
#define RB1XX_KEYS_POLL_INTERVAL 20
#define RB1XX_KEYS_DEBOUNCE_INTERVAL (3 * RB1XX_KEYS_POLL_INTERVAL)
static struct adm5120_pci_irq rb1xx_pci_irqs[] __initdata = {
PCIIRQ(1, 0, 1, ADM5120_IRQ_PCI0),
PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI1),
PCIIRQ(3, 0, 1, ADM5120_IRQ_PCI2)
};
static struct mtd_partition rb1xx_nor_parts[] = {
{
.name = "booter",
.offset = 0,
.size = 64*1024,
.mask_flags = MTD_WRITEABLE,
} , {
.name = "firmware",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
}
static inline int __init
adir_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
{
#define PCIIRQ(a,b,c,d) {ADIR_IRQ_##a,ADIR_IRQ_##b,ADIR_IRQ_##c,ADIR_IRQ_##d},
struct pci_controller *hose = pci_bus_to_hose(dev->bus->number);
/*
* The three PCI devices on the motherboard have dedicated lines to the
* CPLD interrupt controller, bypassing the standard PCI INTA-D and the
* PC interrupt controller. All other PCI devices (slots) have usual
* staggered INTA-D lines, resulting in 8 lines total (PCI0 INTA-D and
* PCI1 INTA-D). All 8 go to the CPLD interrupt controller. PCI0 INTA-D
* also go to the south bridge, so we have the option of taking them
* via the CPLD interrupt controller or via the south bridge 8259
* 8258 thingy. PCI1 INTA-D can only be taken via the CPLD interrupt
* controller. We take all PCI interrupts via the CPLD interrupt
* controller as recommended by SBS.
*
* We also have some monkey business with the PCI devices within the
* VT82C686B south bridge itself. This chip actually has 7 functions on
* its IDSEL. Function 0 is the actual south bridge, function 1 is IDE,
* and function 4 is some special stuff. The other 4 functions are just
* regular PCI devices bundled in the chip. 2 and 3 are USB UHCIs and 5
* and 6 are audio (not supported on the Adirondack).
*
* This is where the monkey business begins. PCI devices are supposed
* to signal normal PCI interrupts. But the 4 functions in question are
* located in the south bridge chip, which is designed with the
* assumption that it will be fielding PCI INTA-D interrupts rather
* than generating them. Here's what it does. Each of the functions in
* question routes its interrupt to one of the IRQs on the 8259 thingy.
* Which one? It looks at the Interrupt Line register in the PCI config
* space, even though the PCI spec says it's for BIOS/OS interaction
* only.
*
* How do we deal with this? We take these interrupts via 8259 IRQs as
* we have to. We return the desired IRQ numbers from this routine when
* called for the functions in question. The PCI scan code will then
* stick our return value into the Interrupt Line register in the PCI
* config space, and the interrupt will actually go there. We identify
* these functions within the south bridge IDSEL by their interrupt pin
* numbers, as the VT82C686B has 04 in the Interrupt Pin register for
* USB and 03 for audio.
*/
if (!hose->index) {
static char pci_irq_table[][4] =
/*
* PCI IDSEL/INTPIN->INTLINE
* A B C D
*/
{
/* south bridge */ PCIIRQ(IDE0, NONE, VIA_AUDIO, VIA_USB)
/* Ethernet 0 */ PCIIRQ(MBETH0, MBETH0, MBETH0, MBETH0)
/* PCI0 slot 1 */ PCIIRQ(PCI0_INTB, PCI0_INTC, PCI0_INTD, PCI0_INTA)
/* PCI0 slot 2 */ PCIIRQ(PCI0_INTC, PCI0_INTD, PCI0_INTA, PCI0_INTB)
/* PCI0 slot 3 */ PCIIRQ(PCI0_INTD, PCI0_INTA, PCI0_INTB, PCI0_INTC)
};
const long min_idsel = 3, max_idsel = 7, irqs_per_slot = 4;
return PCI_IRQ_TABLE_LOOKUP;
} else {
static char pci_irq_table[][4] =
/*
* PCI IDSEL/INTPIN->INTLINE
* A B C D
*/
{
/* Ethernet 1 */ PCIIRQ(MBETH1, MBETH1, MBETH1, MBETH1)
/* SCSI */ PCIIRQ(MBSCSI, MBSCSI, MBSCSI, MBSCSI)
/* PCI1 slot 1 */ PCIIRQ(PCI1_INTB, PCI1_INTC, PCI1_INTD, PCI1_INTA)
/* PCI1 slot 2 */ PCIIRQ(PCI1_INTC, PCI1_INTD, PCI1_INTA, PCI1_INTB)
/* PCI1 slot 3 */ PCIIRQ(PCI1_INTD, PCI1_INTA, PCI1_INTB, PCI1_INTC)
};
const long min_idsel = 3, max_idsel = 7, irqs_per_slot = 4;
return PCI_IRQ_TABLE_LOOKUP;
}
#undef PCIIRQ
}
