/**
* Funkcja testujaca wydajnosc modulow Triple DES przy wykorzystaniu zapisu i odczytu danych na On-Chip Memory
*/
void test_wydajnosc ()
{
printf ("Test wydajnosci \n");
PERF_RESET(PERFORMANCE_COUNTER_0_BASE );
PERF_START_MEASURING(PERFORMANCE_COUNTER_0_BASE);
int i=0;
int j=0;
PERF_BEGIN(PERFORMANCE_COUNTER_0_BASE ,2); //rozpoczecie pracy 2 licznika mierzacego takty zegara
while(i<512)
{
deciph_3des(dane[2*i],dane[2*i+1]);
j--;
j++;
deciph_3des_read(&wyniki[2*i],&wyniki[2*i+1]);
i++;
}
PERF_END(PERFORMANCE_COUNTER_0_BASE ,2); //zakonczenie pracy 2 licznika mierzacego takty zegara
i=0;
PERF_BEGIN(PERFORMANCE_COUNTER_0_BASE ,1);//rozpoczecie pracy 1 licznika mierzacego takty zegara
while(i<512)
{
ciph_3des(dane[2*i],dane[2*i+1]);
j--;
j++;
ciph_3des_read(&wyniki[2*i],&wyniki[2*i+1]);
i++;
}
PERF_STOP_MEASURING(PERFORMANCE_COUNTER_0_BASE); //zakonczenie pracy wszystkich licznikow
perf_print_formatted_report((void* )PERFORMANCE_COUNTER_0_BASE, ALT_CPU_FREQ*2,2,"3Des 32Kbit szyfr","3Des 32Kbit deszyfr"); //generacja raportu
}
/*
* Funkcja przeprowadzajaca pomiary szyfrowania 1 MB danych
*/
void test_wydajnosci_3des_pot()
{
printf("Test wydajnosci potokowej realizacji szyfratora i deszyfratora Triple DES \n");
PERF_RESET(PERFORMANCE_COUNTER_0_BASE );
PERF_START_MEASURING(PERFORMANCE_COUNTER_0_BASE);
int i=0;
int j=0;
PERF_BEGIN(PERFORMANCE_COUNTER_0_BASE ,2); //rozpoczecie pracy 2 licznika mierzacego takty zegara
while(i<512)
{
ciph_3des_pot(&blok_testowy+2048*i,&blok_testowy+1048576+2048*i,2048);
i++;
}
PERF_END(PERFORMANCE_COUNTER_0_BASE ,2); //zakonczenie pracy 2 licznika mierzacego takty zegara
i=0;
PERF_BEGIN(PERFORMANCE_COUNTER_0_BASE ,1);//rozpoczecie pracy 1 licznika mierzacego takty zegara
while(i<512)
{
deciph_3des_pot(&blok_testowy+2048*i,&blok_testowy+1048576+2048*i,2048);
i++;
}
PERF_STOP_MEASURING(PERFORMANCE_COUNTER_0_BASE); //zakonczenie pracy wszystkich licznikow
perf_print_formatted_report((void* )PERFORMANCE_COUNTER_0_BASE,
ALT_CPU_FREQ*2,2,"3Des_pot 1MB szyfr","3Des_pot 1MB deszyfr"); //generacja raportu
}
int main()
{
volatile int i,j,k; //i = row, j = column,
int count;
int M1[10][10]={0,0,0,0,0,0,0,0,0,0,
32,32,33,34,32,32,33,34,32,32,
32,32,33,34,32,32,33,34,32,32,
32,32,33,34,32,32,33,34,32,32,
32,32,33,34,32,32,33,34,32,32,
19,32,33,34,32,32,33,34,32,32,
32,32,33,34,32,32,33,34,32,32,
32,32,33,34,32,32,33,34,32,32,
32,32,33,34,32,32,33,34,32,32,
19,32,33,34,32,32,33,34,32,32};
int M2[10][10]={32,32,33,34,32,32,33,34,32,32,
32,32,33,34,32,32,33,34,32,32,
32,32,33,34,32,32,33,34,32,32,
32,32,33,34,32,32,33,34,32,32,
32,32,33,34,32,32,33,34,32,32,
19,32,33,34,32,32,33,34,32,32,
32,32,33,34,32,32,33,34,32,32,
32,32,33,34,32,32,33,34,32,32,
32,32,33,34,32,32,33,34,32,32,
19,32,33,34,32,32,33,34,32,32};
int C[10][10]={0};
PERF_RESET (PERFORMANCE_COUNTER_BASE); //Reset Performance Counters to 0
PERF_START_MEASURING (PERFORMANCE_COUNTER_BASE); //Start the Counter
PERF_BEGIN (PERFORMANCE_COUNTER_BASE,2); //Start the overhead counter
PERF_BEGIN (PERFORMANCE_COUNTER_BASE,1); //Start the Matrix Multiplication Counter
PERF_END (PERFORMANCE_COUNTER_BASE,2); //Stop the overhead counter
count = 0;
while(count<100){
count++;
for (i=0;i<=9;i++){
for (j=0;j<=9;j++){
C[i][j] = 0;
for (k=0;k<=9;k++){
C[i][j]+=M1[i][k]*M2[k][j];
}
//printf("%f ", C[i][j]);
}
}
}
PERF_END (PERFORMANCE_COUNTER_BASE,1); //Stop the Matrix Multiplication Counter
PERF_STOP_MEASURING (PERFORMANCE_COUNTER_BASE); //Stop all counters
perf_print_formatted_report((void *)PERFORMANCE_COUNTER_BASE, ALT_CPU_FREQ, 2,
"100 loops","PC overhead");
return 0;
}
/*
* Test wydajnosci szyfrowania 1MB danych z zapisem i odczytem do pamieci SRAM
*/
void test_wydajnosci_sram()
{
PERF_RESET(PERFORMANCE_COUNTER_0_BASE );
PERF_START_MEASURING(PERFORMANCE_COUNTER_0_BASE);
PERF_BEGIN(PERFORMANCE_COUNTER_0_BASE ,1); //uruchomienie 1 licznia
przeprowadzenie_szyfrowania_sram();
PERF_END(PERFORMANCE_COUNTER_0_BASE ,1); //wylaczenie 1 licznika
PERF_BEGIN(PERFORMANCE_COUNTER_0_BASE ,2); // uruchomienie 2 licznika
przeprowadzenie_deszyfrowania_sram();
PERF_STOP_MEASURING(PERFORMANCE_COUNTER_0_BASE); //wylaczenie wszystkich licznikow
perf_print_formatted_report((void* )PERFORMANCE_COUNTER_0_BASE, ALT_CPU_FREQ*2,2,"Test szyfr 3DES(1MB)","Test deszyfr 3DES(1MB)");
}
int main(void)
{
alt_putstr("Hello from Nios II!\n");
fill_arrays_with_random_values();
PERF_RESET(PERFORMANCE_COUNTER_0_BASE);
PERF_START_MEASURING(PERFORMANCE_COUNTER_0_BASE);
PERF_BEGIN(PERFORMANCE_COUNTER_0_BASE, 1);
shuffle_in_c(array_for_c, ARRAY_SIZE);
PERF_END(PERFORMANCE_COUNTER_0_BASE, 1);
PERF_BEGIN(PERFORMANCE_COUNTER_0_BASE, 2);
shuffle_with_custom_instruction(array_for_custom_instr, ARRAY_SIZE);
PERF_END(PERFORMANCE_COUNTER_0_BASE, 2);
PERF_BEGIN(PERFORMANCE_COUNTER_0_BASE, 3);
shuffle_with_accelerator(array_for_accelerator, ARRAY_SIZE);
PERF_END(PERFORMANCE_COUNTER_0_BASE, 3);
PERF_STOP_MEASURING(PERFORMANCE_COUNTER_0_BASE);
perf_print_formatted_report((void *) PERFORMANCE_COUNTER_0_BASE, ALT_CPU_FREQ, 3, ""
"shuffle_with_c", "shuffle_with_custom_instruction", "shuffle_with_accelerator");
//verify_arrays();
#ifdef SMALL_ARRAY
alt_putstr("Shuffle with C:\t\t\t");
print_array(array_for_c, ARRAY_SIZE);
alt_putstr("Shuffle with custom instruction:\t");
print_array(array_for_custom_instr, ARRAY_SIZE);
alt_putstr("Shuffle with accelerator:\t\t");
print_array(cache_bypass(array_for_accelerator), ARRAY_SIZE);
#endif
return 0;
}
int main()
{
int data_set[ARRAY_SIZE];
int i;
printf("Generating random data...\n");
for (i = 0; i < ARRAY_SIZE; i++) {
data_set[i] = rand() % 65536;
}
// For performance counter
PERF_RESET(PERFORMANCE_COUNTER_0_BASE);
// Start the performance counter
PERF_START_MEASURING(performance_name);
printf("Start sorting...\n");
// Start performance counter
PERF_BEGIN(performance_name, 1);
bubble_sort(data_set, ARRAY_SIZE);
// Stop performance counter
PERF_END(performance_name, 1);
// Start the performance counter
PERF_STOP_MEASURING(performance_name);
printf("PC: %d\n", perf_get_section_time(performance_name, 1));
/* Event loop never exits. */
while (1);
return 0;
}
int main()
{
int m, n, p, q, c, d, k, sum = 0;
printf("Enter the number of rows and columns of first matrix\n");
scanf("%d%d", &m, &n);
printf("Enter the elements of first matrix\n");
for ( c = 0 ; c < m ; c++ )
for ( d = 0 ; d < n ; d++ )
scanf("%d", &first[c][d]);
printf("Enter the number of rows and columns of second matrix\n");
scanf("%d%d", &p, &q);
if ( n != p )
printf("Matrices with entered orders can't be multiplied with each other.\n");
else
{
printf("Enter the elements of second matrix\n");
for ( c = 0 ; c < p ; c++ )
for ( d = 0 ; d < q ; d++ )
scanf("%d", &second[c][d]);
/* Here starts the real multiplication. You should profile the following block of code*/
PERF_START_MEASURING( (void*) PERFORMANCE_COUNTER_BASE);
for ( c = 0 ; c < m ; c++ )
{
for ( d = 0 ; d < q ; d++ )
{
for ( k = 0 ; k < p ; k++ )
{
sum = sum + first[c][k]*second[k][d];
}
multiply[c][d] = sum;
sum = 0;
}
alt_u64 x = perf_get_total_time((void*) PERFORMANCE_COUNTER_BASE);
printf("Finished in %u clock cycles\n", x);
/*Calculations are done now. Stop profiling now*/
printf("Product of entered matrices:-\n");
for ( c = 0 ; c < m ; c++ )
{
for ( d = 0 ; d < q ; d++ )
printf("%d\t", multiply[c][d]);
printf("\n");
}
}
return 0;
}
#include <stdio.h>
#include <system.h>
#include <unistd.h>
int main()
{
unsigned int ch = 0;
unsigned int *pLed = (unsigned char*)(LED_BASE);
while(1)
{
*pLed = ch;
ch = ~ch;
usleep(1000000);
}
return 0;
}
int main()
{
int class; //da trasformate in alt_u8 o 16 in base alle dimensioni
int vote;
int end_class;
alt_u16 command[256];
alt_u16 ack_cmd[3];
alt_u32 tr_size;
alt_u32 tr_size_count;
alt_u8 q_size;
alt_u32 n_packet;
alt_u32 tr_val;
alt_u64 addr; //verificare dimensione
alt_u64 q_addr;
alt_u32 q_val;
alt_u32 i = 0;
alt_u32 k = 0;
alt_u8 k_val;
alt_u16 n_dim;
alt_u16 n_load;
alt_u16 n_load_count;
alt_u16 n_cell;
alt_u16 n_cell_last;
alt_u64 count = 0;
alt_u16 cache_q_addr = 0;
alt_dma_txchan txchan;
alt_dma_rxchan rxchan;
alt_u32 memptr = 0;
alt_u8 empty0 = 0;
alt_u8 empty1 = 0;
alt_u8 overflow = 0;
unsigned char ledvalue = 1;
void* tx_data; /* pointer to data to send */
void* rx_buffer; /* pointer to rx buffer */
while(1)
{
command[0] = 0;
recv_short(command, 8);
//send back the ACK
ack_cmd[0] = ACK;
ack_cmd[1] = ACK;
ack_cmd[2] = command[3];
send_short(ack_cmd, 3);
if(command[0] == FLUSH_COMM)
{
tr_size = 0;
tr_size = command[1];
tr_size = tr_size<<16;
tr_size = tr_size | command[2];
n_packet = 0;
n_packet = command[3];
n_packet = n_packet<<16;
n_packet = n_packet | command[4];
cache_q_addr = command[5];
addr = 0;
tr_size_count = 0;
for(i = 0; i < n_packet;i++)
{
recv_short(command, 256);
send_short(command, 256);
for(k = 0;k < 127; k++)
{
if(tr_size_count < tr_size)
{
tr_size_count = tr_size_count + 1;
tr_val = 0;
tr_val = command[2+2*k];
tr_val = tr_val<<16;
tr_val = tr_val | command[3+2*k];
IOWR_32DIRECT(SDRAM_CONTROLLER_BASE,addr,tr_val);
addr = addr + 0x04;
}
}
}
ack_cmd[0] = ACK;
ack_cmd[1] = ACK;
ack_cmd[2] = command[3];
send_short(ack_cmd, 3);
}
else if(command[0] == CLASS_CMD)
{
q_size = 0;
q_size = command[1];
q_size = q_size<<16;
q_size = q_size | command[2];
n_dim = 0;
n_dim = command[3];
k_val = 0;
k_val = command[4];
n_load = 0;
n_load = command[5];
n_cell = 0;
n_cell = command[6];
n_cell_last = 0;
n_cell_last = command[7];
for(i = 0; i < 1;i++)
{
recv_short(command, 256);
send_short(command, 256);
}
q_addr = SDRAM_Q_ADDR_BASE;
for(i = 0;i < q_size; i++)
{
q_val = 0;
q_val = command[2*i];
q_val = q_val<<16;
q_val = q_val | command[1+2*i];
IOWR_32DIRECT(SDRAM_CONTROLLER_BASE, q_addr, q_val);
q_addr = q_addr + 0x04;
}
// set the number of dimension MAX = 256
IOWR_32DIRECT(KNNCLASSCORE_BASE, STARTCLREG,0x00000000);
IOWR_32DIRECT(BASEQADDR_0_BASE,0x00,cache_q_addr);
IOWR_32DIRECT(SKIPADDRREG_0_BASE,0x00,(q_size+1)*4);
IOWR_32DIRECT(NDIMREG_BASE,0x00,n_dim);
// number of training val in each mem
IOWR_32DIRECT(NTRREG_0_BASE,0x00,3);
IOWR_32DIRECT(NTRREG_1_BASE,0x00,3);
// k val
IOWR_32DIRECT(KNNCLASSCORE_BASE,KVALREG,k_val);
IOWR_32DIRECT(ENDTSETREG_0_BASE,0x00,0);
IOWR_32DIRECT(ENDTSETREG_1_BASE,0x00,0);
load_q_cache1 = 0;
load_q_cache0 = 0;
IOWR_32DIRECT(FULLREG_0_BASE,0x00,0x00000000);
IOWR_32DIRECT(FULLREG_1_BASE,0x00,0x00000000);
PERF_RESET(PERFORMANCE_COUNTER_0_BASE);
PERF_START_MEASURING(PERFORMANCE_COUNTER_0_BASE);
PERF_BEGIN(PERFORMANCE_COUNTER_0_BASE,1);
IOWR_32DIRECT(KNNCLASSCORE_BASE, STARTCLREG,0x00000001);
txchan = alt_dma_txchan_open("/dev/dma");
rxchan = alt_dma_rxchan_open("/dev/dma");
alt_dma_txchan_ioctl(txchan, ALT_DMA_SET_MODE_32, NULL);
alt_dma_rxchan_ioctl(rxchan, ALT_DMA_SET_MODE_32, NULL);
txrx_doneCache0 = 0;
tx_data = (void*)(SDRAM_CONTROLLER_BASE+SDRAM_Q_ADDR_BASE); /* pointer to data to send */
rx_buffer = (void*)(DMA_WRITE_MASTER_CACHE_0_BASE+cache_q_addr);//CUSTOM_RAM_0_BASE
alt_dma_txchan_send (txchan,tx_data,q_size*4,NULL,NULL);
alt_dma_rxchan_prepare (rxchan,rx_buffer,q_size*4, txrxDoneCache0,NULL);
alt_dma_txchan_ioctl(txchan, ALT_DMA_SET_MODE_32, NULL);
alt_dma_rxchan_ioctl(rxchan, ALT_DMA_SET_MODE_32, NULL);
txrx_doneCache1 = 0;
tx_data = (void*)(SDRAM_CONTROLLER_BASE+SDRAM_Q_ADDR_BASE); /* pointer to data to send */
rx_buffer = (void*)(DMA_WRITE_MASTER_CACHE_1_BASE+cache_q_addr);//CUSTOM_RAM_0_BASE
alt_dma_txchan_send (txchan,tx_data,q_size*4,NULL,NULL);
alt_dma_rxchan_prepare (rxchan,rx_buffer,q_size*4, txrxDoneCache1,NULL);
IOWR_ALTERA_AVALON_PIO_DATA(PIO_0_BASE, ledvalue);
ledvalue++;
n_load_count = 0;
memptr = 0;
IOWR_32DIRECT(KNNCLASSCORE_BASE,STARTCLREG,1); //modificato qui
//fill cache 0
empty0 = IORD_32DIRECT(EMPTYREG_0_BASE,0x00);
empty1 = IORD_32DIRECT(EMPTYREG_1_BASE,0x00);
while(txrx_doneCache1==0 || txrx_doneCache1==0);
while(n_load_count < n_load)
{
if(empty0 && (n_load_count < n_load) && txrx_doneCache0 ) // && !endmem0
{
IOWR_32DIRECT(FULLREG_0_BASE,0x00,0x00000000);
IOWR_32DIRECT(ENDTSETREG_0_BASE,0x00,0);
if(n_load_count == n_load-1)
IOWR_32DIRECT(NTRREG_0_BASE, 0x00,n_cell_last/(4*(q_size+1)));
else
IOWR_32DIRECT(NTRREG_0_BASE, 0x00,n_cell/(4*(q_size+1)));
txrx_doneCache0 = 0;
alt_dma_txchan_ioctl(txchan, ALT_DMA_SET_MODE_32, NULL);
alt_dma_rxchan_ioctl(rxchan, ALT_DMA_SET_MODE_32, NULL);
tx_data = (void*)(SDRAM_CONTROLLER_BASE+memptr); /* pointer to data to send */
rx_buffer = (void*)(DMA_WRITE_MASTER_CACHE_0_BASE);//CUSTOM_RAM_0_BASE
if(n_load_count == n_load-1)
{
alt_dma_txchan_send (txchan,tx_data,n_cell_last,NULL,NULL);
alt_dma_rxchan_prepare (rxchan,rx_buffer,n_cell_last, txrxDoneCache0,NULL);
}
else
{
alt_dma_txchan_send (txchan,tx_data,n_cell,NULL,NULL);
alt_dma_rxchan_prepare (rxchan,rx_buffer,n_cell, txrxDoneCache0,NULL);
}
memptr = memptr + n_cell;
n_load_count++;
IOWR_32DIRECT(FULLREG_0_BASE,0x00,0x00000001);
}
if(empty1 && (n_load_count< n_load) && txrx_doneCache1) // && !endmem0
{
//fill cache 1
IOWR_32DIRECT(FULLREG_1_BASE,0x00,0x00000000);
IOWR_32DIRECT(ENDTSETREG_1_BASE,0x00,0); //era 1
if(n_load_count == n_load-1)
IOWR_32DIRECT(NTRREG_1_BASE, 0x00,n_cell_last/(4*(q_size+1)));
else
IOWR_32DIRECT(NTRREG_1_BASE, 0x00,n_cell/(4*(q_size+1)));
alt_dma_txchan_ioctl(txchan, ALT_DMA_SET_MODE_32, NULL);
alt_dma_rxchan_ioctl(rxchan, ALT_DMA_SET_MODE_32, NULL);
txrx_doneCache1 = 0;
tx_data = (void*)(SDRAM_CONTROLLER_BASE+memptr); /* pointer to data to send */
rx_buffer = (void*)(DMA_WRITE_MASTER_CACHE_1_BASE);//CUSTOM_RAM_0_BASE
if(n_load_count == n_load-1)
{
alt_dma_txchan_send (txchan,tx_data,n_cell_last,NULL,NULL);
alt_dma_rxchan_prepare (rxchan,rx_buffer,n_cell_last, txrxDoneCache1,NULL);
}
else
{
alt_dma_txchan_send (txchan,tx_data,n_cell,NULL,NULL);
alt_dma_rxchan_prepare (rxchan,rx_buffer,n_cell, txrxDoneCache1,NULL);
}
memptr = memptr + n_cell;
n_load_count++;
IOWR_32DIRECT(FULLREG_1_BASE,0x00,0x00000001);
}
empty0 = IORD_32DIRECT(EMPTYREG_0_BASE,0x00);
empty1 = IORD_32DIRECT(EMPTYREG_1_BASE,0x00);
}
while(txrx_doneCache1==0 || txrx_doneCache1==0);
//while(empty0==0 || empty1==0);
IOWR_32DIRECT(ENDTSETREG_0_BASE,0x00,1); //era 1
IOWR_32DIRECT(ENDTSETREG_1_BASE,0x00,1); //era 1
end_class = 0;
while (!end_class)
end_class = IORD_32DIRECT(KNNCLASSCORE_BASE,ENDCLASSREG);
alt_dma_txchan_close(txchan);
alt_dma_rxchan_close(rxchan);
PERF_END(PERFORMANCE_COUNTER_0_BASE,1);
class = IORD_32DIRECT(KNNCLASSCORE_BASE,CLREG);
vote = IORD_32DIRECT(KNNCLASSCORE_BASE,NVOTREG);
count = perf_get_section_time(PERFORMANCE_COUNTER_0_BASE,1);
overflow = IORD_32DIRECT(KNNCLASSCORE_BASE,OVERFLOWREG);
command[0] = class;
command[1] = vote;
command[2] = count;
count = count>>16;
command[3] = count;
count = count>>16;
command[4] = count;
count = count>>16;
command[5] = count;
command[6] = overflow;
addr = 0;
for(i=0; i < 16; i++)
{
command[7+i] = IORD_32DIRECT(KNNCLASSCORE_BASE,addr);
addr = addr + 0x04;
}
send_short(command, 23);
}
}
