static int adm6996_fixup(struct phy_device *dev) { struct mii_bus *bus = dev->bus; u16 reg; /* look for the switch on the bus */ reg = bus->read(bus, PHYADDR(ADM_SIG0)) & ADM_SIG0_MASK; if (reg != ADM_SIG0_VAL) return 0; reg = bus->read(bus, PHYADDR(ADM_SIG1)) & ADM_SIG1_MASK; if (reg != ADM_SIG1_VAL) return 0; dev->phy_id = (ADM_SIG0_VAL << 16) | ADM_SIG1_VAL; return 0; }
static bool adm6996_detect(struct mii_bus *bus, int addr) { u16 reg; /* we only attach to phy id 0 */ if (addr != 0) return false; /* look for the switch on the bus */ reg = bus->read(bus, PHYADDR(ADM_SIG0)) & ADM_SIG0_MASK; if (reg != ADM_SIG0_VAL) return false; reg = bus->read(bus, PHYADDR(ADM_SIG1)) & ADM_SIG1_MASK; if (reg != ADM_SIG1_VAL) return false; return true; }
static int adm6996_fixup(struct phy_device *dev) { struct mii_bus *bus = dev->bus; u16 reg; /* Our custom registers are at PHY addresses 0-10. Claim those. */ if (dev->addr > 10) return 0; /* look for the switch on the bus */ reg = bus->read(bus, PHYADDR(ADM_SIG0)) & ADM_SIG0_MASK; if (reg != ADM_SIG0_VAL) return 0; reg = bus->read(bus, PHYADDR(ADM_SIG1)) & ADM_SIG1_MASK; if (reg != ADM_SIG1_VAL) return 0; dev->phy_id = (ADM_SIG0_VAL << 16) | ADM_SIG1_VAL; return 0; }
//////////////////////////////////////////////////// // 功能: 触发DMA中断,传送数据 // 输入: // 输出: // 返回: // 说明: //////////////////////////////////////////////////// void DmaDataToAic(int arg,unsigned int sour_addr, unsigned int len,unsigned char mode) { if( !arg ) { //放音DMA dma_cache_wback_inv(sour_addr, len); CLRREG32(AIC_SR, AIC_SR_TUR); SETREG32(AIC_CR, AIC_CR_ERPL); dma_start(PLAYBACK_CHANNEL, PHYADDR(sour_addr), PHYADDR(AIC_DR),len,mode); if (INREG32(AIC_SR) & AIC_SR_TUR) CLRREG32(AIC_SR, AIC_SR_TUR); } else { //录音DMA __dcache_inv((unsigned long)sour_addr, len); SETREG32(AIC_CR, AIC_CR_EREC); dma_start(RECORD_CHANNEL, PHYADDR(AIC_DR), PHYADDR(sour_addr),len,mode); if (INREG32(A_AIC_AICSR) & AICSR_ROR) CLRREG32(A_AIC_AICSR, AICSR_ROR); } }
static void DMA_SendData(PEPSTATE pep) { unsigned int size; size = pep->totallen - (pep->totallen % pep->fifosize); if(IS_CACHE(pep->data_addr)) dma_cache_wback_inv(pep->data_addr, size); jz_writel(USB_REG_ADDR1,PHYADDR(pep->data_addr)); jz_writel(USB_REG_COUNT1,size);//fifosize[ep]); jz_writel(USB_REG_CNTL1,0x001f); jz_writeb(USB_REG_INDEX, 1); usb_setw(USB_REG_INCSR,0x9400); //printf("dma send %x\n",size); pep->curlen = size; }
static void DMA_ReceiveData(PEPSTATE pep) { unsigned int size; size = pep->totallen - (pep->totallen % pep->fifosize); if(IS_CACHE(pep->data_addr)) dma_cache_wback_inv(pep->data_addr, pep->totallen); //IntrOutMask = 0x0; jz_writel(USB_REG_ADDR2,PHYADDR(pep->data_addr)); jz_writel(USB_REG_COUNT2,size); jz_writel(USB_REG_CNTL2,0x001d); jz_writeb(USB_REG_INDEX,1); usb_setw(USB_REG_OUTCSR,0xa000); // printf("dma receive %x\n",size); pep->curlen = size; }
static u16 adm6996_read_mii_reg(struct phy_device *phydev, enum admreg reg) { return phydev->bus->read(phydev->bus, PHYADDR(reg)); }
static void adm6996_write_mii_reg(struct phy_device *phydev, enum admreg reg, u16 val) { phydev->bus->write(phydev->bus, PHYADDR(reg), val); }