// Set Pin value as a boolean
void SetPin(tPin pin, tBoolean val) {
// Setting pin direction is just a bit set and fairly trivial
GPIOPinTypeGPIOOutput(PORT_VAL(pin), PIN_VAL(pin));
// Set the actual pin value
GPIOPinWrite(PORT_VAL(pin), PIN_VAL(pin), val ? 0xff : 0x00);
}
// Get Pin value as a boolean
tBoolean GetPin(tPin pin) {
// Setting pin direction is just a bit set and fairly trivial
GPIOPinTypeGPIOInput(PORT_VAL(pin), PIN_VAL(pin));
// Get the actual pin value
return GPIOPinRead(PORT_VAL(pin), PIN_VAL(pin)) ? true : false;
}
// Function to initialize pwm on a pin
// The returned pointer can be used by the SetPWM function
// Frequency must be specified in hertz
// If the number of frequencies passes the number of available
// modules, which is currently 12, then a null pointer is returned
tPWM *InitializePWM(tPin pin, float freq) {
tPWMModule *mod;
tPWM *pwm;
int i;
// Grab the next pwm
pwm = &pwmBuffer[pwmCount++];
// Setup the pwm events
pwm->up.state = 0xff;
pwm->down.state = 0x00;
// Setup the pin
GPIOPinTypeGPIOOutput(PORT_VAL(pin), PIN_VAL(pin));
pwm->up.pin = pin;
pwm->down.pin = pin;
// Calculate period
pwm->period = (unsigned long)(SysCtlClockGet() / freq);
// Find a module with the given frequency
for (i = 0; i < PWM_MODULE_COUNT; i++) {
// If we don't find a module we need to make a new one
if (i == modCount) {
// Grab the next module
mod = &modBuffer[modCount++];
// Initialize
InitializePWMModule(mod, pwm);
// Return the running pwm
return pwm;
}
// If we find a module with the period we're looking for,
// stick our pwm in it
if (modBuffer[i].period == pwm->period) {
// Grab the module
mod = &modBuffer[i];
// Add the new signal to the running ones
InsertPWM(mod, pwm);
// Return the running pwm
return pwm;
}
}
// If no module is available, we put the pwm back and
// just return a null for failure
pwmCount--;
return 0;
}
// Internally used function to register a pin interrupt
static void CallOnPinType(tCallback callback, void *data, tPin pin, unsigned long type) {
tPinTask *task = &pinTaskBuffer[pin];
// Stop the interrupt first to avoid a race condition
GPIOPinIntDisable(PORT_VAL(pin), PIN_VAL(pin));
task->callback = Dummy;
// Make sure the pin is setup as an input
GPIOPinTypeGPIOInput(PORT_VAL(pin), PIN_VAL(pin));
// If a null pointer is passed then we just leave the Dummy
// to unregister the callback
if (callback) {
task->data = data;
task->callback = callback;
// Setup the interrupts
GPIOIntTypeSet(PORT_VAL(pin), PIN_VAL(pin), type);
GPIOPinIntClear(PORT_VAL(pin), PIN_VAL(pin));
GPIOPinIntEnable(PORT_VAL(pin), PIN_VAL(pin));
}
}
//Initializes motors and IR Sebsors
void initMotorsSensors(void) {
if (!initialized) {
initialized = true;
Motors[0] = InitializeServoMotor(PIN_B6, false);
Motors[1] = InitializeServoMotor(PIN_B7, false);
Motors[2] = InitializeServoMotor(PIN_C4, false);
Motors[3] = InitializeServoMotor(PIN_C5, false);
marservo = InitializeServo(PIN_B2);
pingservo = InitializeServo(PIN_F3);
SetServo(marservo,0.1f);
SetServo(pingservo,0.1f);
GPIOPadConfigSet(PORT_VAL(PIN_B6), PIN_VAL(PIN_B6), GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD);
GPIOPadConfigSet(PORT_VAL(PIN_B7), PIN_VAL(PIN_B7), GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD);
GPIOPadConfigSet(PORT_VAL(PIN_C4), PIN_VAL(PIN_C4), GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD);
GPIOPadConfigSet(PORT_VAL(PIN_C5), PIN_VAL(PIN_C5), GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD);
adc[0] = InitializeADC(PIN_D0);
adc[1] = InitializeADC(PIN_D1);
adc[2] = InitializeADC(PIN_D2);
adc[3] = InitializeADC(PIN_D3);
turn=0;
gls = InitializeGPIOLineSensor(
PIN_B5,
PIN_B0,
PIN_B1,
PIN_E4,
PIN_E5,
PIN_B4,
PIN_A5,
PIN_A6
);
}
}
/**
* config_pin - configure a pin's mux attributes
* @cfg: pin confguration
*
* Configures a pin's mode (alternate function or GPIO), its pull up status,
* and its sleep mode based on the specified configuration. The @cfg is
* usually one of the SoC specific macros defined in mach/<soc>-pins.h. These
* are constructed using, and can be further enhanced with, the macros in
* plat/pincfg.h.
*
* If a pin's mode is set to GPIO, it is configured as an input to avoid
* side-effects. The gpio can be manipulated later using standard GPIO API
* calls.
*/
static void config_pin(pin_cfg_t cfg)
{
int pin = PIN_NUM(cfg);
int pull = PIN_PULL(cfg);
int af = PIN_ALT(cfg);
int output = PIN_DIR(cfg);
int val = PIN_VAL(cfg);
if (output)
db8500_gpio_make_output(pin, val);
else {
db8500_gpio_make_input(pin);
db8500_gpio_set_pull(pin, pull);
}
gpio_set_mode(pin, af);
}
static void __nmk_config_pin(struct nmk_gpio_chip *nmk_chip, unsigned offset,
pin_cfg_t cfg, bool sleep, unsigned int *slpmregs)
{
static const char *afnames[] = {
[NMK_GPIO_ALT_GPIO] = "GPIO",
[NMK_GPIO_ALT_A] = "A",
[NMK_GPIO_ALT_B] = "B",
[NMK_GPIO_ALT_C] = "C"
};
static const char *pullnames[] = {
[NMK_GPIO_PULL_NONE] = "none",
[NMK_GPIO_PULL_UP] = "up",
[NMK_GPIO_PULL_DOWN] = "down",
[3] /* illegal */ = "??"
};
static const char *slpmnames[] = {
[NMK_GPIO_SLPM_INPUT] = "input/wakeup",
[NMK_GPIO_SLPM_NOCHANGE] = "no-change/no-wakeup",
};
int pin = PIN_NUM(cfg);
int pull = PIN_PULL(cfg);
int af = PIN_ALT(cfg);
int slpm = PIN_SLPM(cfg);
int output = PIN_DIR(cfg);
int val = PIN_VAL(cfg);
bool glitch = af == NMK_GPIO_ALT_C;
dev_dbg(nmk_chip->chip.dev, "pin %d [%#lx]: af %s, pull %s, slpm %s (%s%s)\n",
pin, cfg, afnames[af], pullnames[pull], slpmnames[slpm],
output ? "output " : "input",
output ? (val ? "high" : "low") : "");
if (sleep) {
int slpm_pull = PIN_SLPM_PULL(cfg);
int slpm_output = PIN_SLPM_DIR(cfg);
int slpm_val = PIN_SLPM_VAL(cfg);
af = NMK_GPIO_ALT_GPIO;
/*
* The SLPM_* values are normal values + 1 to allow zero to
* mean "same as normal".
*/
if (slpm_pull)
pull = slpm_pull - 1;
if (slpm_output)
output = slpm_output - 1;
if (slpm_val)
val = slpm_val - 1;
dev_dbg(nmk_chip->chip.dev, "pin %d: sleep pull %s, dir %s, val %s\n",
pin,
slpm_pull ? pullnames[pull] : "same",
slpm_output ? (output ? "output" : "input") : "same",
slpm_val ? (val ? "high" : "low") : "same");
}
if (output)
__nmk_gpio_make_output(nmk_chip, offset, val);
else {
__nmk_gpio_make_input(nmk_chip, offset);
__nmk_gpio_set_pull(nmk_chip, offset, pull);
}
__nmk_gpio_set_lowemi(nmk_chip, offset, PIN_LOWEMI(cfg));
/*
* If the pin is switching to altfunc, and there was an interrupt
* installed on it which has been lazy disabled, actually mask the
* interrupt to prevent spurious interrupts that would occur while the
* pin is under control of the peripheral. Only SKE does this.
*/
if (af != NMK_GPIO_ALT_GPIO)
nmk_gpio_disable_lazy_irq(nmk_chip, offset);
/*
* If we've backed up the SLPM registers (glitch workaround), modify
* the backups since they will be restored.
*/
if (slpmregs) {
if (slpm == NMK_GPIO_SLPM_NOCHANGE)
slpmregs[nmk_chip->bank] |= BIT(offset);
else
slpmregs[nmk_chip->bank] &= ~BIT(offset);
} else
__nmk_gpio_set_slpm(nmk_chip, offset, slpm);
__nmk_gpio_set_mode_safe(nmk_chip, offset, af, glitch);
}
int nmk_pin_config_set(struct pinctrl_dev *pctldev,
unsigned pin,
unsigned long config)
{
static const char *pullnames[] = {
[NMK_GPIO_PULL_NONE] = "none",
[NMK_GPIO_PULL_UP] = "up",
[NMK_GPIO_PULL_DOWN] = "down",
[3] /* illegal */ = "??"
};
static const char *slpmnames[] = {
[NMK_GPIO_SLPM_INPUT] = "input/wakeup",
[NMK_GPIO_SLPM_NOCHANGE] = "no-change/no-wakeup",
};
struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
struct nmk_gpio_chip *nmk_chip;
struct pinctrl_gpio_range *range;
struct gpio_chip *chip;
unsigned bit;
/*
* The pin config contains pin number and altfunction fields, here
* we just ignore that part. It's being handled by the framework and
* pinmux callback respectively.
*/
pin_cfg_t cfg = (pin_cfg_t) config;
int pull = PIN_PULL(cfg);
int slpm = PIN_SLPM(cfg);
int output = PIN_DIR(cfg);
int val = PIN_VAL(cfg);
bool lowemi = PIN_LOWEMI(cfg);
bool gpiomode = PIN_GPIOMODE(cfg);
bool sleep = PIN_SLEEPMODE(cfg);
range = nmk_match_gpio_range(pctldev, pin);
if (!range) {
dev_err(npct->dev, "invalid pin offset %d\n", pin);
return -EINVAL;
}
if (!range->gc) {
dev_err(npct->dev, "GPIO chip missing in range for pin %d\n",
pin);
return -EINVAL;
}
chip = range->gc;
nmk_chip = container_of(chip, struct nmk_gpio_chip, chip);
if (sleep) {
int slpm_pull = PIN_SLPM_PULL(cfg);
int slpm_output = PIN_SLPM_DIR(cfg);
int slpm_val = PIN_SLPM_VAL(cfg);
/* All pins go into GPIO mode at sleep */
gpiomode = true;
/*
* The SLPM_* values are normal values + 1 to allow zero to
* mean "same as normal".
*/
if (slpm_pull)
pull = slpm_pull - 1;
if (slpm_output)
output = slpm_output - 1;
if (slpm_val)
val = slpm_val - 1;
dev_dbg(nmk_chip->chip.dev, "pin %d: sleep pull %s, dir %s, val %s\n",
pin,
slpm_pull ? pullnames[pull] : "same",
slpm_output ? (output ? "output" : "input") : "same",
slpm_val ? (val ? "high" : "low") : "same");
}
dev_dbg(nmk_chip->chip.dev, "pin %d [%#lx]: pull %s, slpm %s (%s%s), lowemi %s\n",
pin, cfg, pullnames[pull], slpmnames[slpm],
output ? "output " : "input",
output ? (val ? "high" : "low") : "",
lowemi ? "on" : "off" );
clk_enable(nmk_chip->clk);
bit = pin % NMK_GPIO_PER_CHIP;
if (gpiomode)
/* No glitch when going to GPIO mode */
__nmk_gpio_set_mode(nmk_chip, bit, NMK_GPIO_ALT_GPIO);
if (output)
__nmk_gpio_make_output(nmk_chip, bit, val);
else {
__nmk_gpio_make_input(nmk_chip, bit);
__nmk_gpio_set_pull(nmk_chip, bit, pull);
}
/* TODO: isn't this only applicable on output pins? */
__nmk_gpio_set_lowemi(nmk_chip, bit, lowemi);
__nmk_gpio_set_slpm(nmk_chip, bit, slpm);
clk_disable(nmk_chip->clk);
return 0;
}
static void __nmk_config_pin(struct nmk_gpio_chip *nmk_chip, unsigned offset,
pin_cfg_t cfg, bool sleep, unsigned int *slpmregs)
{
static const char *afnames[] = {
[NMK_GPIO_ALT_GPIO] = "GPIO",
[NMK_GPIO_ALT_A] = "A",
[NMK_GPIO_ALT_B] = "B",
[NMK_GPIO_ALT_C] = "C"
};
static const char *pullnames[] = {
[NMK_GPIO_PULL_NONE] = "none",
[NMK_GPIO_PULL_UP] = "up",
[NMK_GPIO_PULL_DOWN] = "down",
[3] /* illegal */ = "??"
};
static const char *slpmnames[] = {
[NMK_GPIO_SLPM_INPUT] = "input/wakeup",
[NMK_GPIO_SLPM_NOCHANGE] = "no-change/no-wakeup",
};
int pin = PIN_NUM(cfg);
int pull = PIN_PULL(cfg);
int af = PIN_ALT(cfg);
int slpm = PIN_SLPM(cfg);
int output = PIN_DIR(cfg);
int val = PIN_VAL(cfg);
bool glitch = af == NMK_GPIO_ALT_C;
dev_dbg(nmk_chip->chip.dev, "pin %d [%#lx]: af %s, pull %s, slpm %s (%s%s)\n",
pin, cfg, afnames[af], pullnames[pull], slpmnames[slpm],
output ? "output " : "input",
output ? (val ? "high" : "low") : "");
if (sleep) {
int slpm_pull = PIN_SLPM_PULL(cfg);
int slpm_output = PIN_SLPM_DIR(cfg);
int slpm_val = PIN_SLPM_VAL(cfg);
af = NMK_GPIO_ALT_GPIO;
/*
* The SLPM_* values are normal values + 1 to allow zero to
* mean "same as normal".
*/
if (slpm_pull)
pull = slpm_pull - 1;
if (slpm_output)
output = slpm_output - 1;
if (slpm_val)
val = slpm_val - 1;
dev_dbg(nmk_chip->chip.dev, "pin %d: sleep pull %s, dir %s, val %s\n",
pin,
slpm_pull ? pullnames[pull] : "same",
slpm_output ? (output ? "output" : "input") : "same",
slpm_val ? (val ? "high" : "low") : "same");
}
if (output)
__nmk_gpio_make_output(nmk_chip, offset, val);
else {
__nmk_gpio_make_input(nmk_chip, offset);
__nmk_gpio_set_pull(nmk_chip, offset, pull);
}
/*
* If we've backed up the SLPM registers (glitch workaround), modify
* the backups since they will be restored.
*/
if (slpmregs) {
if (slpm == NMK_GPIO_SLPM_NOCHANGE)
slpmregs[nmk_chip->bank] |= BIT(offset);
else
slpmregs[nmk_chip->bank] &= ~BIT(offset);
} else
__nmk_gpio_set_slpm(nmk_chip, offset, slpm);
__nmk_gpio_set_mode_safe(nmk_chip, offset, af, glitch);
}
int
gpio_read(int const pin_nr) {
assert(gpio != NULL);
return GPLEV[PIN_OFFSET(pin_nr)] & PIN_VAL(pin_nr);
}
// Add a weak pull down resistor to the pin
void PullDownPin(tPin pin) {
GPIOPadConfigSet(PORT_VAL(pin), PIN_VAL(pin),
GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD_WPD);
}
// Set a pin into high impedance mode
void SetPinZ(tPin pin) {
// Setting pin direction to input places it in high impedance mode
GPIOPinTypeGPIOInput(PORT_VAL(pin), PIN_VAL(pin));
}
