INLINE void PS_CPU::WriteMemory(pscpu_timestamp_t ×tamp, uint32 address, uint32 value, bool DS24) { if(!(CP0.SR & 0x10000)) { if(sizeof(T) == 1) PSX_MemWrite8(timestamp, address, value); else if(sizeof(T) == 2) PSX_MemWrite16(timestamp, address, value); else { if(DS24) PSX_MemWrite24(timestamp, address, value); else PSX_MemWrite32(timestamp, address, value); } } //else // printf("ISC WRITE%d %08x %08x\n", (int)sizeof(T), address, value); }
INLINE void PS_CPU::WriteMemory(pscpu_timestamp_t ×tamp, uint32 address, uint32 value, bool DS24) { if(MDFN_LIKELY(!(CP0.SR & 0x10000))) { if(sizeof(T) == 1) PSX_MemWrite8(timestamp, address, value); else if(sizeof(T) == 2) PSX_MemWrite16(timestamp, address, value); else { if(DS24) PSX_MemWrite24(timestamp, address, value); else PSX_MemWrite32(timestamp, address, value); } } else { #if PS_CPU_EMULATE_ICACHE if(BIU & 0x800) // Instruction cache is enabled/active { if(BIU & 0x4) // TAG test mode. { // TODO: Respect written value. __ICache *ICI = &ICache[((address & 0xFF0) >> 2)]; const uint8 valid_bits = 0x00; ICI[0].TV = ((valid_bits & 0x01) ? 0x00 : 0x02) | ((BIU & 0x800) ? 0x0 : 0x1); ICI[1].TV = ((valid_bits & 0x02) ? 0x00 : 0x02) | ((BIU & 0x800) ? 0x0 : 0x1); ICI[2].TV = ((valid_bits & 0x04) ? 0x00 : 0x02) | ((BIU & 0x800) ? 0x0 : 0x1); ICI[3].TV = ((valid_bits & 0x08) ? 0x00 : 0x02) | ((BIU & 0x800) ? 0x0 : 0x1); } else if(!(BIU & 0x1)) { ICache[(address & 0xFFC) >> 2].Data = value << ((address & 0x3) * 8); }