Exemple #1
0
void SseShuffleReg(int Dest, int Source, BYTE Immed) {
	BYTE x86Command = 0;

	CPU_Message("      shufps %s, %s, %02X", sse_Name(Dest), sse_Name(Source), Immed);

	switch (Dest) {
	case x86_XMM0: x86Command = 0x00; break;
	case x86_XMM1: x86Command = 0x08; break;
	case x86_XMM2: x86Command = 0x10; break;
	case x86_XMM3: x86Command = 0x18; break;
	case x86_XMM4: x86Command = 0x20; break;
	case x86_XMM5: x86Command = 0x28; break;
	case x86_XMM6: x86Command = 0x30; break;
	case x86_XMM7: x86Command = 0x38; break;
	}
	switch (Source) {
	case x86_XMM0: x86Command += 0x00; break;
	case x86_XMM1: x86Command += 0x01; break;
	case x86_XMM2: x86Command += 0x02; break;
	case x86_XMM3: x86Command += 0x03; break;
	case x86_XMM4: x86Command += 0x04; break;
	case x86_XMM5: x86Command += 0x05; break;
	case x86_XMM6: x86Command += 0x06; break;
	case x86_XMM7: x86Command += 0x07; break;
	}
	PUTDST16(RecompPos,0xC60f);
	PUTDST8(RecompPos, 0xC0 | x86Command);
	PUTDST8(RecompPos, Immed);
}
Exemple #2
0
void SseMoveAlignedN64MemToReg(int sseReg, int AddrReg) {
	BYTE x86Command = 0;

	CPU_Message("      movaps %s, xmmword ptr [Dmem+%s]",sse_Name(sseReg), x86_Name(AddrReg));

	switch (sseReg) {
	case x86_XMM0: x86Command = 0x80; break;
	case x86_XMM1: x86Command = 0x88; break;
	case x86_XMM2: x86Command = 0x90; break;
	case x86_XMM3: x86Command = 0x98; break;
	case x86_XMM4: x86Command = 0xA0; break;
	case x86_XMM5: x86Command = 0xA8; break;
	case x86_XMM6: x86Command = 0xB0; break;
	case x86_XMM7: x86Command = 0xB8; break;
	}	
	switch (AddrReg) {
	case x86_EAX: x86Command += 0x00; break;
	case x86_EBX: x86Command += 0x03; break;
	case x86_ECX: x86Command += 0x01; break;
	case x86_EDX: x86Command += 0x02; break;
	case x86_ESI: x86Command += 0x06; break;
	case x86_EDI: x86Command += 0x07; break;
	case x86_ESP: x86Command += 0x04; break;
	case x86_EBP: x86Command += 0x05; break;
	}

	PUTDST16(RecompPos,0x280f);
	PUTDST8(RecompPos, x86Command);
	PUTDSTPTR(RecompPos, RSPInfo.DMEM);
}
Exemple #3
0
void MmxCompareGreaterWordRegToReg(int Dest, int Source) {
	BYTE x86Command = 0;

	CPU_Message("      pcmpgtw %s, %s", mmx_Name(Dest), mmx_Name(Source));

	switch (Dest) {
	case x86_MM0: x86Command = 0 << 3; break;
	case x86_MM1: x86Command = 1 << 3; break;
	case x86_MM2: x86Command = 2 << 3; break;
	case x86_MM3: x86Command = 3 << 3; break;
	case x86_MM4: x86Command = 4 << 3; break;
	case x86_MM5: x86Command = 5 << 3; break;
	case x86_MM6: x86Command = 6 << 3; break;
	case x86_MM7: x86Command = 7 << 3; break;
	}
	switch (Source) {
	case x86_MM0: x86Command |= 0; break;
	case x86_MM1: x86Command |= 1; break;
	case x86_MM2: x86Command |= 2; break;
	case x86_MM3: x86Command |= 3; break;
	case x86_MM4: x86Command |= 4; break;
	case x86_MM5: x86Command |= 5; break;
	case x86_MM6: x86Command |= 6; break;
	case x86_MM7: x86Command |= 7; break;
	}
	PUTDST16(RecompPos,0x650f);
	PUTDST8(RecompPos, 0xC0 | x86Command);
}
Exemple #4
0
void SseXorRegToReg(int Dest, int Source) {
	BYTE x86Command = 0;

	CPU_Message("      xorps %s, %s", sse_Name(Dest), sse_Name(Source));

	switch (Dest) {
	case x86_XMM0: x86Command = 0x00; break;
	case x86_XMM1: x86Command = 0x08; break;
	case x86_XMM2: x86Command = 0x10; break;
	case x86_XMM3: x86Command = 0x18; break;
	case x86_XMM4: x86Command = 0x20; break;
	case x86_XMM5: x86Command = 0x28; break;
	case x86_XMM6: x86Command = 0x30; break;
	case x86_XMM7: x86Command = 0x38; break;
	}
	switch (Source) {
	case x86_XMM0: x86Command += 0x00; break;
	case x86_XMM1: x86Command += 0x01; break;
	case x86_XMM2: x86Command += 0x02; break;
	case x86_XMM3: x86Command += 0x03; break;
	case x86_XMM4: x86Command += 0x04; break;
	case x86_XMM5: x86Command += 0x05; break;
	case x86_XMM6: x86Command += 0x06; break;
	case x86_XMM7: x86Command += 0x07; break;
	}
	PUTDST16(RecompPos,0x570f);
	PUTDST8(RecompPos, 0xC0 | x86Command);
}
Exemple #5
0
void MmxUnpackHighWord(int Dest, int Source) {
	BYTE x86Command = 0;

	CPU_Message("      punpckhwd %s, %s", mmx_Name(Dest), mmx_Name(Source));

	switch (Dest) {
	case x86_MM0: x86Command = 0 << 3; break;
	case x86_MM1: x86Command = 1 << 3; break;
	case x86_MM2: x86Command = 2 << 3; break;
	case x86_MM3: x86Command = 3 << 3; break;
	case x86_MM4: x86Command = 4 << 3; break;
	case x86_MM5: x86Command = 5 << 3; break;
	case x86_MM6: x86Command = 6 << 3; break;
	case x86_MM7: x86Command = 7 << 3; break;
	}
	switch (Source) {
	case x86_MM0: x86Command |= 0; break;
	case x86_MM1: x86Command |= 1; break;
	case x86_MM2: x86Command |= 2; break;
	case x86_MM3: x86Command |= 3; break;
	case x86_MM4: x86Command |= 4; break;
	case x86_MM5: x86Command |= 5; break;
	case x86_MM6: x86Command |= 6; break;
	case x86_MM7: x86Command |= 7; break;
	}
	PUTDST16(RecompPos,0x690f);
	PUTDST8(RecompPos, 0xC0 | x86Command);
}
Exemple #6
0
void MmxPsllwImmed(int Dest, BYTE Immed) {
	BYTE x86Command = 0;

	CPU_Message("      psllw %s, %i", mmx_Name(Dest), Immed);

	switch (Dest) {
	case x86_MM0: x86Command = 0xF0; break;
	case x86_MM1: x86Command = 0xF1; break;
	case x86_MM2: x86Command = 0xF2; break;
	case x86_MM3: x86Command = 0xF3; break;
	case x86_MM4: x86Command = 0xF4; break;
	case x86_MM5: x86Command = 0xF5; break;
	case x86_MM6: x86Command = 0xF6; break;
	case x86_MM7: x86Command = 0xF7; break;
	}	

	PUTDST16(RecompPos,0x710f);
	PUTDST8(RecompPos, x86Command);
	PUTDST8(RecompPos, Immed);
}
Exemple #7
0
void MmxPsrawImmed(int Dest, BYTE Immed) {
	BYTE x86Command = 0;

	CPU_Message("      psraw %s, %i", mmx_Name(Dest), Immed);

	switch (Dest) {
	case x86_MM0: x86Command = 0xE0; break;
	case x86_MM1: x86Command = 0xE1; break;
	case x86_MM2: x86Command = 0xE2; break;
	case x86_MM3: x86Command = 0xE3; break;
	case x86_MM4: x86Command = 0xE4; break;
	case x86_MM5: x86Command = 0xE5; break;
	case x86_MM6: x86Command = 0xE6; break;
	case x86_MM7: x86Command = 0xE7; break;
	}	

	PUTDST16(RecompPos,0x710f);
	PUTDST8(RecompPos, x86Command);
	PUTDST8(RecompPos, Immed);
}
void fpuLoadControl(void *Variable)
{
#ifdef USEX64
    PUTDST16(RecompPos, 0xB849);
    PUTDST64(RecompPos, Variable);
    PUTDST8(RecompPos, 0x41);
    PUTDST16(RecompPos, 0x28D9);
#else
    PUTDST16(RecompPos, 0x2DD9);
    PUTDST32(RecompPos, Variable);
#endif
}
Exemple #9
0
void MmxShuffleMemoryToReg(int Dest, void * Variable, char * VariableName, BYTE Immed) {
	BYTE x86Command = 0;

	CPU_Message("      pshufw %s, [%s], %02X", mmx_Name(Dest), VariableName, Immed);

	switch (Dest) {
	case x86_MM0: x86Command = 0x05; break;
	case x86_MM1: x86Command = 0x0D; break;
	case x86_MM2: x86Command = 0x15; break;
	case x86_MM3: x86Command = 0x1D; break;
	case x86_MM4: x86Command = 0x25; break;
	case x86_MM5: x86Command = 0x2D; break;
	case x86_MM6: x86Command = 0x35; break;
	case x86_MM7: x86Command = 0x3D; break;
	}

	PUTDST16(RecompPos,0x700f);
	PUTDST8(RecompPos, x86Command);
	PUTDSTPTR(RecompPos, Variable);
	PUTDST8(RecompPos, Immed);	
}
Exemple #10
0
void MmxPmulhwRegToVariable(int Dest, void * Variable, char * VariableName) {
	BYTE x86Command = 0;

	CPU_Message("      pmulhw %s, [%s]", mmx_Name(Dest), VariableName);

	switch (Dest) {
	case x86_MM0: x86Command = 0x05; break;
	case x86_MM1: x86Command = 0x0D; break;
	case x86_MM2: x86Command = 0x15; break;
	case x86_MM3: x86Command = 0x1D; break;
	case x86_MM4: x86Command = 0x25; break;
	case x86_MM5: x86Command = 0x2D; break;
	case x86_MM6: x86Command = 0x35; break;
	case x86_MM7: x86Command = 0x3D; break;
	}
	PUTDST16(RecompPos,0xe50f);
	PUTDST8(RecompPos, x86Command);
	PUTDSTPTR(RecompPos, Variable);
}
Exemple #11
0
void SseMoveAlignedRegToVariable(int sseReg, void *Variable, char *VariableName) {
	BYTE x86Command = 0;

	CPU_Message("      movaps xmmword ptr [%s], %s",VariableName, sse_Name(sseReg));

	switch (sseReg) {
	case x86_XMM0: x86Command = 0x05; break;
	case x86_XMM1: x86Command = 0x0D; break;
	case x86_XMM2: x86Command = 0x15; break;
	case x86_XMM3: x86Command = 0x1D; break;
	case x86_XMM4: x86Command = 0x25; break;
	case x86_XMM5: x86Command = 0x2D; break;
	case x86_XMM6: x86Command = 0x35; break;
	case x86_XMM7: x86Command = 0x3D; break;
	}	

	PUTDST16(RecompPos,0x290f);
	PUTDST8(RecompPos, x86Command);
	PUTDSTPTR(RecompPos, Variable);
}
Exemple #12
0
void SseMoveUnalignedVariableToReg(void *Variable, char *VariableName, int sseReg) {
	BYTE x86Command = 0;

	CPU_Message("      movups %s, xmmword ptr [%s]",sse_Name(sseReg), VariableName);

	switch (sseReg) {
	case x86_XMM0: x86Command = 0x05; break;
	case x86_XMM1: x86Command = 0x0D; break;
	case x86_XMM2: x86Command = 0x15; break;
	case x86_XMM3: x86Command = 0x1D; break;
	case x86_XMM4: x86Command = 0x25; break;
	case x86_XMM5: x86Command = 0x2D; break;
	case x86_XMM6: x86Command = 0x35; break;
	case x86_XMM7: x86Command = 0x3D; break;
	}	

	PUTDST16(RecompPos,0x100f);
	PUTDST8(RecompPos, x86Command);
	PUTDSTPTR(RecompPos, Variable);
}
Exemple #13
0
void MmxMoveQwordVariableToReg(int Dest, void *Variable, char *VariableName) {
	BYTE x86Command = 0;

	CPU_Message("      movq %s, qword ptr [%s]",mmx_Name(Dest), VariableName);

	switch (Dest) {
	case x86_MM0: x86Command = 0x05; break;
	case x86_MM1: x86Command = 0x0D; break;
	case x86_MM2: x86Command = 0x15; break;
	case x86_MM3: x86Command = 0x1D; break;
	case x86_MM4: x86Command = 0x25; break;
	case x86_MM5: x86Command = 0x2D; break;
	case x86_MM6: x86Command = 0x35; break;
	case x86_MM7: x86Command = 0x3D; break;
	}	

	PUTDST16(RecompPos,0x6f0f);
	PUTDST8(RecompPos, x86Command);
	PUTDSTPTR(RecompPos, Variable);
}