void StartRateTrying(IN PADAPTER Adapter, IN PSTATION_RA_INFO pRaInfo)
{
// Test for Wilson
PlatformEFIOWrite2Byte(Adapter, REG_TX_RPT_TIME,0x0138);
RT_TRACE(COMP_RATE_ADAPTIVE, DBG_LOUD,
("StartRateTrying(): "));
// Need to Modify (Try bit?, Try timing)
}
u1Byte EndRateTrying(IN PADAPTER Adapter, IN PSTATION_RA_INFO pRaInfo)
{
u1Byte TryResult=0;
u4Byte pool_retry;
pRaInfo->DecisionRate=(pRaInfo->DecisionRate)&0x7f;
PlatformEFIOWrite2Byte(Adapter, REG_TX_RPT_TIME,0x44A5);
pool_retry=pRaInfo->RTY[1]+pRaInfo->RTY[2]+pRaInfo->RTY[3]+pRaInfo->RTY[4]+pRaInfo->DROP;
if (pool_retry>2)
TryResult=0;
else
TryResult=1;
return TryResult;
}
VOID
ODM_Write2Byte(
IN PDM_ODM_T pDM_Odm,
IN u4Byte RegAddr,
IN u2Byte Data
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
prtl8192cd_priv priv = pDM_Odm->priv;
RTL_W16(RegAddr, Data);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
rtw_write16(Adapter,RegAddr, Data);
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformEFIOWrite2Byte(Adapter, RegAddr, Data);
#endif
}
void
ODM_Write2Byte(
PDM_ODM_T pDM_Odm,
u32 RegAddr,
u16 Data
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
prtl8192cd_priv priv = pDM_Odm->priv;
RTL_W16(RegAddr, Data);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
struct rtw_adapter * Adapter = pDM_Odm->Adapter;
rtw_write16(Adapter,RegAddr, Data);
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
struct rtw_adapter * Adapter = pDM_Odm->Adapter;
PlatformEFIOWrite2Byte(Adapter, RegAddr, Data);
#endif
}
extern NDIS_STATUS usb_dvobj_init(_adapter * padapter){
NDIS_STATUS status=_SUCCESS;
struct dvobj_priv *pdvobjpriv=&padapter->dvobjpriv;
u8 hw_version;
u32 val32,size;
_func_enter_;
pdvobjpriv->padapter=padapter;
DEBUG_ERR(("\nusb_dvobj_init:read hw_version!!\n"));
hw_version = 0;
#if 0
hw_version = (read32(padapter, TCR) & TCR_HWVERID_MASK)>>TCR_HWVERID_SHIFT;
switch (hw_version) {
case VERSION_819xUsb_A:
padapter->registrypriv.chip_version=VERSION_819xUsb_A;
DEBUG_ERR(("\nusb_dvobj_init:padapter->registrypriv.chip_version=%d(VERSION_819xUsb_A)\n",padapter->registrypriv.chip_version));
default:
padapter->registrypriv.chip_version= VERSION_819xUsb_A;
break;
}
DEBUG_ERR(("\nusb_dvobj_init:padapter->registrypriv.chip_version=%d\n",padapter->registrypriv.chip_version));
#endif
/*Read EEprom size */
DEBUG_ERR(("\nusb_dvobj_init:read eeprom Size!!\n"));
val32 = PlatformEFIORead2Byte(padapter, Cmd9346CR);
size = (val32 & Cmd9346CR_9356SEL) ? 8 : 6;
padapter->EepromAddressSize = size;
DEBUG_ERR(("EEPROM type is %s\n",size==8 ? "93C56" : "93C46"));
DEBUG_ERR(("\nusb_dvobj_init:padapter->EepromAddressSize=%d\n",padapter->EepromAddressSize));
read_eeprom_content(padapter);
//write IDR0~IDR5
// for(i=0 ; i<6 ; i++)
// write8(padapter, IDR0+i, padapter->eeprompriv.mac_addr[i]);
PlatformEFIOWrite4Byte(padapter, IDR0, ((pu4Byte)(padapter->eeprompriv.mac_addr))[0]);
PlatformEFIOWrite2Byte(padapter, IDR4, ((pu2Byte)(padapter->eeprompriv.mac_addr+4))[0]);
// for(i=0 ; i<6 ; i++)
{
DEBUG_ERR(("%8x ",PlatformEFIORead4Byte(padapter, IDR0) ) );
DEBUG_ERR(("%4x ",PlatformEFIORead2Byte(padapter, IDR4) ));
}
printk("\n");
#ifdef TODO
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
INIT_WORK(&_sys_mib->DigWorkItem, (void(*)(void*)) DigWorkItemCallback, padapter);
INIT_WORK(&_sys_mib->RateAdaptiveWorkItem, (void(*)(void*)) RateAdaptiveWorkItemCallback, padapter);
#else
INIT_DELAYED_WORK(&_sys_mib->DigWorkItem, DigWorkItemCallback);
INIT_DELAYED_WORK(&_sys_mib->RateAdaptiveWorkItem, RateAdaptiveWorkItemCallback);
#endif
#endif
_func_exit_;
return status;
}
VOID
halTxbf8814A_DownloadNDPA(
IN PADAPTER Adapter,
IN u1Byte Idx
)
{
u1Byte u1bTmp = 0, tmpReg422 = 0;
u1Byte BcnValidReg = 0, count = 0, DLBcnCount = 0;
u2Byte Head_Page = 0x7FE;
BOOLEAN bSendBeacon = FALSE;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
u2Byte TxPageBndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8814A; /*default reseved 1 page for the IC type which is undefined.*/
PRT_BEAMFORMING_INFO pBeamInfo = GET_BEAMFORM_INFO(Adapter);
PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx;
pHalData->bFwDwRsvdPageInProgress = TRUE;
Adapter->HalFunc.GetHalDefVarHandler(Adapter, HAL_DEF_TX_PAGE_BOUNDARY, (pu2Byte)&TxPageBndy);
/*Set REG_CR bit 8. DMA beacon by SW.*/
u1bTmp = PlatformEFIORead1Byte(Adapter, REG_CR_8814A + 1);
PlatformEFIOWrite1Byte(Adapter, REG_CR_8814A + 1, (u1bTmp | BIT0));
/*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/
tmpReg422 = PlatformEFIORead1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A + 2);
PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A + 2, tmpReg422 & (~BIT6));
if (tmpReg422 & BIT6) {
RT_TRACE(COMP_INIT, DBG_LOUD, ("SetBeamformDownloadNDPA_8814A(): There is an Adapter is sending beacon.\n"));
bSendBeacon = TRUE;
}
/*0x204[11:0] Beacon Head for TXDMA*/
PlatformEFIOWrite2Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A, Head_Page);
do {
/*Clear beacon valid check bit.*/
BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 1);
PlatformEFIOWrite1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 1, (BcnValidReg | BIT7));
/*download NDPA rsvd page.*/
if (pBeamEntry->BeamformEntryCap & BEAMFORMER_CAP_VHT_SU)
Beamforming_SendVHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->AID, pBeamEntry->SoundBW, BEACON_QUEUE);
else
Beamforming_SendHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->SoundBW, BEACON_QUEUE);
/*check rsvd page download OK.*/
BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 1);
count = 0;
while (!(BcnValidReg & BIT7) && count < 20) {
count++;
delay_us(10);
BcnValidReg = PlatformEFIORead1Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 2);
}
DLBcnCount++;
} while (!(BcnValidReg & BIT7) && DLBcnCount < 5);
if (!(BcnValidReg & BIT0))
RT_DISP(FBEAM, FBEAM_ERROR, ("%s Download RSVD page failed!\n", __func__));
/*0x204[11:0] Beacon Head for TXDMA*/
PlatformEFIOWrite2Byte(Adapter, REG_FIFOPAGE_CTRL_2_8814A, TxPageBndy);
/*To make sure that if there exists an adapter which would like to send beacon.*/
/*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/
/*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */
/*the beacon cannot be sent by HW.*/
/*2010.06.23. Added by tynli.*/
if (bSendBeacon)
PlatformEFIOWrite1Byte(Adapter, REG_FWHW_TXQ_CTRL_8814A + 2, tmpReg422);
/*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/
/*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/
u1bTmp = PlatformEFIORead1Byte(Adapter, REG_CR_8814A + 1);
PlatformEFIOWrite1Byte(Adapter, REG_CR_8814A + 1, (u1bTmp & (~BIT0)));
pBeamEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSED;
pHalData->bFwDwRsvdPageInProgress = FALSE;
}
