/*JP @*/
static void op_0xc3(Z80EX_CONTEXT *cpu)
{
temp_word.b.l=READ_OP();
temp_word.b.h=READ_OP();
JP(temp_word.w);
T_WAIT_UNTIL(10);
return;
}
/*CALL @*/
static void op_0xcd(Z80EX_CONTEXT *cpu)
{
temp_word.b.l=READ_OP();
temp_word.b.h=READ_OP();
CALL(temp_word.w, /*wr*/11,14);
T_WAIT_UNTIL(17);
return;
}
/*LD SP,@*/
static void op_0x31(Z80EX_CONTEXT *cpu)
{
temp_word.b.l=READ_OP();
temp_word.b.h=READ_OP();
LD16(SP,temp_word.w);
T_WAIT_UNTIL(10);
return;
}
/*LD A,(@)*/
static void op_0x3a(Z80EX_CONTEXT *cpu)
{
temp_addr.b.l=READ_OP();
temp_addr.b.h=READ_OP();
READ_MEM(temp_byte,temp_addr.w,10);
LD_A_FROM_ADDR_MPTR(A,temp_byte, temp_addr.w);
T_WAIT_UNTIL(13);
return;
}
static void saturn_instruction_8(void)
{
int oper;
switch(READ_OP()) {
case 0:
saturn_instruction_80();
break;
case 1:
saturn_instruction_81();
break;
case 2: saturn_hst_clear_bits();break;
case 3: saturn_hst_bits_cleared();break;
case 4: saturn_st_clear_bit();break;
case 5: saturn_st_set_bit();break;
case 6: saturn_st_jump_bit_clear();break;
case 7: saturn_st_jump_bit_set();break;
case 8: saturn_p_not_equals(); break;
case 9: saturn_p_equals(); break;
case 0xa:
switch(oper=READ_OP()) {
case 0: case 1: case 2: case 3:
saturn_equals(reg_left[oper&3] , BEGIN_A, COUNT_A, reg_right[oper&3]);
break;
case 4: case 5: case 6: case 7:
saturn_not_equals(reg_left[oper&3] , BEGIN_A, COUNT_A, reg_right[oper&3]);
break;
case 8: case 9: case 0xa: case 0xb:
saturn_equals_zero(A+(oper&3), BEGIN_A, COUNT_A);
break;
case 0xc: case 0xd: case 0xe: case 0xf:
saturn_not_equals_zero(A+(oper&3), BEGIN_A, COUNT_A);
break;
}
break;
case 0xb:
switch(oper=READ_OP()) {
case 0: case 1: case 2: case 3:
saturn_greater(reg_left[oper&3] , BEGIN_A, COUNT_A, reg_right[oper&3]);
break;
case 4: case 5: case 6: case 7:
saturn_smaller(reg_left[oper&3] , BEGIN_A, COUNT_A, reg_right[oper&3]);
break;
case 8: case 9: case 0xa: case 0xb:
saturn_greater_equals(reg_left[oper&3], BEGIN_A, COUNT_A, reg_right[oper&3]);
break;
case 0xc: case 0xd: case 0xe: case 0xf:
saturn_smaller_equals(reg_left[oper&3], BEGIN_A, COUNT_A, reg_right[oper&3]);
break;
}
break;
case 0xc: saturn_jump((READ_OP_DIS16()+saturn.pc-4)&0xfffff,1);break;
case 0xd: saturn_jump(READ_OP_ARG20(),1);break;
case 0xe: saturn_call((READ_OP_DIS16()+saturn.pc)&0xfffff);break;
case 0xf: saturn_call(READ_OP_ARG20());break;
}
}
/*LD (@),A*/
static void op_0x32(Z80EX_CONTEXT *cpu)
{
temp_addr.b.l=READ_OP();
temp_addr.b.h=READ_OP();
LD_A_TO_ADDR_MPTR(temp_byte,A, temp_addr.w);
WRITE_MEM(temp_addr.w,temp_byte,10);
T_WAIT_UNTIL(13);
return;
}
/*LD (@),HL*/
static void op_ED_0x63(void)
{
temp_addr.b.l=READ_OP();
temp_addr.b.h=READ_OP();
LD_RP_TO_ADDR_MPTR_16(temp_word.w,HL, temp_addr.w);
WRITE_MEM(temp_addr.w,temp_word.b.l,10);
WRITE_MEM(temp_addr.w+1,temp_word.b.h,13);
T_WAIT_UNTIL(16);
return;
}
/*LD SP,(@)*/
static void op_ED_0x7b(void)
{
temp_addr.b.l=READ_OP();
temp_addr.b.h=READ_OP();
READ_MEM(temp_word.b.l,temp_addr.w,10);
READ_MEM(temp_word.b.h,temp_addr.w+1,13);
LD_RP_FROM_ADDR_MPTR_16(SP,temp_word.w, temp_addr.w);
T_WAIT_UNTIL(16);
return;
}
/*LD (@),SP*/
static void op_ED_0x73(Z80EX_CONTEXT *cpu)
{
temp_addr.b.l=READ_OP();
temp_addr.b.h=READ_OP();
LD_RP_TO_ADDR_MPTR_16(temp_word.w,SP, temp_addr.w);
WRITE_MEM(temp_addr.w,temp_word.b.l,10);
WRITE_MEM(temp_addr.w+1,temp_word.b.h,13);
T_WAIT_UNTIL(16);
return;
}
/*LD BC,(@)*/
static void op_ED_0x4b(Z80EX_CONTEXT *cpu)
{
temp_addr.b.l=READ_OP();
temp_addr.b.h=READ_OP();
READ_MEM(temp_word.b.l,temp_addr.w,10);
READ_MEM(temp_word.b.h,temp_addr.w+1,13);
LD_RP_FROM_ADDR_MPTR_16(BC,temp_word.w, temp_addr.w);
T_WAIT_UNTIL(16);
return;
}
/*LD (IX+$),#*/
static void op_DD_0x36(Z80EX_CONTEXT *cpu)
{
temp_byte=READ_OP();
temp_byte_s=(temp_byte & 0x80)? -(((~temp_byte) & 0x7f)+1): temp_byte;
MEMPTR=(IX+temp_byte_s);
temp_byte=READ_OP();
LD(temp_byte,temp_byte);
WRITE_MEM((IX+temp_byte_s),temp_byte,12);
T_WAIT_UNTIL(15);
return;
}
/*CALL M,@*/
static void op_0xfc(Z80EX_CONTEXT *cpu)
{
temp_word.b.l=READ_OP();
temp_word.b.h=READ_OP();
if(F & FLAG_S) {
CALL(temp_word.w, /*wr*/11,14);
T_WAIT_UNTIL(17);
}
else { T_WAIT_UNTIL(10);MEMPTR=temp_word.w;}
return;
}
/*JP M,@*/
static void op_0xfa(Z80EX_CONTEXT *cpu)
{
temp_word.b.l=READ_OP();
temp_word.b.h=READ_OP();
if(F & FLAG_S) {
JP(temp_word.w);
T_WAIT_UNTIL(10);
}
else { T_WAIT_UNTIL(10);MEMPTR=temp_word.w;}
return;
}
/*OR #*/
static void op_0xf6(Z80EX_CONTEXT *cpu)
{
temp_byte=READ_OP();
OR(temp_byte);
T_WAIT_UNTIL(7);
return;
}
/*OUT (#),A*/
static void op_0xd3(Z80EX_CONTEXT *cpu)
{
temp_word.w=(READ_OP() + ( A << 8 ));
OUT_A(temp_word.w,A, /*wr*/8);
T_WAIT_UNTIL(11);
return;
}
/* get total threads, thread ids, operation mix */
void
xdd_getthreads(xdd_ts_header_t *tsdata, int *total_threads, int thread_id[], double *op_mix)
{
size_t i;
int k = -1, tothreads = 0;
uint64_t read_ops = 0, write_ops = 0;
if (*op_mix > 0.0) {
fprintf(stderr,"xdd_getthreads: op_mix = %10.4f ..should be 0.0\n",*op_mix);
exit (-1);
}
/* how many qthreads are there? */
for (i = 0; i < tsdata->tsh_tt_size; i++) {
tothreads = MAX(tsdata->tsh_tte[i].tte_worker_thread_number,tothreads);
if (k < tothreads && k < MAX_WORKER_THREADS)
{
k = tothreads;
thread_id[k] = tsdata->tsh_tte[i].tte_thread_id;
}
read_ops += READ_OP(tsdata->tsh_tte[i].tte_op_type);
write_ops += WRITE_OP(tsdata->tsh_tte[i].tte_op_type);
}
*total_threads = tothreads + 1;
*op_mix = (read_ops && write_ops) ? (double)read_ops/(double)write_ops : 0.0;
return;
}
/*IN A,(#)*/
static void op_0xdb(Z80EX_CONTEXT *cpu)
{
temp_word.w=(READ_OP() + ( A << 8 ));
IN_A(A,temp_word.w, /*rd*/8);
T_WAIT_UNTIL(11);
return;
}
/*LD IXH,#*/
static void op_DD_0x26(Z80EX_CONTEXT *cpu)
{
temp_byte=READ_OP();
LD(IXH,temp_byte);
T_WAIT_UNTIL(7);
return;
}
/*DJNZ %*/
static void op_0x10(Z80EX_CONTEXT *cpu)
{
temp_byte=READ_OP();
temp_byte_s=(temp_byte & 0x80)? -(((~temp_byte) & 0x7f)+1): temp_byte;
DJNZ(temp_byte_s, /*t:*/ /*t1*/8,/*t2*/13);
return;
}
/*LD A,#*/
static void op_0x3e(Z80EX_CONTEXT *cpu)
{
temp_byte=READ_OP();
LD(A,temp_byte);
T_WAIT_UNTIL(7);
return;
}
/*LD (HL),#*/
static void op_0x36(Z80EX_CONTEXT *cpu)
{
temp_byte=READ_OP();
LD(temp_byte,temp_byte);
WRITE_MEM((HL),temp_byte,7);
T_WAIT_UNTIL(10);
return;
}
/*JR %*/
static void op_0x18(Z80EX_CONTEXT *cpu)
{
temp_byte=READ_OP();
temp_byte_s=(temp_byte & 0x80)? -(((~temp_byte) & 0x7f)+1): temp_byte;
JR(temp_byte_s);
T_WAIT_UNTIL(12);
return;
}
INLINE void sc61860_prepare_table_call(sc61860_state *cpustate)
{
int adr;
cpustate->h=READ_OP(cpustate);
adr=READ_OP_ARG_WORD(cpustate);
PUSH(adr>>8);
PUSH(adr&0xff);
}
static void saturn_instruction_80(saturn_state *cpustate)
{
int op;
switch(READ_OP(cpustate)) {
case 0: saturn_out_cs(cpustate);break;
case 1: saturn_out_c(cpustate);break;
case 2: saturn_in(cpustate, A);break;
case 3: saturn_in(cpustate, C);break;
case 4: saturn_mem_unconfig(cpustate);break;
case 5: saturn_mem_config(cpustate);break;
case 6: saturn_mem_id(cpustate);break;
case 7: saturn_shutdown(cpustate);break;
case 8:
switch(READ_OP(cpustate)) {
case 0: saturn_interrupt_on(cpustate);break;
case 1:
switch(op=READ_OP(cpustate)) {
case 0: saturn_reset_interrupt(cpustate);break;
default: saturn_invalid5( cpustate, 8, 0, 8, 1, op ); break;
}
break;
case 2: saturn_load_reg(cpustate, A);break; //la
case 3: saturn_bus_command_b(cpustate);break;
case 4: saturn_clear_bit(cpustate, A);break; // abit=0
case 5: saturn_set_bit(cpustate, A);break; // abit=1
case 6: saturn_jump_bit_clear(cpustate, A);break;
case 7: saturn_jump_bit_set(cpustate, A);break;
case 8: saturn_clear_bit(cpustate, C);break; // cbit=0
case 9: saturn_set_bit(cpustate, C);break; // cbit=1
case 0xa: saturn_jump_bit_clear(cpustate, C);break;
case 0xb: saturn_jump_bit_set(cpustate, C);break;
case 0xc: saturn_indirect_jump(cpustate, A);break;
case 0xd: saturn_bus_command_d(cpustate);break;
case 0xe: saturn_indirect_jump(cpustate, C);break;
case 0xf: saturn_interrupt_off(cpustate);break;
}
break;
case 9: saturn_ca_p_1(cpustate);break;//C+P+1
case 0xa: saturn_mem_reset(cpustate);break;
case 0xb: saturn_bus_command_b(cpustate);break;
case 0xc: saturn_p_to_c(cpustate);break;
case 0xd: saturn_c_to_p(cpustate);break;
case 0xe: saturn_serial_request(cpustate);break;
case 0xf: saturn_exchange_p(cpustate);break;
}
}
static INLINE void sc61860_prepare_table_call(void)
{
int adr;
sc61860.ram[H]=READ_OP();
adr=READ_OP_ARG_WORD();
PUSH(adr>>8);
PUSH(adr&0xff);
}
static void saturn_instruction_80(void)
{
switch(READ_OP()) {
case 0: saturn_out_cs();break;
case 1: saturn_out_c();break;
case 2: saturn_in(A);break;
case 3: saturn_in(C);break;
case 4: saturn_mem_unconfig();break;
case 5: saturn_mem_config();break;
case 6: saturn_mem_id();break;
case 7: saturn_shutdown();break;
case 8:
switch(READ_OP()) {
case 0: saturn_interrupt_on();break;
case 1:
switch(READ_OP()) {
case 0: saturn_reset_interrupt();break;
}
break;
case 2: saturn_load_reg(A);break; /*la */
case 3: saturn_bus_command_c();break;
case 4: saturn_clear_bit(A);break; /* abit=0 */
case 5: saturn_set_bit(A);break; /* abit=1 */
case 6: saturn_jump_bit_clear(A);break;
case 7: saturn_jump_bit_set(A);break;
case 8: saturn_clear_bit(C);break; /* cbit=0 */
case 9: saturn_set_bit(C);break; /* cbit=1 */
case 0xa: saturn_jump_bit_clear(C);break;
case 0xb: saturn_jump_bit_set(C);break;
case 0xc: saturn_indirect_jump(A);break;
case 0xd: saturn_bus_command_d();break;
case 0xe: saturn_indirect_jump(C);break;
case 0xf: saturn_interrupt_off();break;
}
break;
case 9: saturn_ca_p_1();break;/*C+P+1 */
case 0xa: saturn_mem_reset();break;
case 0xb: saturn_bus_command_b();break;
case 0xc: saturn_p_to_c();break;
case 0xd: saturn_c_to_p();break;
case 0xe: saturn_serial_request();break;
case 0xf: saturn_exchange_p();break;
}
}
/*CP (IX+$)*/
static void op_DD_0xbe(Z80EX_CONTEXT *cpu)
{
temp_byte=READ_OP();
temp_byte_s=(temp_byte & 0x80)? -(((~temp_byte) & 0x7f)+1): temp_byte;
MEMPTR=(IX+temp_byte_s);
READ_MEM(temp_byte,(IX+temp_byte_s),12);
CP(temp_byte);
T_WAIT_UNTIL(15);
return;
}
/*JR C,%*/
static void op_0x38(Z80EX_CONTEXT *cpu)
{
temp_byte=READ_OP();
temp_byte_s=(temp_byte & 0x80)? -(((~temp_byte) & 0x7f)+1): temp_byte;
if(F & FLAG_C) {
JR(temp_byte_s);
T_WAIT_UNTIL(12);
}
else { T_WAIT_UNTIL(7);}
return;
}
INLINE void saturn_instruction_0e(saturn_state *cpustate)
{
int reg, adr;
switch(adr=READ_OP(cpustate)) {
case 0:
switch(reg=READ_OP(cpustate)){
case 0: case 1: case 2: case 3: case 4: case 5: case 6: case 7:
saturn_and(cpustate, reg_left[reg], cpustate->p, 1, reg_right[reg]);
break; //A=A&B p
case 8: case 9: case 0xa: case 0xb: case 0xc: case 0xd: case 0xe: case 0xf:
saturn_or(cpustate, reg_left[reg&7], cpustate->p, 1, reg_right[reg&7]);
break; //A=A!B p
}
break;
case 1:
switch(reg=READ_OP(cpustate)){
case 0: case 1: case 2: case 3:case 4: case 5: case 6: case 7:
saturn_and(cpustate, reg_left[reg], 0, cpustate->p+1, reg_right[reg]);
break; //A=A&B wp
case 8: case 9: case 0xa: case 0xb: case 0xc: case 0xd: case 0xe: case 0xf:
saturn_or(cpustate, reg_left[reg&7], 0, cpustate->p+1, reg_right[reg&7]);
break; //A=A!B wp
}
break;
case 2: case 3: case 4: case 5: case 6: case 7: case 0xf:
switch(reg=READ_OP(cpustate)){
case 0: case 1: case 2: case 3: case 4: case 5: case 6: case 7:
saturn_and(cpustate, reg_left[reg], adr_af_begin[adr], adr_af_count[adr], reg_right[reg]);
break; //A=A&B xs
case 8: case 9: case 0xa: case 0xb: case 0xc: case 0xd: case 0xe: case 0xf:
saturn_or(cpustate, reg_left[reg&7], adr_af_begin[adr], adr_af_count[adr], reg_right[reg&7]);
break; //A=A!B xs
}
break;
default:
saturn_invalid3( cpustate, 0, 0xe, adr );
break;
}
}
INLINE void sc61860_execute_table_call(sc61860_state *cpustate)
{
int i, v, adr;
for (i=0; i<cpustate->h; i++) {
v=READ_OP(cpustate);
adr=READ_OP_ARG_WORD(cpustate);
cpustate->zero=v==cpustate->ram[A];
if (cpustate->zero) {
cpustate->pc=adr;
return;
}
}
cpustate->pc=READ_OP_ARG_WORD(cpustate);
}