/* Restore state about current inputs / local registers / liveness
from P. */
static void
struct_equiv_restore_checkpoint (struct struct_equiv_checkpoint *p,
struct equiv_info *info)
{
info->cur.ninsns = p->ninsns;
info->cur.x_start = p->x_start;
info->cur.y_start = p->y_start;
info->cur.input_count = p->input_count;
info->cur.input_valid = p->input_valid;
while (info->cur.local_count > p->local_count)
{
info->cur.local_count--;
info->cur.version--;
if (REGNO_REG_SET_P (info->x_local_live,
REGNO (info->x_local[info->cur.local_count])))
{
assign_reg_reg_set (info->x_local_live,
info->x_local[info->cur.local_count], 0);
assign_reg_reg_set (info->y_local_live,
info->y_local[info->cur.local_count], 0);
info->cur.version--;
}
}
if (info->cur.version != p->version)
info->need_rerun = true;
}
static void
renumbered_reg_set_to_hard_reg_set (HARD_REG_SET * hregs, regset regs)
{
int r;
REG_SET_TO_HARD_REG_SET (*hregs, regs);
for (r = FIRST_PSEUDO_REGISTER; r < max_regno; r++)
if (REGNO_REG_SET_P (regs, r) && reg_renumber[r] >= 0)
SET_HARD_REG_BIT (*hregs, reg_renumber[r]);
}
/* In SET, assign the bit for the register number of REG the value VALUE.
If REG is a hard register, do so for all its constituent registers.
Return the number of registers that have become included (as a positive
number) or excluded (as a negative number). */
static int
assign_reg_reg_set (regset set, rtx reg, int value)
{
unsigned regno = REGNO (reg);
int nregs, i, old;
if (regno >= FIRST_PSEUDO_REGISTER)
{
gcc_assert (!reload_completed);
nregs = 1;
}
else
nregs = hard_regno_nregs[regno][GET_MODE (reg)];
for (old = 0, i = nregs; --i >= 0; regno++)
{
if ((value != 0) == REGNO_REG_SET_P (set, regno))
continue;
if (value)
old++, SET_REGNO_REG_SET (set, regno);
else
old--, CLEAR_REGNO_REG_SET (set, regno);
}
return old;
}
static void
collect_pattern_seqs (void)
{
htab_iterator hti0, hti1, hti2;
p_hash_bucket hash_bucket;
p_hash_elem e0, e1;
#if defined STACK_REGS || defined HAVE_cc0
basic_block bb;
bitmap_head dont_collect;
/* Extra initialization step to ensure that no stack registers (if present)
or cc0 code (if present) are live across abnormal edges.
Set a flag in DONT_COLLECT for an insn if a stack register is live
after the insn or the insn is cc0 setter or user. */
bitmap_initialize (&dont_collect, NULL);
#ifdef STACK_REGS
FOR_EACH_BB (bb)
{
regset_head live;
rtx insn;
rtx prev;
/* Initialize liveness propagation. */
INIT_REG_SET (&live);
bitmap_copy (&live, DF_LR_OUT (bb));
df_simulate_initialize_backwards (bb, &live);
/* Propagate liveness info and mark insns where a stack reg is live. */
insn = BB_END (bb);
for (insn = BB_END (bb); ; insn = prev)
{
prev = PREV_INSN (insn);
if (INSN_P (insn))
{
int reg;
for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
{
if (REGNO_REG_SET_P (&live, reg))
{
bitmap_set_bit (&dont_collect, INSN_UID (insn));
break;
}
}
}
if (insn == BB_HEAD (bb))
break;
df_simulate_one_insn_backwards (bb, insn, &live);
insn = prev;
}
/* Free unused data. */
CLEAR_REG_SET (&live);
}
#endif
#ifdef HAVE_cc0
/* Mark CC0 setters and users as ineligible for collection into sequences.
This is an over-conservative fix, since it is OK to include
a cc0_setter, but only if we also include the corresponding cc0_user,
and vice versa. */
FOR_EACH_BB (bb)
{
rtx insn;
rtx next_tail;
next_tail = NEXT_INSN (BB_END (bb));
for (insn = BB_HEAD (bb); insn != next_tail; insn = NEXT_INSN (insn))
{
if (INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
bitmap_set_bit (&dont_collect, INSN_UID (insn));
}
}
#endif
#endif /* defined STACK_REGS || defined HAVE_cc0 */
/* Initialize PATTERN_SEQS to empty. */
pattern_seqs = 0;
/* Try to match every abstractable insn with every other insn in the same
HASH_BUCKET. */
FOR_EACH_HTAB_ELEMENT (hash_buckets, hash_bucket, p_hash_bucket, hti0)
if (htab_elements (hash_bucket->seq_candidates) > 1)
FOR_EACH_HTAB_ELEMENT (hash_bucket->seq_candidates, e0, p_hash_elem, hti1)
FOR_EACH_HTAB_ELEMENT (hash_bucket->seq_candidates, e1, p_hash_elem,
hti2)
if (e0 != e1
#if defined STACK_REGS || defined HAVE_cc0
&& !bitmap_bit_p (&dont_collect, INSN_UID (e0->insn))
&& !bitmap_bit_p (&dont_collect, INSN_UID (e1->insn))
#endif
)
match_seqs (e0, e1);
#if defined STACK_REGS || defined HAVE_cc0
/* Free unused data. */
bitmap_clear (&dont_collect);
#endif
}
static unsigned int
copyprop_hardreg_forward (void)
{
struct value_data *all_vd;
basic_block bb;
sbitmap visited;
bool analyze_called = false;
all_vd = XNEWVEC (struct value_data, last_basic_block);
visited = sbitmap_alloc (last_basic_block);
bitmap_clear (visited);
if (MAY_HAVE_DEBUG_INSNS)
debug_insn_changes_pool
= create_alloc_pool ("debug insn changes pool",
sizeof (struct queued_debug_insn_change), 256);
FOR_EACH_BB (bb)
{
bitmap_set_bit (visited, bb->index);
/* If a block has a single predecessor, that we've already
processed, begin with the value data that was live at
the end of the predecessor block. */
/* ??? Ought to use more intelligent queuing of blocks. */
if (single_pred_p (bb)
&& bitmap_bit_p (visited, single_pred (bb)->index)
&& ! (single_pred_edge (bb)->flags & (EDGE_ABNORMAL_CALL | EDGE_EH)))
{
all_vd[bb->index] = all_vd[single_pred (bb)->index];
if (all_vd[bb->index].n_debug_insn_changes)
{
unsigned int regno;
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
{
if (all_vd[bb->index].e[regno].debug_insn_changes)
{
all_vd[bb->index].e[regno].debug_insn_changes = NULL;
if (--all_vd[bb->index].n_debug_insn_changes == 0)
break;
}
}
}
}
else
init_value_data (all_vd + bb->index);
copyprop_hardreg_forward_1 (bb, all_vd + bb->index);
}
if (MAY_HAVE_DEBUG_INSNS)
{
FOR_EACH_BB (bb)
if (bitmap_bit_p (visited, bb->index)
&& all_vd[bb->index].n_debug_insn_changes)
{
unsigned int regno;
bitmap live;
if (!analyze_called)
{
df_analyze ();
analyze_called = true;
}
live = df_get_live_out (bb);
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
if (all_vd[bb->index].e[regno].debug_insn_changes)
{
if (REGNO_REG_SET_P (live, regno))
apply_debug_insn_changes (all_vd + bb->index, regno);
if (all_vd[bb->index].n_debug_insn_changes == 0)
break;
}
}
free_alloc_pool (debug_insn_changes_pool);
}
sbitmap_free (visited);
free (all_vd);
return 0;
}
/* Check if *XP is equivalent to Y. Until an an unreconcilable difference is
found, use in-group changes with validate_change on *XP to make register
assignments agree. It is the (not necessarily direct) callers
responsibility to verify / confirm / cancel these changes, as appropriate.
RVALUE indicates if the processed piece of rtl is used as a destination, in
which case we can't have different registers being an input. Returns
nonzero if the two blocks have been identified as equivalent, zero otherwise.
RVALUE == 0: destination
RVALUE == 1: source
RVALUE == -1: source, ignore SET_DEST of SET / clobber. */
bool
rtx_equiv_p (rtx *xp, rtx y, int rvalue, struct equiv_info *info)
{
rtx x = *xp;
enum rtx_code code;
int length;
const char *format;
int i;
if (!y || !x)
return x == y;
code = GET_CODE (y);
if (code != REG && x == y)
return true;
if (GET_CODE (x) != code
|| GET_MODE (x) != GET_MODE (y))
return false;
/* ??? could extend to allow CONST_INT inputs. */
switch (code)
{
case REG:
{
unsigned x_regno = REGNO (x);
unsigned y_regno = REGNO (y);
int x_common_live, y_common_live;
if (reload_completed
&& (x_regno >= FIRST_PSEUDO_REGISTER
|| y_regno >= FIRST_PSEUDO_REGISTER))
{
/* We should only see this in REG_NOTEs. */
gcc_assert (!info->live_update);
/* Returning false will cause us to remove the notes. */
return false;
}
#ifdef STACK_REGS
/* After reg-stack, can only accept literal matches of stack regs. */
if (info->mode & CLEANUP_POST_REGSTACK
&& (IN_RANGE (x_regno, FIRST_STACK_REG, LAST_STACK_REG)
|| IN_RANGE (y_regno, FIRST_STACK_REG, LAST_STACK_REG)))
return x_regno == y_regno;
#endif
/* If the register is a locally live one in one block, the
corresponding one must be locally live in the other, too, and
match of identical regnos doesn't apply. */
if (REGNO_REG_SET_P (info->x_local_live, x_regno))
{
if (!REGNO_REG_SET_P (info->y_local_live, y_regno))
return false;
}
else if (REGNO_REG_SET_P (info->y_local_live, y_regno))
return false;
else if (x_regno == y_regno)
{
if (!rvalue && info->cur.input_valid
&& (reg_overlap_mentioned_p (x, info->x_input)
|| reg_overlap_mentioned_p (x, info->y_input)))
return false;
/* Update liveness information. */
if (info->live_update
&& assign_reg_reg_set (info->common_live, x, rvalue))
info->cur.version++;
return true;
}
x_common_live = REGNO_REG_SET_P (info->common_live, x_regno);
y_common_live = REGNO_REG_SET_P (info->common_live, y_regno);
if (x_common_live != y_common_live)
return false;
else if (x_common_live)
{
if (! rvalue || info->input_cost < 0 || no_new_pseudos)
return false;
/* If info->live_update is not set, we are processing notes.
We then allow a match with x_input / y_input found in a
previous pass. */
if (info->live_update && !info->cur.input_valid)
{
info->cur.input_valid = true;
info->x_input = x;
info->y_input = y;
info->cur.input_count += optimize_size ? 2 : 1;
if (info->input_reg
&& GET_MODE (info->input_reg) != GET_MODE (info->x_input))
info->input_reg = NULL_RTX;
if (!info->input_reg)
info->input_reg = gen_reg_rtx (GET_MODE (info->x_input));
}
else if ((info->live_update
? ! info->cur.input_valid : ! info->x_input)
|| ! rtx_equal_p (x, info->x_input)
|| ! rtx_equal_p (y, info->y_input))
return false;
validate_change (info->cur.x_start, xp, info->input_reg, 1);
}
else
{
int x_nregs = (x_regno >= FIRST_PSEUDO_REGISTER
? 1 : hard_regno_nregs[x_regno][GET_MODE (x)]);
int y_nregs = (y_regno >= FIRST_PSEUDO_REGISTER
? 1 : hard_regno_nregs[y_regno][GET_MODE (y)]);
int size = GET_MODE_SIZE (GET_MODE (x));
enum machine_mode x_mode = GET_MODE (x);
unsigned x_regno_i, y_regno_i;
int x_nregs_i, y_nregs_i, size_i;
int local_count = info->cur.local_count;
/* This might be a register local to each block. See if we have
it already registered. */
for (i = local_count - 1; i >= 0; i--)
{
x_regno_i = REGNO (info->x_local[i]);
x_nregs_i = (x_regno_i >= FIRST_PSEUDO_REGISTER
? 1 : hard_regno_nregs[x_regno_i][GET_MODE (x)]);
y_regno_i = REGNO (info->y_local[i]);
y_nregs_i = (y_regno_i >= FIRST_PSEUDO_REGISTER
? 1 : hard_regno_nregs[y_regno_i][GET_MODE (y)]);
size_i = GET_MODE_SIZE (GET_MODE (info->x_local[i]));
/* If we have a new pair of registers that is wider than an
old pair and enclosing it with matching offsets,
remove the old pair. If we find a matching, wider, old
pair, use the old one. If the width is the same, use the
old one if the modes match, but the new if they don't.
We don't want to get too fancy with subreg_regno_offset
here, so we just test two straightforward cases each. */
if (info->live_update
&& (x_mode != GET_MODE (info->x_local[i])
? size >= size_i : size > size_i))
{
/* If the new pair is fully enclosing a matching
existing pair, remove the old one. N.B. because
we are removing one entry here, the check below
if we have space for a new entry will succeed. */
if ((x_regno <= x_regno_i
&& x_regno + x_nregs >= x_regno_i + x_nregs_i
&& x_nregs == y_nregs && x_nregs_i == y_nregs_i
&& x_regno - x_regno_i == y_regno - y_regno_i)
|| (x_regno == x_regno_i && y_regno == y_regno_i
&& x_nregs >= x_nregs_i && y_nregs >= y_nregs_i))
{
info->cur.local_count = --local_count;
info->x_local[i] = info->x_local[local_count];
info->y_local[i] = info->y_local[local_count];
continue;
}
}
else
{
/* If the new pair is fully enclosed within a matching
existing pair, succeed. */
if (x_regno >= x_regno_i
&& x_regno + x_nregs <= x_regno_i + x_nregs_i
&& x_nregs == y_nregs && x_nregs_i == y_nregs_i
&& x_regno - x_regno_i == y_regno - y_regno_i)
break;
if (x_regno == x_regno_i && y_regno == y_regno_i
&& x_nregs <= x_nregs_i && y_nregs <= y_nregs_i)
break;
}
/* Any other overlap causes a match failure. */
if (x_regno + x_nregs > x_regno_i
&& x_regno_i + x_nregs_i > x_regno)
return false;
if (y_regno + y_nregs > y_regno_i
&& y_regno_i + y_nregs_i > y_regno)
return false;
}
if (i < 0)
{
/* Not found. Create a new entry if possible. */
if (!info->live_update
|| info->cur.local_count >= STRUCT_EQUIV_MAX_LOCAL)
return false;
info->x_local[info->cur.local_count] = x;
info->y_local[info->cur.local_count] = y;
info->cur.local_count++;
info->cur.version++;
}
note_local_live (info, x, y, rvalue);
}
return true;
}
case SET:
gcc_assert (rvalue < 0);
/* Ignore the destinations role as a destination. Still, we have
to consider input registers embedded in the addresses of a MEM.
N.B., we process the rvalue aspect of STRICT_LOW_PART /
ZERO_EXTEND / SIGN_EXTEND along with their lvalue aspect. */
if(!set_dest_addr_equiv_p (SET_DEST (x), SET_DEST (y), info))
return false;
/* Process source. */
return rtx_equiv_p (&SET_SRC (x), SET_SRC (y), 1, info);
case PRE_MODIFY:
/* Process destination. */
if (!rtx_equiv_p (&XEXP (x, 0), XEXP (y, 0), 0, info))
return false;
/* Process source. */
return rtx_equiv_p (&XEXP (x, 1), XEXP (y, 1), 1, info);
case POST_MODIFY:
{
rtx x_dest0, x_dest1;
/* Process destination. */
x_dest0 = XEXP (x, 0);
gcc_assert (REG_P (x_dest0));
if (!rtx_equiv_p (&XEXP (x, 0), XEXP (y, 0), 0, info))
return false;
x_dest1 = XEXP (x, 0);
/* validate_change might have changed the destination. Put it back
so that we can do a proper match for its role a an input. */
XEXP (x, 0) = x_dest0;
if (!rtx_equiv_p (&XEXP (x, 0), XEXP (y, 0), 1, info))
return false;
gcc_assert (x_dest1 == XEXP (x, 0));
/* Process source. */
return rtx_equiv_p (&XEXP (x, 1), XEXP (y, 1), 1, info);
}
case CLOBBER:
gcc_assert (rvalue < 0);
return true;
/* Some special forms are also rvalues when they appear in lvalue
positions. However, we must ont try to match a register after we
have already altered it with validate_change, consider the rvalue
aspect while we process the lvalue. */
case STRICT_LOW_PART:
case ZERO_EXTEND:
case SIGN_EXTEND:
{
rtx x_inner, y_inner;
enum rtx_code code;
int change;
if (rvalue)
break;
x_inner = XEXP (x, 0);
y_inner = XEXP (y, 0);
if (GET_MODE (x_inner) != GET_MODE (y_inner))
return false;
code = GET_CODE (x_inner);
if (code != GET_CODE (y_inner))
return false;
/* The address of a MEM is an input that will be processed during
rvalue == -1 processing. */
if (code == SUBREG)
{
if (SUBREG_BYTE (x_inner) != SUBREG_BYTE (y_inner))
return false;
x = x_inner;
x_inner = SUBREG_REG (x_inner);
y_inner = SUBREG_REG (y_inner);
if (GET_MODE (x_inner) != GET_MODE (y_inner))
return false;
code = GET_CODE (x_inner);
if (code != GET_CODE (y_inner))
return false;
}
if (code == MEM)
return true;
gcc_assert (code == REG);
if (! rtx_equiv_p (&XEXP (x, 0), y_inner, rvalue, info))
return false;
if (REGNO (x_inner) == REGNO (y_inner))
{
change = assign_reg_reg_set (info->common_live, x_inner, 1);
info->cur.version++;
}
else
change = note_local_live (info, x_inner, y_inner, 1);
gcc_assert (change);
return true;
}
/* The AUTO_INC / POST_MODIFY / PRE_MODIFY sets are modelled to take
place during input processing, however, that is benign, since they
are paired with reads. */
case MEM:
return !rvalue || rtx_equiv_p (&XEXP (x, 0), XEXP (y, 0), rvalue, info);
case POST_INC: case POST_DEC: case PRE_INC: case PRE_DEC:
return (rtx_equiv_p (&XEXP (x, 0), XEXP (y, 0), 0, info)
&& rtx_equiv_p (&XEXP (x, 0), XEXP (y, 0), 1, info));
case PARALLEL:
/* If this is a top-level PATTERN PARALLEL, we expect the caller to
have handled the SET_DESTs. A complex or vector PARALLEL can be
identified by having a mode. */
gcc_assert (rvalue < 0 || GET_MODE (x) != VOIDmode);
break;
case LABEL_REF:
/* Check special tablejump match case. */
if (XEXP (y, 0) == info->y_label)
return (XEXP (x, 0) == info->x_label);
/* We can't assume nonlocal labels have their following insns yet. */
if (LABEL_REF_NONLOCAL_P (x) || LABEL_REF_NONLOCAL_P (y))
return XEXP (x, 0) == XEXP (y, 0);
/* Two label-refs are equivalent if they point at labels
in the same position in the instruction stream. */
return (next_real_insn (XEXP (x, 0))
== next_real_insn (XEXP (y, 0)));
case SYMBOL_REF:
return XSTR (x, 0) == XSTR (y, 0);
/* Some rtl is guaranteed to be shared, or unique; If we didn't match
EQ equality above, they aren't the same. */
case CONST_INT:
case CODE_LABEL:
return false;
default:
break;
}
/* For commutative operations, the RTX match if the operands match in any
order. */
if (targetm.commutative_p (x, UNKNOWN))
return ((rtx_equiv_p (&XEXP (x, 0), XEXP (y, 0), rvalue, info)
&& rtx_equiv_p (&XEXP (x, 1), XEXP (y, 1), rvalue, info))
|| (rtx_equiv_p (&XEXP (x, 0), XEXP (y, 1), rvalue, info)
&& rtx_equiv_p (&XEXP (x, 1), XEXP (y, 0), rvalue, info)));
/* Process subexpressions - this is similar to rtx_equal_p. */
length = GET_RTX_LENGTH (code);
format = GET_RTX_FORMAT (code);
for (i = 0; i < length; ++i)
{
switch (format[i])
{
case 'w':
if (XWINT (x, i) != XWINT (y, i))
return false;
break;
case 'n':
case 'i':
if (XINT (x, i) != XINT (y, i))
return false;
break;
case 'V':
case 'E':
if (XVECLEN (x, i) != XVECLEN (y, i))
return false;
if (XVEC (x, i) != 0)
{
int j;
for (j = 0; j < XVECLEN (x, i); ++j)
{
if (! rtx_equiv_p (&XVECEXP (x, i, j), XVECEXP (y, i, j),
rvalue, info))
return false;
}
}
break;
case 'e':
if (! rtx_equiv_p (&XEXP (x, i), XEXP (y, i), rvalue, info))
return false;
break;
case 'S':
case 's':
if ((XSTR (x, i) || XSTR (y, i))
&& (! XSTR (x, i) || ! XSTR (y, i)
|| strcmp (XSTR (x, i), XSTR (y, i))))
return false;
break;
case 'u':
/* These are just backpointers, so they don't matter. */
break;
case '0':
case 't':
break;
/* It is believed that rtx's at this level will never
contain anything but integers and other rtx's,
except for within LABEL_REFs and SYMBOL_REFs. */
default:
gcc_unreachable ();
}
}
return true;
}
