Exemple #1
0
int bb_init() 
{
    vuc * const g28 = REGC(0xa1000000);
    vus * const g216 = REGS(0xa1000000);
    vul * const g232 = REGL(0xa1000000);
    
    int i;
    unsigned int tmp;
        
    /* Initialize the "GAPS" PCI glue controller.
       It ain't pretty but it works. */
    g232[0x1418/4] = 0x5a14a501;		/* M */
    i = 10000;
    while (!(g232[0x1418/4] & 1) && i > 0)
	i--;
    if (!(g232[0x1418/4] & 1)) {
	return -1;
    }
    g232[0x1420/4] = 0x01000000;
    g232[0x1424/4] = 0x01000000;
    g232[0x1428/4] = 0x01840000;		/* DMA Base */
    g232[0x142c/4] = 0x01840000 + 32*1024;	/* DMA End */
    g232[0x1414/4] = 0x00000001;
    g232[0x1434/4] = 0x00000001;
    
    /* Configure PCI bridge (very very hacky). If we wanted to be proper,
       we ought to implement a full PCI subsystem. In this case that is
       ridiculous for accessing a single card that will probably never
       change. Considering that the DC is now out of production officially,
       there is a VERY good chance it will never change. */
    g216[0x1606/2] = 0xf900;
    g232[0x1630/4] = 0x00000000;
    g28[0x163c] = 0x00;
    g28[0x160d] = 0xf0;
    (void)g216[0x04/2];
    g216[0x1604/2] = 0x0006;
    g232[0x1614/4] = 0x01000000;
    (void)g28[0x1650];

    rtl_init();

    return 0;
}
Exemple #2
0
#include "packet.h"
#include "net.h"
#include "rtl8139.h"
#include "dcload.h"

unsigned int escape_loop = 0;

rtl_status_t rtl;

/* 8, 16, and 32 bit access to the PCI I/O space (configured by GAPS) */
static vuc * const nic8 = REGC(0xa1001700);
static vus * const nic16 = REGS(0xa1001700);
static vul * const nic32 = REGL(0xa1001700);

/* 8, 16, and 32 bit access to the PCI MEMMAP space (configured by GAPS) */
static vuc * const mem8 = REGC(0xa1840000);
static vus * const mem16 = REGS(0xa1840000);
static vul * const mem32 = REGL(0xa1840000);

int bb_detect()
{
    const char *str = (char*)REGC(0xa1001400);
    if (!memcmp(str, "GAPSPCI_BRIDGE_2", 16))
	return 0;
    else
	return -1;
}

void rtl_init()
{
    unsigned int tmp;
Exemple #3
0
REGS scMult::Rd()
{
  return REGS(ir.rd);
}
	/* LDMDB		1110 1001 00x1 xxxx xxxx xxxx xxxx xxxx */
	DECODE_CUSTOM	(0xfe400000, 0xe8000000, PROBES_T32_LDMSTM),

	DECODE_END
};

static const union decode_item t32_table_1110_100x_x1xx[] = {
	/* Load/store dual, load/store exclusive, table branch */

	/* STRD (immediate)	1110 1000 x110 xxxx xxxx xxxx xxxx xxxx */
	/* LDRD (immediate)	1110 1000 x111 xxxx xxxx xxxx xxxx xxxx */
	DECODE_OR	(0xff600000, 0xe8600000),
	/* STRD (immediate)	1110 1001 x1x0 xxxx xxxx xxxx xxxx xxxx */
	/* LDRD (immediate)	1110 1001 x1x1 xxxx xxxx xxxx xxxx xxxx */
	DECODE_EMULATEX	(0xff400000, 0xe9400000, PROBES_T32_LDRDSTRD,
						 REGS(NOPCWB, NOSPPC, NOSPPC, 0, 0)),

	/* TBB			1110 1000 1101 xxxx xxxx xxxx 0000 xxxx */
	/* TBH			1110 1000 1101 xxxx xxxx xxxx 0001 xxxx */
	DECODE_SIMULATEX(0xfff000e0, 0xe8d00000, PROBES_T32_TABLE_BRANCH,
						 REGS(NOSP, 0, 0, 0, NOSPPC)),

	/* STREX		1110 1000 0100 xxxx xxxx xxxx xxxx xxxx */
	/* LDREX		1110 1000 0101 xxxx xxxx xxxx xxxx xxxx */
	/* STREXB		1110 1000 1100 xxxx xxxx xxxx 0100 xxxx */
	/* STREXH		1110 1000 1100 xxxx xxxx xxxx 0101 xxxx */
	/* STREXD		1110 1000 1100 xxxx xxxx xxxx 0111 xxxx */
	/* LDREXB		1110 1000 1101 xxxx xxxx xxxx 0100 xxxx */
	/* LDREXH		1110 1000 1101 xxxx xxxx xxxx 0101 xxxx */
	/* LDREXD		1110 1000 1101 xxxx xxxx xxxx 0111 xxxx */
	/* And unallocated instructions...				*/
Exemple #5
0
REGS scCR::Rn()
{
 return REGS(0);
}
Exemple #6
0
REGS scCR::Rd()
{
  return REGS(0);
}
Exemple #7
0
	/* LDC2			1111 110x xxx1 xxxx xxxx xxxx xxxx xxxx */
	/* STC2			1111 110x xxx0 xxxx xxxx xxxx xxxx xxxx */
	/* CDP2			1111 1110 xxxx xxxx xxxx xxxx xxx0 xxxx */
	/* MCR2			1111 1110 xxx0 xxxx xxxx xxxx xxx1 xxxx */
	/* MRC2			1111 1110 xxx1 xxxx xxxx xxxx xxx1 xxxx */

	/* Other unallocated instructions...				*/
	DECODE_END
};

static const union decode_item arm_cccc_0001_0xx0____0xxx_table[] = {
	/* Miscellaneous instructions					*/

	/* MRS cpsr		cccc 0001 0000 xxxx xxxx xxxx 0000 xxxx */
	DECODE_SIMULATEX(0x0ff000f0, 0x01000000, PROBES_MRS,
						 REGS(0, NOPC, 0, 0, 0)),

	/* BX			cccc 0001 0010 xxxx xxxx xxxx 0001 xxxx */
	DECODE_SIMULATE	(0x0ff000f0, 0x01200010, PROBES_BRANCH_REG),

	/* BLX (register)	cccc 0001 0010 xxxx xxxx xxxx 0011 xxxx */
	DECODE_SIMULATEX(0x0ff000f0, 0x01200030, PROBES_BRANCH_REG,
						 REGS(0, 0, 0, 0, NOPC)),

	/* CLZ			cccc 0001 0110 xxxx xxxx xxxx 0001 xxxx */
	DECODE_EMULATEX	(0x0ff000f0, 0x01600010, PROBES_CLZ,
						 REGS(0, NOPC, 0, 0, NOPC)),

	/* QADD			cccc 0001 0000 xxxx xxxx xxxx 0101 xxxx */
	/* QSUB			cccc 0001 0010 xxxx xxxx xxxx 0101 xxxx */
	/* QDADD		cccc 0001 0100 xxxx xxxx xxxx 0101 xxxx */