Exemple #1
0
/* Flush all TLB entries. */
void
__flush_tlb_all(void)
{
	int i;
	int mmu;
	unsigned long flags;
	unsigned long mmu_tlb_hi;
	unsigned long mmu_tlb_sel;

	/*
	 * Mask with 0xf so similar TLB entries aren't written in the same 4-way
	 * entry group.
	 */
	local_irq_save(flags);

	for (mmu = 1; mmu <= 2; mmu++) {
		SUPP_BANK_SEL(mmu); /* Select the MMU */
		for (i = 0; i < NUM_TLB_ENTRIES; i++) {
			/* Store invalid entry */
			mmu_tlb_sel = REG_FIELD(mmu, rw_mm_tlb_sel, idx, i);

			mmu_tlb_hi = (REG_FIELD(mmu, rw_mm_tlb_hi, pid, INVALID_PAGEID)
				    | REG_FIELD(mmu, rw_mm_tlb_hi, vpn, i & 0xf));

			SUPP_REG_WR(RW_MM_TLB_SEL, mmu_tlb_sel);
			SUPP_REG_WR(RW_MM_TLB_HI, mmu_tlb_hi);
			SUPP_REG_WR(RW_MM_TLB_LO, 0);
		}
	}

	local_irq_restore(flags);
}
Exemple #2
0
static int uni_player_parse_dt_audio_glue(struct platform_device *pdev,
					  struct uniperif *player)
{
	struct device_node *node = pdev->dev.of_node;
	struct regmap *regmap;
	struct reg_field regfield[2] = {
		/* PCM_CLK_SEL */
		REG_FIELD(SYS_CFG_AUDIO_GLUE,
			  8 + player->id,
			  8 + player->id),
		/* PCMP_VALID_SEL */
		REG_FIELD(SYS_CFG_AUDIO_GLUE, 0, 1)
	};

	regmap = syscon_regmap_lookup_by_phandle(node, "st,syscfg");

	if (IS_ERR(regmap)) {
		dev_err(&pdev->dev, "sti-audio-clk-glue syscf not found\n");
		return PTR_ERR(regmap);
	}

	player->clk_sel = regmap_field_alloc(regmap, regfield[0]);
	player->valid_sel = regmap_field_alloc(regmap, regfield[1]);

	return 0;
}
Exemple #3
0
/* Flush an entire user address space. */
void
__flush_tlb_mm(struct mm_struct *mm)
{
	int i;
	int mmu;
	unsigned long flags;
	unsigned long page_id;
	unsigned long tlb_hi;
	unsigned long mmu_tlb_hi;

	page_id = mm->context.page_id;

	if (page_id == NO_CONTEXT)
		return;

	/* Mark the TLB entries that match the page_id as invalid. */
	local_irq_save(flags);

	for (mmu = 1; mmu <= 2; mmu++) {
		SUPP_BANK_SEL(mmu);
		for (i = 0; i < NUM_TLB_ENTRIES; i++) {
			UPDATE_TLB_SEL_IDX(i);

			/* Get the page_id */
			SUPP_REG_RD(RW_MM_TLB_HI, tlb_hi);

			/* Check if the page_id match. */
			if ((tlb_hi & 0xff) == page_id) {
				mmu_tlb_hi = (REG_FIELD(mmu, rw_mm_tlb_hi, pid,
				                        INVALID_PAGEID)
				            | REG_FIELD(mmu, rw_mm_tlb_hi, vpn,
				                        i & 0xf));

				UPDATE_TLB_HILO(mmu_tlb_hi, 0);
			}
		}
	}

	local_irq_restore(flags);
}
Exemple #4
0
static DEVICE_ATTR_READER(chipregs_show, dev, buf)
{
	xpd_t *xpd;
	unsigned long flags;
	reg_cmd_t *regs;
	bool do_datah;
	char datah_str[50];
	int len = 0;

	BUG_ON(!dev);
	xpd = dev_to_xpd(dev);
	if (!xpd)
		return -ENODEV;
	spin_lock_irqsave(&xpd->lock, flags);
	regs = &xpd->last_reply;
	len += sprintf(buf + len,
		"# Writing bad data to this file may damage your hardware!\n");
	len += sprintf(buf + len, "# Consult firmware docs first\n");
	len += sprintf(buf + len, "#\n");
	do_datah = REG_FIELD(regs, do_datah) ? 1 : 0;
	if (do_datah) {
		snprintf(datah_str, ARRAY_SIZE(datah_str), "\t%02X",
			 REG_FIELD(regs, data_high));
	} else
		datah_str[0] = '\0';
	if (REG_FIELD(regs, do_subreg)) {
		len +=
		    sprintf(buf + len, "#CH\tOP\tReg.\tSub\tDL%s\n",
			    (do_datah) ? "\tDH" : "");
		len +=
		    sprintf(buf + len, "%2d\tRS\t%02X\t%02X\t%02X%s\n",
			    regs->portnum, REG_FIELD(regs, regnum),
			    REG_FIELD(regs, subreg), REG_FIELD(regs, data_low),
			    datah_str);
	} else {
		len +=
		    sprintf(buf + len, "#CH\tOP\tReg.\tDL%s\n",
			    (do_datah) ? "\tDH" : "");
		len +=
		    sprintf(buf + len, "%2d\tRD\t%02X\t%02X%s\n", regs->portnum,
			    REG_FIELD(regs, regnum), REG_FIELD(regs, data_low),
			    datah_str);
	}
	spin_unlock_irqrestore(&xpd->lock, flags);
	return len;
}
Exemple #5
0
/* Invalidate a single page. */
void
__flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
{
	int i;
	int mmu;
	unsigned long page_id;
	unsigned long flags;
	unsigned long tlb_hi;
	unsigned long mmu_tlb_hi;

	page_id = vma->vm_mm->context.page_id;

	if (page_id == NO_CONTEXT)
		return;

	addr &= PAGE_MASK;

	/*
	 * Invalidate those TLB entries that match both the mm context and the
	 * requested virtual address.
	 */
	local_irq_save(flags);

	for (mmu = 1; mmu <= 2; mmu++) {
		SUPP_BANK_SEL(mmu);
		for (i = 0; i < NUM_TLB_ENTRIES; i++) {
			UPDATE_TLB_SEL_IDX(i);
			SUPP_REG_RD(RW_MM_TLB_HI, tlb_hi);

			/* Check if page_id and address matches */
			if (((tlb_hi & 0xff) == page_id) &&
			    ((tlb_hi & PAGE_MASK) == addr)) {
				mmu_tlb_hi = REG_FIELD(mmu, rw_mm_tlb_hi, pid,
				                       INVALID_PAGEID) | addr;

				UPDATE_TLB_HILO(mmu_tlb_hi, 0);
			}
		}
	}

	local_irq_restore(flags);
}
Exemple #6
0
/*
 * The kernel is already mapped with linear mapping at kseg_c so there's no
 * need to map it with a page table. However, head.S also temporarily mapped it
 * at kseg_4 thus the ksegs are set up again. Also clear the TLB and do various
 * other paging stuff.
 */
void __init
cris_mmu_init(void)
{
	unsigned long mmu_config;
	unsigned long mmu_kbase_hi;
	unsigned long mmu_kbase_lo;
	unsigned short mmu_page_id;

	/*
	 * Make sure the current pgd table points to something sane, even if it
	 * is most probably not used until the next switch_mm.
	 */
	per_cpu(current_pgd, smp_processor_id()) = init_mm.pgd;

#ifdef CONFIG_SMP
	{
		pgd_t **pgd;
		pgd = (pgd_t**)&per_cpu(current_pgd, smp_processor_id());
		SUPP_BANK_SEL(1);
		SUPP_REG_WR(RW_MM_TLB_PGD, pgd);
		SUPP_BANK_SEL(2);
		SUPP_REG_WR(RW_MM_TLB_PGD, pgd);
	}
#endif

	/* Initialise the TLB. Function found in tlb.c. */
	tlb_init();

	/* Enable exceptions and initialize the kernel segments. */
	mmu_config = ( REG_STATE(mmu, rw_mm_cfg, we, on)        |
		       REG_STATE(mmu, rw_mm_cfg, acc, on)       |
		       REG_STATE(mmu, rw_mm_cfg, ex, on)        |
		       REG_STATE(mmu, rw_mm_cfg, inv, on)       |
		       REG_STATE(mmu, rw_mm_cfg, seg_f, linear) |
		       REG_STATE(mmu, rw_mm_cfg, seg_e, linear) |
		       REG_STATE(mmu, rw_mm_cfg, seg_d, page)   |
		       REG_STATE(mmu, rw_mm_cfg, seg_c, linear) |
		       REG_STATE(mmu, rw_mm_cfg, seg_b, linear) |
#ifndef CONFIG_ETRAX_VCS_SIM
                       REG_STATE(mmu, rw_mm_cfg, seg_a, page)   |
#else
		       REG_STATE(mmu, rw_mm_cfg, seg_a, linear) |
#endif
		       REG_STATE(mmu, rw_mm_cfg, seg_9, page)   |
		       REG_STATE(mmu, rw_mm_cfg, seg_8, page)   |
		       REG_STATE(mmu, rw_mm_cfg, seg_7, page)   |
		       REG_STATE(mmu, rw_mm_cfg, seg_6, page)   |
		       REG_STATE(mmu, rw_mm_cfg, seg_5, page)   |
		       REG_STATE(mmu, rw_mm_cfg, seg_4, page)   |
		       REG_STATE(mmu, rw_mm_cfg, seg_3, page)   |
		       REG_STATE(mmu, rw_mm_cfg, seg_2, page)   |
		       REG_STATE(mmu, rw_mm_cfg, seg_1, page)   |
		       REG_STATE(mmu, rw_mm_cfg, seg_0, page));

	mmu_kbase_hi = ( REG_FIELD(mmu, rw_mm_kbase_hi, base_f, 0x0) |
			 REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 0x8) |
			 REG_FIELD(mmu, rw_mm_kbase_hi, base_d, 0x0) |
                         REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 0x4) |
			 REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb) |
#ifndef CONFIG_ETRAX_VCS_SIM
			 REG_FIELD(mmu, rw_mm_kbase_hi, base_a, 0x0) |
#else
                         REG_FIELD(mmu, rw_mm_kbase_hi, base_a, 0xa) |
#endif
			 REG_FIELD(mmu, rw_mm_kbase_hi, base_9, 0x0) |
			 REG_FIELD(mmu, rw_mm_kbase_hi, base_8, 0x0));

	mmu_kbase_lo = ( REG_FIELD(mmu, rw_mm_kbase_lo, base_7, 0x0) |
			 REG_FIELD(mmu, rw_mm_kbase_lo, base_6, 0x0) |
			 REG_FIELD(mmu, rw_mm_kbase_lo, base_5, 0x0) |
			 REG_FIELD(mmu, rw_mm_kbase_lo, base_4, 0x0) |
			 REG_FIELD(mmu, rw_mm_kbase_lo, base_3, 0x0) |
			 REG_FIELD(mmu, rw_mm_kbase_lo, base_2, 0x0) |
			 REG_FIELD(mmu, rw_mm_kbase_lo, base_1, 0x0) |
			 REG_FIELD(mmu, rw_mm_kbase_lo, base_0, 0x0));

	mmu_page_id = REG_FIELD(mmu, rw_mm_tlb_hi, pid, 0);

	/* Update the instruction MMU. */
	SUPP_BANK_SEL(BANK_IM);
	SUPP_REG_WR(RW_MM_CFG, mmu_config);
	SUPP_REG_WR(RW_MM_KBASE_HI, mmu_kbase_hi);
	SUPP_REG_WR(RW_MM_KBASE_LO, mmu_kbase_lo);
	SUPP_REG_WR(RW_MM_TLB_HI, mmu_page_id);

	/* Update the data MMU. */
	SUPP_BANK_SEL(BANK_DM);
	SUPP_REG_WR(RW_MM_CFG, mmu_config);
	SUPP_REG_WR(RW_MM_KBASE_HI, mmu_kbase_hi);
	SUPP_REG_WR(RW_MM_KBASE_LO, mmu_kbase_lo);
	SUPP_REG_WR(RW_MM_TLB_HI, mmu_page_id);

	SPEC_REG_WR(SPEC_REG_PID, 0);

	/*
	 * The MMU has been enabled ever since head.S but just to make it
	 * totally obvious enable it here as well.
	 */
	SUPP_BANK_SEL(BANK_GC);
	SUPP_REG_WR(RW_GC_CFG, 0xf); /* IMMU, DMMU, ICache, DCache on */
}
Exemple #7
0
		.desc.name = "DA9062 BUCK1",
		.desc.of_match = of_match_ptr("buck1"),
		.desc.regulators_node = of_match_ptr("regulators"),
		.desc.ops = &da9062_buck_ops,
		.desc.min_uV = (300) * 1000,
		.desc.uV_step = (10) * 1000,
		.desc.n_voltages = ((1570) - (300))/(10) + 1,
		.current_limits = da9062_buck_a_limits,
		.n_current_limits = ARRAY_SIZE(da9062_buck_a_limits),
		.desc.enable_reg = DA9062AA_BUCK1_CONT,
		.desc.enable_mask = DA9062AA_BUCK1_EN_MASK,
		.desc.vsel_reg = DA9062AA_VBUCK1_A,
		.desc.vsel_mask = DA9062AA_VBUCK1_A_MASK,
		.desc.linear_min_sel = 0,
		.sleep = REG_FIELD(DA9062AA_VBUCK1_A,
			__builtin_ffs((int)DA9062AA_BUCK1_SL_A_MASK) - 1,
			sizeof(unsigned int) * 8 -
			__builtin_clz((DA9062AA_BUCK1_SL_A_MASK)) - 1),
		.suspend_sleep = REG_FIELD(DA9062AA_VBUCK1_B,
			__builtin_ffs((int)DA9062AA_BUCK1_SL_B_MASK) - 1,
			sizeof(unsigned int) * 8 -
			__builtin_clz((DA9062AA_BUCK1_SL_B_MASK)) - 1),
		.suspend_vsel_reg = DA9062AA_VBUCK1_B,
		.mode = REG_FIELD(DA9062AA_BUCK1_CFG,
			__builtin_ffs((int)DA9062AA_BUCK1_MODE_MASK) - 1,
			sizeof(unsigned int) * 8 -
			__builtin_clz((DA9062AA_BUCK1_MODE_MASK)) - 1),
		.suspend = REG_FIELD(DA9062AA_DVC_1,
			__builtin_ffs((int)DA9062AA_VBUCK1_SEL_MASK) - 1,
			sizeof(unsigned int) * 8 -
			__builtin_clz((DA9062AA_VBUCK1_SEL_MASK)) - 1),
		.ilimit = REG_FIELD(DA9062AA_BUCK_ILIM_C,
Exemple #8
0
#define LTR501_PS_DATA_MASK 0x7ff
#define LTR501_PS_THRESH_MASK 0x7ff
#define LTR501_ALS_THRESH_MASK 0xffff

#define LTR501_ALS_DEF_PERIOD 500000
#define LTR501_PS_DEF_PERIOD 100000

#define LTR501_REGMAP_NAME "ltr501_regmap"

#define LTR501_LUX_CONV(vis_coeff, vis_data, ir_coeff, ir_data) \
			((vis_coeff * vis_data) - (ir_coeff * ir_data))

static const int int_time_mapping[] = {100000, 50000, 200000, 400000};

static const struct reg_field reg_field_it =
				REG_FIELD(LTR501_ALS_MEAS_RATE, 3, 4);
static const struct reg_field reg_field_als_intr =
				REG_FIELD(LTR501_INTR, 1, 1);
static const struct reg_field reg_field_ps_intr =
				REG_FIELD(LTR501_INTR, 0, 0);
static const struct reg_field reg_field_als_rate =
				REG_FIELD(LTR501_ALS_MEAS_RATE, 0, 2);
static const struct reg_field reg_field_ps_rate =
				REG_FIELD(LTR501_PS_MEAS_RATE, 0, 3);
static const struct reg_field reg_field_als_prst =
				REG_FIELD(LTR501_INTR_PRST, 0, 3);
static const struct reg_field reg_field_ps_prst =
				REG_FIELD(LTR501_INTR_PRST, 4, 7);

struct ltr501_samp_table {
	int freq_val;  /* repetition frequency in micro HZ*/
Exemple #9
0
	"0.023680 0.047360 0.094720 0.189440 0.378880 0.757760 1.515520 " \
	"3.031040 6.062080"

#define STK3310_REGFIELD(name)						    \
	do {								    \
		data->reg_##name =					    \
			devm_regmap_field_alloc(&client->dev, regmap,	    \
				stk3310_reg_field_##name);		    \
		if (IS_ERR(data->reg_##name)) {				    \
			dev_err(&client->dev, "reg field alloc failed.\n"); \
			return PTR_ERR(data->reg_##name);		    \
		}							    \
	} while (0)

static const struct reg_field stk3310_reg_field_state =
    REG_FIELD(STK3310_REG_STATE, 0, 2);
static const struct reg_field stk3310_reg_field_als_gain =
    REG_FIELD(STK3310_REG_ALSCTRL, 4, 5);
static const struct reg_field stk3310_reg_field_ps_gain =
    REG_FIELD(STK3310_REG_PSCTRL, 4, 5);
static const struct reg_field stk3310_reg_field_als_it =
    REG_FIELD(STK3310_REG_ALSCTRL, 0, 3);
static const struct reg_field stk3310_reg_field_ps_it =
    REG_FIELD(STK3310_REG_PSCTRL, 0, 3);
static const struct reg_field stk3310_reg_field_int_ps =
    REG_FIELD(STK3310_REG_INT, 0, 2);
static const struct reg_field stk3310_reg_field_flag_psint =
    REG_FIELD(STK3310_REG_FLAG, 4, 4);
static const struct reg_field stk3310_reg_field_flag_nf =
    REG_FIELD(STK3310_REG_FLAG, 0, 0);
Exemple #10
0
void dump_reg_cmd(const char msg[], bool writing, xbus_t *xbus,
		byte unit, xportno_t port, const reg_cmd_t *regcmd)
{
	char		action;
	char		modifier;
	char		port_buf[MAX_PROC_WRITE];
	char		reg_buf[MAX_PROC_WRITE];
	char		data_buf[MAX_PROC_WRITE];

	if(regcmd->bytes > sizeof(*regcmd) - 1) {	/* The size byte is not included */
		PORT_NOTICE(xbus, unit, port, "%s: %s: Too long: regcmd->bytes = %d\n",
			__FUNCTION__, msg, regcmd->bytes);
		return;
	}
	if(regcmd->is_multibyte) {
		char		buf[MAX_PROC_WRITE + 1];
		int		i;
		int		n = 0;
		size_t		len = regcmd->bytes;
		const byte	*p = REG_XDATA(regcmd);

		buf[0] = '\0';
		for(i = 0; i < len && n < MAX_PROC_WRITE; i++)
			n += snprintf(&buf[n], MAX_PROC_WRITE - n, "%02X ", p[i]);
		PORT_DBG(REGS, xbus, unit, port,
			"UNIT-%d PORT-%d: Multibyte(eoframe=%d) %s[0..%zd]: %s%s\n",
			unit, port, regcmd->eoframe,
			msg, len-1, buf, (n >= MAX_PROC_WRITE)?"...":"");
		return;
	}
	if(regcmd->bytes != sizeof(*regcmd) - 1) {	/* The size byte is not included */
		PORT_NOTICE(xbus, unit, port, "%s: %s: Wrong size: regcmd->bytes = %d\n",
			__FUNCTION__, msg, regcmd->bytes);
		return;
	}
	snprintf(port_buf, MAX_PROC_WRITE, "%d%s",
			regcmd->portnum,
			(REG_FIELD(regcmd, all_ports_broadcast)) ? "*" : "");
	action = (REG_FIELD(regcmd, read_request)) ? 'R' : 'W';
	modifier = 'D';
	if(REG_FIELD(regcmd, do_subreg)) {
		snprintf(reg_buf, MAX_PROC_WRITE, "%02X %02X", 
			REG_FIELD(regcmd, regnum),
			REG_FIELD(regcmd, subreg));
		modifier = 'S';
	} else {
		snprintf(reg_buf, MAX_PROC_WRITE, "%02X", 
			REG_FIELD(regcmd, regnum));
	}
	if(REG_FIELD(regcmd, read_request)) {
		data_buf[0] = '\0';
	} else if(REG_FIELD(regcmd, do_datah)) {
		snprintf(data_buf, MAX_PROC_WRITE, "%02X %02X", 
			REG_FIELD(regcmd, data_low),
			REG_FIELD(regcmd, data_high));
		modifier = 'I';
	} else {
		snprintf(data_buf, MAX_PROC_WRITE, "%02X", 
			REG_FIELD(regcmd, data_low));
	}
	PORT_DBG(REGS, xbus, unit, port, "%s: %s %c%c %s %s\n",
			msg, port_buf, action, modifier,
			reg_buf, data_buf);
}