/*
** Opcode 0xDD/0xFD
** IX/IY related instructions
*/
UBYTE Z80::indexInstructions(UWORD& I, UBYTE origOpcode)
{
UBYTE opcode = READ_MEM(PC++);
switch (opcode) {
case 0x8E: ADD8(A, READ_MEM(I + READ_MEM(PC++)), F_C); return 19;
case 0x86: ADD8(A, READ_MEM(I + READ_MEM(PC++)), 0); return 19;
case 0x09: ADD16(I, BC); return 15;
case 0x19: ADD16(I, DE); return 15;
case 0x29: ADD16(I, I); return 15;
case 0x39: ADD16(I, SP); return 15;
case 0xA6: AND(A, READ_MEM(I + READ_MEM(PC++))); return 19;
case 0xBE: CP(A, READ_MEM(I + READ_MEM(PC++))); return 19;
case 0x96: SUB8(A, READ_MEM(I + READ_MEM(PC++)), 0); return 19;
case 0xAE: XOR(A, READ_MEM(I + READ_MEM(PC++))); return 19;
case 0x35: {
UBYTE v = I + READ_MEM(PC++); UBYTE s = READ_MEM(v); DEC8(s); WRITE_MEM(v, s);
} return 23;
case 0x2B: DEC16(I); return 10;
case 0xE3: { UWORD s = READ_MEM16(SP); EX(s, I); WRITE_MEM16(SP, s); } return 23;
case 0x23: INC16(I); return 10;
case 0x34: {
UBYTE v = I + READ_MEM(PC++); UBYTE s = READ_MEM(v); INC8(s); WRITE_MEM(v, s);
} return 23;
/* JP */
case 0xE9: PC = READ_MEM16(I); return 8;
/* LD */
case 0x7E: A = READ_MEM(I + READ_MEM(PC++)); return 19;
case 0x46: B = READ_MEM(I + READ_MEM(PC++)); return 19;
case 0x4E: C = READ_MEM(I + READ_MEM(PC++)); return 19;
case 0x56: D = READ_MEM(I + READ_MEM(PC++)); return 19;
case 0x5E: E = READ_MEM(I + READ_MEM(PC++)); return 19;
case 0x66: H = READ_MEM(I + READ_MEM(PC++)); return 19;
case 0x6E: L = READ_MEM(I + READ_MEM(PC++)); return 19;
case 0xF9: SP = I; return 19;
case 0x2A: I = READ_MEM16(READ_MEM16(PC)); PC += 2; return 20;
case 0x21: I = READ_MEM16(PC); PC += 2; return 14;
case 0x22: WRITE_MEM16(READ_MEM16(PC), I); PC += 2; return 20;
case 0x70 + 7: WRITE_MEM(I + READ_MEM(PC++), A); return 19;
case 0x70 + 0: WRITE_MEM(I + READ_MEM(PC++), B); return 19;
case 0x70 + 1: WRITE_MEM(I + READ_MEM(PC++), C); return 19;
case 0x70 + 2: WRITE_MEM(I + READ_MEM(PC++), D); return 19;
case 0x70 + 3: WRITE_MEM(I + READ_MEM(PC++), E); return 19;
case 0x70 + 4: WRITE_MEM(I + READ_MEM(PC++), H); return 19;
case 0x70 + 5: WRITE_MEM(I + READ_MEM(PC++), L); return 19;
case 0x36: WRITE_MEM(I + READ_MEM(PC), READ_MEM(PC + 1)); PC += 2; return 19;
case 0xB6: OR(A, READ_MEM(I + READ_MEM(PC++))); return 19;
case 0xE1: I = pop16(); return 14;
case 0xE5: push16(I); return 15;
case 0x9E: SUB8(A, READ_MEM(I + READ_MEM(PC++)), F_C); return 19;
case 0xCB: { // DD CB
UBYTE arg = READ_MEM(PC++);
UBYTE extOpcode = READ_MEM(PC++);
switch (extOpcode) {
#define RES_I(b) case 0x86 + 8 * b: { UBYTE s = READ_MEM(I + arg); \
RES(s, b); WRITE_MEM(I + arg, s); } return 23;
#define SET_I(b) case 0xC6 + 8 * b: { UBYTE s = READ_MEM(I + arg); \
SET(s, b); WRITE_MEM(I + arg, s); } return 23;
#define BIT_I(b) case 0x46 + 8 * b: { UBYTE s = READ_MEM(I + arg); \
BIT(s, b); WRITE_MEM(I + arg, s); } return 23;
/* BIT b,(I+N) */
BIT_I(0); BIT_I(1); BIT_I(2); BIT_I(3);
BIT_I(4); BIT_I(5); BIT_I(6); BIT_I(7);
/* RES b,(I+N) */
RES_I(0); RES_I(1); RES_I(2); RES_I(3);
RES_I(4); RES_I(5); RES_I(6); RES_I(7);
/* SET b,(I+N) */
SET_I(0); SET_I(1); SET_I(2); SET_I(3);
SET_I(4); SET_I(5); SET_I(6); SET_I(7);
case 0x16: { /* RL (I+N) */
UBYTE s = READ_MEM(I + arg); RL(s); WRITE_MEM(I + arg, s);
} return 23;
case 0x06: { /* RLC (I+N) */
UBYTE s = READ_MEM(I + arg); RLC(s); WRITE_MEM(I + arg, s);
} return 23;
case 0x1E: { /* RR (I+N) */
UBYTE s = READ_MEM(I + arg); RR(s); WRITE_MEM(I + arg, s);
} return 23;
case 0x0E: { /* RRC (I+N) */
UBYTE s = READ_MEM(I + arg); RRC(s); WRITE_MEM(I + arg, s);
} return 23;
case 0x26: { /* SLA (I+N) */
UBYTE s = READ_MEM(I + arg); SLA(s); WRITE_MEM(I + arg, s);
} return 23;
case 0x2E: { /* SRA (I+N) */
UBYTE s = READ_MEM(I + arg); SRA(s); WRITE_MEM(I + arg, s);
} return 23;
case 0x36: { /* SLL (I+N) */
UBYTE s = READ_MEM(I + arg); SLL(s); WRITE_MEM(I + arg, s);
} return 23;
case 0x3E: { /* SRL (I+N) */
UBYTE s = READ_MEM(I + arg); SRL(s); WRITE_MEM(I + arg, s);
} return 23;
default:
std::cout << std::hex << "Unknown extended opcode ("
<< origOpcode << ":" << opcode << "): " << static_cast<int>(extOpcode) << std::endl;
return 0;
}
} break;
default:
std::cout << std::hex << "Unknown extended opcode ("
<< origOpcode << "): " << static_cast<int>(opcode) << std::endl;
break;
}
return 0;
}
/**********************************************************
* opcodes with DD/FD CB prefix
* rotate, shift and bit operations with (IX+o)
**********************************************************/
OP(xycb,00) { _B = RLC( RM(EA) ); WM( EA,_B ); } /* RLC B=(XY+o) */
OP(xycb,01) { _C = RLC( RM(EA) ); WM( EA,_C ); } /* RLC C=(XY+o) */
OP(xycb,02) { _D = RLC( RM(EA) ); WM( EA,_D ); } /* RLC D=(XY+o) */
OP(xycb,03) { _E = RLC( RM(EA) ); WM( EA,_E ); } /* RLC E=(XY+o) */
OP(xycb,04) { _H = RLC( RM(EA) ); WM( EA,_H ); } /* RLC H=(XY+o) */
OP(xycb,05) { _L = RLC( RM(EA) ); WM( EA,_L ); } /* RLC L=(XY+o) */
OP(xycb,06) { WM( EA, RLC( RM(EA) ) ); } /* RLC (XY+o) */
OP(xycb,07) { _A = RLC( RM(EA) ); WM( EA,_A ); } /* RLC A=(XY+o) */
OP(xycb,08) { _B = RRC( RM(EA) ); WM( EA,_B ); } /* RRC B=(XY+o) */
OP(xycb,09) { _C = RRC( RM(EA) ); WM( EA,_C ); } /* RRC C=(XY+o) */
OP(xycb,0a) { _D = RRC( RM(EA) ); WM( EA,_D ); } /* RRC D=(XY+o) */
OP(xycb,0b) { _E = RRC( RM(EA) ); WM( EA,_E ); } /* RRC E=(XY+o) */
OP(xycb,0c) { _H = RRC( RM(EA) ); WM( EA,_H ); } /* RRC H=(XY+o) */
OP(xycb,0d) { _L = RRC( RM(EA) ); WM( EA,_L ); } /* RRC L=(XY+o) */
OP(xycb,0e) { WM( EA,RRC( RM(EA) ) ); } /* RRC (XY+o) */
OP(xycb,0f) { _A = RRC( RM(EA) ); WM( EA,_A ); } /* RRC A=(XY+o) */
OP(xycb,10) { _B = RL( RM(EA) ); WM( EA,_B ); } /* RL B=(XY+o) */
OP(xycb,11) { _C = RL( RM(EA) ); WM( EA,_C ); } /* RL C=(XY+o) */
OP(xycb,12) { _D = RL( RM(EA) ); WM( EA,_D ); } /* RL D=(XY+o) */
OP(xycb,13) { _E = RL( RM(EA) ); WM( EA,_E ); } /* RL E=(XY+o) */
OP(xycb,14) { _H = RL( RM(EA) ); WM( EA,_H ); } /* RL H=(XY+o) */
OP(xycb,15) { _L = RL( RM(EA) ); WM( EA,_L ); } /* RL L=(XY+o) */
OP(xycb,16) { WM( EA,RL( RM(EA) ) ); } /* RL (XY+o) */
OP(xycb,17) { _A = RL( RM(EA) ); WM( EA,_A ); } /* RL A=(XY+o) */
/**********************************************************
* opcodes with CB prefix
* rotate, shift and bit operations
**********************************************************/
OP(cb,00) { cpustate->_B = RLC(cpustate, cpustate->_B); } /* RLC B */
OP(cb,01) { cpustate->_C = RLC(cpustate, cpustate->_C); } /* RLC C */
OP(cb,02) { cpustate->_D = RLC(cpustate, cpustate->_D); } /* RLC D */
OP(cb,03) { cpustate->_E = RLC(cpustate, cpustate->_E); } /* RLC E */
OP(cb,04) { cpustate->_H = RLC(cpustate, cpustate->_H); } /* RLC H */
OP(cb,05) { cpustate->_L = RLC(cpustate, cpustate->_L); } /* RLC L */
OP(cb,06) { WM(cpustate, cpustate->_HL, RLC(cpustate, RM(cpustate, cpustate->_HL)) ); } /* RLC (HL) */
OP(cb,07) { cpustate->_A = RLC(cpustate, cpustate->_A); } /* RLC A */
OP(cb,08) { cpustate->_B = RRC(cpustate, cpustate->_B); } /* RRC B */
OP(cb,09) { cpustate->_C = RRC(cpustate, cpustate->_C); } /* RRC C */
OP(cb,0a) { cpustate->_D = RRC(cpustate, cpustate->_D); } /* RRC D */
OP(cb,0b) { cpustate->_E = RRC(cpustate, cpustate->_E); } /* RRC E */
OP(cb,0c) { cpustate->_H = RRC(cpustate, cpustate->_H); } /* RRC H */
OP(cb,0d) { cpustate->_L = RRC(cpustate, cpustate->_L); } /* RRC L */
OP(cb,0e) { WM(cpustate, cpustate->_HL, RRC(cpustate, RM(cpustate, cpustate->_HL)) ); } /* RRC (HL) */
OP(cb,0f) { cpustate->_A = RRC(cpustate, cpustate->_A); } /* RRC A */
OP(cb,10) { cpustate->_B = RL(cpustate, cpustate->_B); } /* RL B */
OP(cb,11) { cpustate->_C = RL(cpustate, cpustate->_C); } /* RL C */
OP(cb,12) { cpustate->_D = RL(cpustate, cpustate->_D); } /* RL D */
OP(cb,13) { cpustate->_E = RL(cpustate, cpustate->_E); } /* RL E */
OP(cb,14) { cpustate->_H = RL(cpustate, cpustate->_H); } /* RL H */
OP(cb,15) { cpustate->_L = RL(cpustate, cpustate->_L); } /* RL L */
OP(cb,16) { WM(cpustate, cpustate->_HL, RL(cpustate, RM(cpustate, cpustate->_HL)) ); } /* RL (HL) */
OP(cb,17) { cpustate->_A = RL(cpustate, cpustate->_A); } /* RL A */
