static tBoolean WaitI2CFinished(void) { // // Wait until the current byte has been transferred. // while(ROM_I2CMasterIntStatus(I2C0_MASTER_BASE, false) == 0) { } if(I2CMasterErr(I2C0_MASTER_BASE) != I2C_MASTER_ERR_NONE) { ROM_I2CMasterIntClear(I2C0_MASTER_BASE); return(false); } // // Clear any interrupts set. // while(ROM_I2CMasterIntStatus(I2C0_MASTER_BASE, false)) { ROM_I2CMasterIntClear(I2C0_MASTER_BASE); } return(true); }
int I2CRead(unsigned char slave, unsigned char address, unsigned int len, unsigned char * readdata, unsigned int readcnt) { unsigned long ulToRead; // Start with a dummy write to get the address set in the EEPROM. ROM_I2CMasterSlaveAddrSet(I2C_MASTER_BASE, slave, false); // Place the address to be written in the data register. ROM_I2CMasterDataPut(I2C_MASTER_BASE, address); // Perform a single send, writing the address as the only byte. ROM_I2CMasterControl(I2C_MASTER_BASE, I2C_MASTER_CMD_BURST_SEND_START); // Wait until the current byte has been transferred. if(!WaitI2CFinished()) { return(false); } // Put the I2C master into receive mode. ROM_I2CMasterSlaveAddrSet(I2C_MASTER_BASE, slave, true); // Start the receive. ROM_I2CMasterControl(I2C_MASTER_BASE, ((readcnt > 1) ? I2C_MASTER_CMD_BURST_RECEIVE_START : I2C_MASTER_CMD_SINGLE_RECEIVE)); // Receive the required number of bytes. ulToRead = readcnt; while(ulToRead) { // Wait until the current byte has been read. while(ROM_I2CMasterIntStatus(I2C_MASTER_BASE, false) == 0){} // Fixes I2C transactions.. ? ROM_SysCtlDelay(1000); // Clear pending interrupt notification. ROM_I2CMasterIntClear(I2C_MASTER_BASE); // Read the received character. *readdata++ = ROM_I2CMasterDataGet(I2C_MASTER_BASE); ulToRead--; // Set up for the next byte if any more remain. if(ulToRead) { ROM_I2CMasterControl(I2C_MASTER_BASE, ((ulToRead == 1) ? I2C_MASTER_CMD_BURST_RECEIVE_FINISH : I2C_MASTER_CMD_BURST_RECEIVE_CONT)); } } return(readcnt - ulToRead); }
static tBoolean WaitI2CFinished(void) { // Wait until the current byte has been transferred. while(ROM_I2CMasterIntStatus(I2C_MASTER_BASE, false) == 0){} if(ROM_I2CMasterErr(I2C_MASTER_BASE) != I2C_MASTER_ERR_NONE) { ROM_I2CMasterIntClear(I2C_MASTER_BASE); return(false); } // Clear any interrupts set. while(ROM_I2CMasterIntStatus(I2C_MASTER_BASE, false)) { ROM_I2CMasterIntClear(I2C_MASTER_BASE); } // Fixes I2C transactions.. ? ROM_SysCtlDelay(10000); return(true); }
//***************************************************************************** // // Writes a register in the TLV320AIC3107 DAC. // // \param ucRegister is the offset to the register to write. // \param ulData is the data to be written to the DAC register. // // This function will write the register passed in ucAddr with the value // passed in to ulData. The data in ulData is actually 9 bits and the // value in ucAddr is interpreted as 7 bits. // // \return True on success or false on error. // //***************************************************************************** static tBoolean DACWriteRegister(unsigned char ucRegister, unsigned long ulData) { // // Set the slave address. // ROM_I2CMasterSlaveAddrSet(DAC_I2C_MASTER_BASE, TI_TLV320AIC3107_ADDR, false); // // Write the first byte to the controller (register) // ROM_I2CMasterDataPut(DAC_I2C_MASTER_BASE, ucRegister); // // Continue the transfer. // ROM_I2CMasterControl(DAC_I2C_MASTER_BASE, I2C_MASTER_CMD_BURST_SEND_START); // // Wait until the current byte has been transferred. // while(ROM_I2CMasterIntStatus(DAC_I2C_MASTER_BASE, false) == 0) { } if(ROM_I2CMasterErr(DAC_I2C_MASTER_BASE) != I2C_MASTER_ERR_NONE) { ROM_I2CMasterIntClear(DAC_I2C_MASTER_BASE); return(false); } // // Wait until the current byte has been transferred. // while(ROM_I2CMasterIntStatus(DAC_I2C_MASTER_BASE, false)) { ROM_I2CMasterIntClear(DAC_I2C_MASTER_BASE); } // // Write the data byte to the controller. // ROM_I2CMasterDataPut(DAC_I2C_MASTER_BASE, ulData); // // End the transfer. // ROM_I2CMasterControl(DAC_I2C_MASTER_BASE, I2C_MASTER_CMD_BURST_SEND_FINISH); // // Wait until the current byte has been transferred. // while(ROM_I2CMasterIntStatus(DAC_I2C_MASTER_BASE, false) == 0) { } if(ROM_I2CMasterErr(DAC_I2C_MASTER_BASE) != I2C_MASTER_ERR_NONE) { return(false); } while(ROM_I2CMasterIntStatus(DAC_I2C_MASTER_BASE, false)) { ROM_I2CMasterIntClear(DAC_I2C_MASTER_BASE); } return(true); }
//***************************************************************************** // // Reads a register in the TLV320AIC3107 DAC. // // \param ucRegister is the offset to the register to write. // \param pucData is a pointer to the returned data. // // \return \b true on success or \b false on error. // //***************************************************************************** static tBoolean DACReadRegister(unsigned char ucRegister, unsigned char *pucData) { // // Set the slave address and "WRITE" // ROM_I2CMasterSlaveAddrSet(DAC_I2C_MASTER_BASE, TI_TLV320AIC3107_ADDR, false); // // Write the first byte to the controller (register) // ROM_I2CMasterDataPut(DAC_I2C_MASTER_BASE, ucRegister); // // Continue the transfer. // ROM_I2CMasterControl(DAC_I2C_MASTER_BASE, I2C_MASTER_CMD_BURST_SEND_START); // // Wait until the current byte has been transferred. // while(ROM_I2CMasterIntStatus(DAC_I2C_MASTER_BASE, false) == 0) { } if(ROM_I2CMasterErr(DAC_I2C_MASTER_BASE) != I2C_MASTER_ERR_NONE) { ROM_I2CMasterIntClear(DAC_I2C_MASTER_BASE); return(false); } // // Wait until the current byte has been transferred. // while(ROM_I2CMasterIntStatus(DAC_I2C_MASTER_BASE, false)) { ROM_I2CMasterIntClear(DAC_I2C_MASTER_BASE); } // // Set the slave address and "READ"/true. // ROM_I2CMasterSlaveAddrSet(DAC_I2C_MASTER_BASE, TI_TLV320AIC3107_ADDR, true); // // Read Data Byte. // ROM_I2CMasterControl(DAC_I2C_MASTER_BASE, I2C_MASTER_CMD_SINGLE_RECEIVE); // // Wait until the current byte has been transferred. // while(ROM_I2CMasterIntStatus(DAC_I2C_MASTER_BASE, false) == 0) { } if(ROM_I2CMasterErr(DAC_I2C_MASTER_BASE) != I2C_MASTER_ERR_NONE) { ROM_I2CMasterIntClear(DAC_I2C_MASTER_BASE); return(false); } // // Wait until the current byte has been transferred. // while(ROM_I2CMasterIntStatus(DAC_I2C_MASTER_BASE, false)) { ROM_I2CMasterIntClear(DAC_I2C_MASTER_BASE); } // // Read the value received. // *pucData = ROM_I2CMasterDataGet(DAC_I2C_MASTER_BASE); return(true); }
//***************************************************************************** // // Reads from the I2C-attached EEPROM device. // // \param pucData points to storage for the data read from the EEPROM. // \param ulOffset is the EEPROM address of the first byte to read. // \param ulCount is the number of bytes of data to read from the EEPROM. // // This function reads one or more bytes of data from a given address in the // ID EEPROM found on several of the development kit daughter boards. The // return code indicates whether the read was successful. // // \return Returns \b true on success of \b false on failure. // //***************************************************************************** static tBoolean EEPROMReadPolled(unsigned char *pucData, unsigned long ulOffset, unsigned long ulCount) { unsigned long ulToRead; // // Clear any previously signalled interrupts. // ROM_I2CMasterIntClear(I2C0_MASTER_BASE); // // Start with a dummy write to get the address set in the EEPROM. // ROM_I2CMasterSlaveAddrSet(I2C0_MASTER_BASE, ID_I2C_ADDR, false); // // Place the address to be written in the data register. // ROM_I2CMasterDataPut(I2C0_MASTER_BASE, ulOffset); // // Perform a single send, writing the address as the only byte. // ROM_I2CMasterControl(I2C0_MASTER_BASE, I2C_MASTER_CMD_BURST_SEND_START); // // Wait until the current byte has been transferred. // if(!WaitI2CFinished()) { return(false); } // // Put the I2C master into receive mode. // ROM_I2CMasterSlaveAddrSet(I2C0_MASTER_BASE, ID_I2C_ADDR, true); // // Start the receive. // ROM_I2CMasterControl(I2C0_MASTER_BASE, ((ulCount > 1) ? I2C_MASTER_CMD_BURST_RECEIVE_START : I2C_MASTER_CMD_SINGLE_RECEIVE)); // // Receive the required number of bytes. // ulToRead = ulCount; while(ulToRead) { // // Wait until the current byte has been read. // while(ROM_I2CMasterIntStatus(I2C0_MASTER_BASE, false) == 0) { } // // Clear pending interrupt notification. // ROM_I2CMasterIntClear(I2C0_MASTER_BASE); // // Read the received character. // *pucData++ = ROM_I2CMasterDataGet(I2C0_MASTER_BASE); ulToRead--; // // Set up for the next byte if any more remain. // if(ulToRead) { ROM_I2CMasterControl(I2C0_MASTER_BASE, ((ulToRead == 1) ? I2C_MASTER_CMD_BURST_RECEIVE_FINISH : I2C_MASTER_CMD_BURST_RECEIVE_CONT)); } } // // Tell the caller we read the required data. // return(true); }