void rtc_init(void) { if (rtc_isenabled()) { return; } SIM_HAL_EnableRtcClock(SIM_BASE, 0U); RTC_HAL_Init(RTC_BASE); RTC_HAL_Enable(RTC_BASE); RTC_HAL_EnableCounter(RTC_BASE, true); }
void RTC_DRV_Init(uint32_t instance) { uint32_t rtcBaseAddr = g_rtcBaseAddr[instance]; /* Enable clock gate to RTC module */ CLOCK_SYS_EnableRtcClock( 0U); /* Initialize the general configuration for RTC module.*/ RTC_HAL_Init(rtcBaseAddr); RTC_HAL_Enable(rtcBaseAddr); NVIC_ClearPendingIRQ(g_rtcIrqId[instance]); NVIC_ClearPendingIRQ(g_rtcSecondsIrqId[instance]); INT_SYS_EnableIRQ(g_rtcIrqId[instance]); INT_SYS_EnableIRQ(g_rtcSecondsIrqId[instance]); }
rtc_status_t RTC_DRV_Init(uint32_t instance) { RTC_Type *rtcBase = g_rtcBase[instance]; /* Enable clock gate to RTC module */ CLOCK_SYS_EnableRtcClock(0U); /* Initialize the general configuration for RTC module.*/ RTC_HAL_Init(rtcBase); RTC_HAL_Enable(rtcBase); NVIC_ClearPendingIRQ(g_rtcIrqId[instance]); NVIC_ClearPendingIRQ(g_rtcSecondsIrqId[instance]); INT_SYS_EnableIRQ(g_rtcIrqId[instance]); INT_SYS_EnableIRQ(g_rtcSecondsIrqId[instance]); return kStatusRtcSuccess; }
void lp_ticker_init(void) { if (lp_ticker_inited) { return; } lp_ticker_inited = 1; // RTC might be configured already, don't reset it RTC_HAL_SetSupervisorAccessCmd(RTC_BASE, true); if (!RTC_HAL_IsCounterEnabled(RTC_BASE)) { // select RTC for OSC32KSEL CLOCK_HAL_SetSource(SIM_BASE, kClockOsc32kSel, 2); // configure RTC SIM_HAL_EnableRtcClock(SIM_BASE, 0U); RTC_HAL_Init(RTC_BASE); RTC_HAL_Enable(RTC_BASE); for (volatile uint32_t wait_count = 0; wait_count < 1000000; wait_count++); RTC_HAL_SetAlarmIntCmd(RTC_BASE, false); RTC_HAL_SetSecsIntCmd(RTC_BASE, false); RTC_HAL_SetAlarmReg(RTC_BASE, 0); RTC_HAL_EnableCounter(RTC_BASE, true); } vIRQ_ClearPendingIRQ(RTC_IRQn); vIRQ_SetVector(RTC_IRQn, (uint32_t)rct_isr); vIRQ_EnableIRQ(RTC_IRQn); // configure LPTMR CLOCK_SYS_EnableLptimerClock(0); LPTMR0_CSR = 0x00; LPTMR0_PSR = 0x00; LPTMR0_CMR = 0x00; LPTMR_HAL_SetTimerModeMode(LPTMR0_BASE, kLptmrTimerModeTimeCounter); LPTMR0_PSR |= LPTMR_PSR_PCS(0x2) | LPTMR_PSR_PBYP_MASK; LPTMR_HAL_SetIntCmd(LPTMR0_BASE, 1); LPTMR_HAL_SetFreeRunningCmd(LPTMR0_BASE, 0); IRQn_Type timer_irq[] = LPTMR_IRQS; vIRQ_SetVector(timer_irq[0], (uint32_t)lptmr_isr); vIRQ_EnableIRQ(timer_irq[0]); }