Exemple #1
0
int s3c2400_gpio_getirq(unsigned int pin)
{
	if (pin < S3C2410_GPE(0) || pin > S3C2400_GPE(7))
		return -EINVAL;  

	return (pin - S3C2410_GPE(0)) + IRQ_EINT0;
}
void s3c2416_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
{
	unsigned int gpio;
	unsigned int end;

	end = S3C2410_GPE(7 + width);

	/* Set all the necessary GPE pins to special-function 0 */
	for (gpio = S3C2410_GPE(5); gpio < end; gpio++) {
		s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
		s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
	}
}
Exemple #3
0
static void __init nexcoder_sensorboard_init(void)
{
	/* Initialize SCCB bus */
	gpio_request_one(S3C2410_GPE(14), GPIOF_OUT_INIT_HIGH, NULL);
	gpio_free(S3C2410_GPE(14)); /* IICSCL */
	gpio_request_one(S3C2410_GPE(15), GPIOF_OUT_INIT_HIGH, NULL);
	gpio_free(S3C2410_GPE(15)); /* IICSDA */

	/* Power up the sensor board */
	gpio_request_one(S3C2410_GPF(1), GPIOF_OUT_INIT_HIGH, NULL);
	gpio_free(S3C2410_GPF(1)); /* CAM_GPIO7 => nLDO_PWRDN */
	gpio_request_one(S3C2410_GPF(2), GPIOF_OUT_INIT_LOW, NULL);
	gpio_free(S3C2410_GPF(2)); /* CAM_GPIO6 => CAM_PWRDN */
}
static void __init nexcoder_sensorboard_init(void)
{
	// Initialize SCCB bus
	s3c2410_gpio_setpin(S3C2410_GPE(14), 1); // IICSCL
	s3c_gpio_cfgpin(S3C2410_GPE(14), S3C2410_GPIO_OUTPUT);
	s3c2410_gpio_setpin(S3C2410_GPE(15), 1); // IICSDA
	s3c_gpio_cfgpin(S3C2410_GPE(15), S3C2410_GPIO_OUTPUT);

	// Power up the sensor board
	s3c2410_gpio_setpin(S3C2410_GPF(1), 1);
	s3c_gpio_cfgpin(S3C2410_GPF(1), S3C2410_GPIO_OUTPUT); // CAM_GPIO7 => nLDO_PWRDN
	s3c2410_gpio_setpin(S3C2410_GPF(2), 0);
	s3c_gpio_cfgpin(S3C2410_GPF(2), S3C2410_GPIO_OUTPUT); // CAM_GPIO6 => CAM_PWRDN
}
Exemple #5
0
static int s3c2412_i2s_probe(struct snd_soc_dai *dai)
{
	int ret;

	pr_debug("Entered %s\n", __func__);

	snd_soc_dai_init_dma_data(dai, &s3c2412_i2s_pcm_stereo_out,
					&s3c2412_i2s_pcm_stereo_in);

	ret = s3c_i2sv2_probe(dai, &s3c2412_i2s, S3C2410_PA_IIS);
	if (ret)
		return ret;

	s3c2412_i2s.dma_capture = &s3c2412_i2s_pcm_stereo_in;
	s3c2412_i2s.dma_playback = &s3c2412_i2s_pcm_stereo_out;

	s3c2412_i2s.iis_cclk = devm_clk_get(dai->dev, "i2sclk");
	if (IS_ERR(s3c2412_i2s.iis_cclk)) {
		pr_err("failed to get i2sclk clock\n");
		return PTR_ERR(s3c2412_i2s.iis_cclk);
	}

	/* Set MPLL as the source for IIS CLK */

	clk_set_parent(s3c2412_i2s.iis_cclk, clk_get(NULL, "mpll"));
	clk_prepare_enable(s3c2412_i2s.iis_cclk);

	s3c2412_i2s.iis_cclk = s3c2412_i2s.iis_pclk;

	/* Configure the I2S pins (GPE0...GPE4) in correct mode */
	s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2),
			      S3C_GPIO_PULL_NONE);

	return 0;
}
Exemple #6
0
static int s3c24xx_i2s_probe(struct snd_soc_dai *dai)
{
    pr_debug("Entered %s\n", __func__);

    samsung_asoc_init_dma_data(dai, &s3c24xx_i2s_pcm_stereo_out,
                               &s3c24xx_i2s_pcm_stereo_in);

    s3c24xx_i2s.iis_clk = devm_clk_get(dai->dev, "iis");
    if (IS_ERR(s3c24xx_i2s.iis_clk)) {
        pr_err("failed to get iis_clock\n");
        return PTR_ERR(s3c24xx_i2s.iis_clk);
    }
    clk_prepare_enable(s3c24xx_i2s.iis_clk);

    /* Configure the I2S pins (GPE0...GPE4) in correct mode */
    s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2),
                          S3C_GPIO_PULL_NONE);

    writel(S3C2410_IISCON_IISEN, s3c24xx_i2s.regs + S3C2410_IISCON);

    s3c24xx_snd_txctrl(0);
    s3c24xx_snd_rxctrl(0);

    return 0;
}
void s3c24xx_spi_gpiocfg_bus0_gpe11_12_13(struct s3c2410_spi_info *spi,
					  int enable)
{
	if (enable) {
		s3c2410_gpio_cfgpin(S3C2410_GPE(13), S3C2410_GPE13_SPICLK0);
		s3c2410_gpio_cfgpin(S3C2410_GPE(12), S3C2410_GPE12_SPIMOSI0);
		s3c2410_gpio_cfgpin(S3C2410_GPE(11), S3C2410_GPE11_SPIMISO0);
		s3c2410_gpio_pullup(S3C2410_GPE(11), 0);
		s3c2410_gpio_pullup(S3C2410_GPE(13), 0);
	} else {
		s3c2410_gpio_cfgpin(S3C2410_GPE(13), S3C2410_GPIO_INPUT);
		s3c2410_gpio_cfgpin(S3C2410_GPE(11), S3C2410_GPIO_INPUT);
		s3c2410_gpio_pullup(S3C2410_GPE(11), 1);
		s3c2410_gpio_pullup(S3C2410_GPE(12), 1);
		s3c2410_gpio_pullup(S3C2410_GPE(13), 1);
	}
}
Exemple #8
0
/**
 * s3cmci_check_sdio_irq - test whether the SDIO IRQ is being signalled
 * @host: The host to check.
 *
 * Test to see if the SDIO interrupt is being signalled in case the
 * controller has failed to re-detect a card interrupt. Read GPE8 and
 * see if it is low and if so, signal a SDIO interrupt.
 *
 * This is currently called if a request is finished (we assume that the
 * bus is now idle) and when the SDIO IRQ is enabled in case the IRQ is
 * already being indicated.
*/
static void s3cmci_check_sdio_irq(struct s3cmci_host *host)
{
	if (host->sdio_irqen) {
		if (gpio_get_value(S3C2410_GPE(8)) == 0) {
			pr_debug("%s: signalling irq\n", __func__);
			mmc_signal_sdio_irq(host->mmc);
		}
	}
}
Exemple #9
0
int s3c64xx_spi0_cfg_gpio(struct platform_device *pdev)
{
	/* enable hsspi bit in misccr */
	s3c2410_modify_misccr(S3C2416_MISCCR_HSSPI_EN2, 1);

	s3c_gpio_cfgall_range(S3C2410_GPE(11), 3,
			      S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);

	return 0;
}
Exemple #10
0
static void s3c2440_i2c_init(void)
{

	struct clk *clk;
	clk = clk_get(NULL, "i2c");
	clk_enable(clk);

	//引脚设置
	s3c_gpio_cfgpin(S3C2410_GPE(14),S3C2410_GPE14_IICSCL);
	s3c_gpio_cfgpin(S3C2410_GPE(15),S3C2410_GPE15_IICSDA);
	
	/* bit[6] = 0, IICCLK = PCLK/16
	 * bit[3:0] = 0xf, Tx clock = IICCLK/16
	 * PCLK = 50MHz, IICCLK = 3.125MHz, Tx Clock = 0.195MHz
	 *
	 */
	s3c2440_i2c_regs->iiccon = (1<<7) | (0<<6) | (1<<5) | (0xf);
	s3c2440_i2c_regs->iicadd = 0x10;
	s3c2440_i2c_regs->iicstat = 0x10;
}
Exemple #11
0
static void __init mini2440_machine_init(void)
{
	s3c24xx_fb_set_platdata(&s3c24xx_fb_info);
	
	s3c_i2c0_set_platdata(NULL);

	s3c2410_gpio_cfgpin(S3C2410_GPC(0), S3C2410_GPC0_LEND);
	printk("S3C2410_GPA=%d\n",S3C2410_GPA(0));
	printk("S3C2410_GPB=%d\n",S3C2410_GPB(0));
	printk("S3C2410_GPC=%d\n",S3C2410_GPC(0));
	printk("S3C2410_GPD=%d\n",S3C2410_GPD(0));
	printk("S3C2410_GPE=%d\n",S3C2410_GPE(0));
	printk("S3C2410_GPF=%d\n",S3C2410_GPF(0));
	printk("S3C2410_GPG=%d\n",S3C2410_GPG(0));
	printk("S3C2410_GPH=%d\n",S3C2410_GPH(0));
	s3c_device_nand.dev.platform_data = &friendly_arm_nand_info;
	s3c_device_sdi.dev.platform_data = &mini2440_mmc_cfg;
	platform_add_devices(mini2440_devices, ARRAY_SIZE(mini2440_devices));
	platform_device_register_simple("GPIODEV", 0, &gpiodev_resource, 1); //GPIO resource MAP
	s3c_pm_init();
}
Exemple #12
0
void s3c_i2c0_cfg_gpio(struct platform_device *dev)
{
	s3c2410_gpio_cfgpin(S3C2410_GPE(15), S3C2410_GPE15_IICSDA);
	s3c2410_gpio_cfgpin(S3C2410_GPE(14), S3C2410_GPE14_IICSCL);
}
		.chip	= {
			.base	= S3C2410_GPC(0),
			.owner	= THIS_MODULE,
			.label	= "GPIOC",
			.ngpio	= 16,
		},
	}, {
		.chip	= {
			.base	= S3C2410_GPD(0),
			.owner	= THIS_MODULE,
			.label	= "GPIOD",
			.ngpio	= 16,
		},
	}, {
		.chip	= {
			.base	= S3C2410_GPE(0),
			.label	= "GPIOE",
			.owner	= THIS_MODULE,
			.ngpio	= 16,
		},
	}, {
		.chip	= {
			.base	= S3C2410_GPF(0),
			.owner	= THIS_MODULE,
			.label	= "GPIOF",
			.ngpio	= 8,
			.to_irq	= s3c24xx_gpiolib_fbank_to_irq,
		},
	}, {
		.irq_base = IRQ_EINT8,
		.chip	= {