static void s3c_pm_drain_uart(int uart)
{
void __iomem *regs = S3C_VA_UARTx(uart);
unsigned long ufstat;
do {
ufstat = __raw_readl(regs + S3C2410_UTRSTAT);
} while (!(ufstat & S3C2410_UTRSTAT_TXE));
}
static void s3c_pm_restore_uart(unsigned int uart, struct pm_uart_save *save)
{
void __iomem *regs = S3C_VA_UARTx(uart);
__raw_writel(save->ulcon, regs + S3C2410_ULCON);
__raw_writel(save->ucon, regs + S3C2410_UCON);
__raw_writel(save->ufcon, regs + S3C2410_UFCON);
__raw_writel(save->umcon, regs + S3C2410_UMCON);
__raw_writel(save->ubrdiv, regs + S3C2410_UBRDIV);
}
static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)
{
void __iomem *regs = S3C_VA_UARTx(uart);
save->ulcon = __raw_readl(regs + S3C2410_ULCON);
save->ucon = __raw_readl(regs + S3C2410_UCON);
save->ufcon = __raw_readl(regs + S3C2410_UFCON);
save->umcon = __raw_readl(regs + S3C2410_UMCON);
save->ubrdiv = __raw_readl(regs + S3C2410_UBRDIV);
}
static void s3c_pm_clear_uarts(void)
{
unsigned int uart;
for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++) {
void __iomem *regs = S3C_VA_UARTx(uart);
__raw_writel(0, regs + S3C2410_ULCON);
__raw_writel(0, regs + S3C2410_UCON);
__raw_writel(0, regs + S3C2410_UFCON);
__raw_writel(0, regs + S3C2410_UMCON);
__raw_writel(0, regs + S3C2410_UBRDIV);
__raw_writel(0xf, regs + S3C64XX_UINTSP);
__raw_writel(0xf, regs + S3C64XX_UINTP);
}
}
static void s3c_pm_restore_uart(unsigned int uart, struct pm_uart_save *save)
{
void __iomem *regs = S3C_VA_UARTx(uart);
s3c_pm_arch_update_uart(regs, save);
__raw_writel(save->ulcon, regs + S3C2410_ULCON);
__raw_writel(save->ucon, regs + S3C2410_UCON);
__raw_writel(save->ufcon, regs + S3C2410_UFCON);
__raw_writel(save->umcon, regs + S3C2410_UMCON);
__raw_writel(save->ubrdiv, regs + S3C2410_UBRDIV);
if (pm_uart_udivslot)
__raw_writel(save->udivslot, regs + S3C2443_DIVSLOT);
}
static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)
{
void __iomem *regs = S3C_VA_UARTx(uart);
save->ulcon = __raw_readl(regs + S3C2410_ULCON);
save->ucon = __raw_readl(regs + S3C2410_UCON);
save->ufcon = __raw_readl(regs + S3C2410_UFCON);
save->umcon = __raw_readl(regs + S3C2410_UMCON);
save->ubrdiv = __raw_readl(regs + S3C2410_UBRDIV);
if (pm_uart_udivslot)
save->udivslot = __raw_readl(regs + S3C2443_DIVSLOT);
S3C_PMDBG("UART[%d]: ULCON=%04x, UCON=%04x, UFCON=%04x, UBRDIV=%04x\n",
uart, save->ulcon, save->ucon, save->ufcon, save->ubrdiv);
}
static void s3c64xx_irq_pm_resume(void)
{
struct irq_grp_save *grp = eint_grp_save;
int i;
S3C_PMDBG("%s: resuming IRQs\n", __func__);
s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save));
for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++)
__raw_writel(irq_uart_mask[i], S3C_VA_UARTx(i) + S3C64XX_UINTM);
for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) {
__raw_writel(grp->con, S3C64XX_EINT12CON + (i * 4));
__raw_writel(grp->mask, S3C64XX_EINT12MASK + (i * 4));
__raw_writel(grp->fltcon, S3C64XX_EINT12FLTCON + (i * 4));
}
S3C_PMDBG("%s: IRQ configuration restored\n", __func__);
}
static int s3c64xx_irq_pm_suspend(void)
{
struct irq_grp_save *grp = eint_grp_save;
int i;
S3C_PMDBG("%s: suspending IRQs\n", __func__);
s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save));
for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++)
irq_uart_mask[i] = __raw_readl(S3C_VA_UARTx(i) + S3C64XX_UINTM);
for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) {
grp->con = __raw_readl(S3C64XX_EINT12CON + (i * 4));
grp->mask = __raw_readl(S3C64XX_EINT12MASK + (i * 4));
grp->fltcon = __raw_readl(S3C64XX_EINT12FLTCON + (i * 4));
}
return 0;
}
static void s3c_pm_restore_uarts(void)
{
void __iomem *regs = S3C_VA_UARTx(CONFIG_S3C_LOWLEVEL_UART_PORT);
struct pm_uart_save *save = &console_uart_save;
u32 uart_clk_gate;
// if(console_suspend_enabled)
// return;
/* make sure CONSOLE UART clock it be enabled*/
uart_clk_gate = __raw_readl(EXYNOS4_CLKGATE_IP_PERIL);
__raw_writel((uart_clk_gate | 0x1 << CONFIG_S3C_LOWLEVEL_UART_PORT), EXYNOS4_CLKGATE_IP_PERIL);
__raw_writel(save->ulcon, regs + S3C2410_ULCON);
__raw_writel(save->ucon, regs + S3C2410_UCON);
__raw_writel(save->ufcon, regs + S3C2410_UFCON);
__raw_writel(save->umcon, regs + S3C2410_UMCON);
__raw_writel(save->ubrdiv, regs + S3C2410_UBRDIV);
__raw_writel(save->udivslot, regs + S3C2443_DIVSLOT);
}
#ifdef CONFIG_PM
#include <plat/pm.h>
#define SAVE_UART(va) \
SAVE_ITEM((va) + S3C2410_ULCON), \
SAVE_ITEM((va) + S3C2410_UCON), \
SAVE_ITEM((va) + S3C2410_UFCON), \
SAVE_ITEM((va) + S3C2410_UMCON), \
SAVE_ITEM((va) + S3C2410_UBRDIV), \
SAVE_ITEM((va) + S3C2410_UDIVSLOT), \
SAVE_ITEM((va) + S3C2410_UINTMSK)
static struct sleep_save uart_save[] = {
SAVE_UART(S3C_VA_UARTx(0)),
SAVE_UART(S3C_VA_UARTx(1)),
SAVE_UART(S3C_VA_UARTx(2)),
SAVE_UART(S3C_VA_UARTx(3)),
};
#define SAVE_UART_PORT (ARRAY_SIZE(uart_save) / 4)
static int
s3c24xx_serial_suspend(struct platform_device *dev, pm_message_t state)
{
struct uart_port *port = s3c24xx_dev_to_port(&dev->dev);
if (port) {
uart_suspend_port(&s3c24xx_uart_drv, port);
s3c_pm_do_save(uart_save + port->line * SAVE_UART_PORT,
